CSC 2500: Unix Lab Fall 2016 Makefile Mohammad Ashiqur Rahman Department of Computer Science College of Engineering Tennessee Tech University
Agenda Make Utility Build Process The Basic Makefile Target Using Dependencies Using Variables and Comments Lab 9: Creating Makefiles M. Ashiq Rahman, Tennessee Tech University 2
The make utility Makefiles are special format files that together with the make utility help to automatically build and manage the projects. The command make will look for a file named makefile in your directory, and then execute it. If you have several makefiles, then you can execute them with the command: make -f mymakefile M. Ashiq Rahman, Tennessee Tech University 3
Build Process Build process includes the following two things: Compiler takes the source files and outputs object files Linker takes the object files and creates an executable The trivial way to compile the files and obtain an executable, is by running the command: g++ main.cpp hello.cpp factorial.cpp -o hello M. Ashiq Rahman, Tennessee Tech University 4
// functions.h void print_hello(); int factorial(int n); Example: Files // main.cpp #include <stdio.h> #include "functions.h" int main() { print_hello(); printf("\n"); printf("the factorial of 5 is %d\n", factorial(5)); return 0; } // hello.cpp #include <stdio.h> #include "functions.h" void print_hello() { printf("hello World!"); } // factorial.cpp #include "functions.h" int factorial(int n) { if(n!=1) { return(n * factorial(n-1)); } else return 1; } M. Ashiq Rahman, Tennessee Tech University 5
The Basic Makefile The basic makefile is composed of: target: dependencies [tab] system command This syntax applied to our example will look like: all: g++ main.cpp hello.cpp factorial.cpp -o hello To run this makefile on our files: make -f Makefile1 Target is named all. This is the default target for makefiles. The make utility will execute this target if no other one is specified. Here no dependencies for target all, so make safely executes the system commands specified. M. Ashiq Rahman, Tennessee Tech University 6
Dependencies Sometimes is useful to use different targets. Because: If we modify a single file in our project, we do not have to recompile everything, only what you modified. The target called clean is useful if we want to have a fast way to get rid of all the object files and so..phony target: A phony target is one that is not the name of a file; rather it is just a name for a recipe to be executed when you make an explicit request. all: hello hello: main.o factorial.o hello.o g++ main.o factorial.o hello.o -o hello main.o: main.cpp g++ -c main.cpp factorial.o: factorial.cpp g++ -c factorial.cpp hello.o: hello.cpp g++ -c hello.cpp clean: rm -f *o hello M. Ashiq Rahman, Tennessee Tech University 7
Dependencies (2) all: hello hello: main.o factorial.o hello.o g++ main.o factorial.o hello.o -o hello main.o: main.cpp g++ -c main.cpp factorial.o: factorial.cpp g++ -c factorial.cpp hello.o: hello.cpp g++ -c hello.cpp clean: rm -f *o hello $ make f mymakefile g++ -c main.cpp g++ -c factorial.cpp g++ -c hello.cpp g++ main.o factorial.o hello.o -o hello $ ls factorial.cpp functions.h hello.cpp main.cpp mymakefile factorial.o hello hello.o main.o $ make f mymakefile clean $ ls factorial.cpp functions.h hello.cpp main.cpp mymakefile $./hello Hello World! The factorial of 5 is 120 M. Ashiq Rahman, Tennessee Tech University 8
Using Variables Variables can be used when writing makefiles. Useful where we want to change the compiler, or the compiler options. Just a note: -Wall option is for all warnings # CC is the compiler to be used CC=g++ # CFLAGS will be the options to the compiler. CFLAGS=-c -Wall all: hello hello: main.o factorial.o hello.o $(CC) main.o factorial.o hello.o -o hello main.o: main.cpp $(CC) $(CFLAGS) main.cpp factorial.o: factorial.cpp $(CC) $(CFLAGS) factorial.cpp hello.o: hello.cpp $(CC) $(CFLAGS) hello.cpp clean: rm -f *o M. Ashiq Rahman, Tennessee Tech University 9
Ultimate Makefile CC=g++ CFLAGS=-c -Wall LDFLAGS= SOURCES=main.cpp hello.cpp factorial.cpp OBJECTS=$(SOURCES:.cpp=.o) EXECUTABLE=hello all: $(SOURCES) $(EXECUTABLE) $(EXECUTABLE): $(OBJECTS) $(CC) $(LDFLAGS) $(OBJECTS) -o $@.cpp.o: $(CC) $(CFLAGS) $< -o $@ $(variable:suffix=replacement) $(patsubst pattern,replacement,$(variable)) OBJECTS=$(patsubst %.cpp,%.o,$(sources)) LDFLAGS is the linker flag so that the linker will look in the directed directory to find the shared library. M. Ashiq Rahman, Tennessee Tech University 10
Lab 09 Objective: Writing Makfile Makefile variables Targets, dependencies, and rules Creating a shared library PHONY targets Auto-generating dependencies For this lab, you will write a make file, called Makefile, that compiles a Craps game. M. Ashiq Rahman, Tennessee Tech University 12
Lab 09: Description Craps.zip consists of craps_game.cpp, craps_helper.cpp, craps_io.cpp files. Your Makefile Compile craps_game.cpp, craps_helper.cpp, craps_io.cpp into object files Combine them into a shared library. Remember that you must use the compiler flag -fpic when compiling and the -shared flag when linking to create a shared library. M. Ashiq Rahman, Tennessee Tech University 13
Lab 09: Homework Submission Rename your makefile as <FirstName Initial><LastName>_makefile. Submission Deadline: Friday, November 11, 2016 Submission Site: ilearn (a Dropbox folder named Homework 09 ) Submission Content: Submit your makefile. M. Ashiq Rahman, Tennessee Tech University 14
Lab 09: Lab Practice Create the makefile described in the lecture. Without variables (makefile1) With variables (makefile2) M. Ashiq Rahman, Tennessee Tech University 15
THANKS Acknowledgement: - http://mrbook.org/blog/tutorials/make/ M. Ashiq Rahman, Tennessee Tech University 16