Avalable onlne www.jocpr.com Journal of Chemcal and Pharmaceutcal Research, 04, 6(7):585-593 Research Artcle ISSN : 0975-7384 CODEN(USA) : JCPRC5 FPGA-based mplementaton of crcular nterpolaton Mngyu Gao, Jaxang Lou, Jlong Ye and Zhanxong Wu Hang Zhou Dan Z Unversty, Hang Zhou, Chna ABSTRACT Owng to arthmetc speed s nfluence of computer software, the accuracy and speed of numercal control system s feed based on software nterpolaton are subject to certan restrctons. FPGA-based realzaton of four knds of hardware crcular nterpolaton algorthm n ths paper, the hardware logc desgned wth verlog hardware descrpton language, and the actual trajectory verfed by ModelSm smulaton and coordnate draw pont; ARM+FGPA-based mplementatons of four crcular nterpolaton algorthms do the verfcatons n two axes archtecture automatc CNC machne tool. From the results, mproved mn-error nterpolaton has the best precson and effcency among the four nterpolatons. So ths nterpolaton algorthm has superor practcal value on CNC machne tools and ndustral robots. Key words: DDA nterpolaton, mn-error nterpolaton, FPGA, CNC system INTRODUCTION Machne tool moton s acheved through nterpolaton n CNC systems, so nterpolaton algorthm [-3] affects the processng speed and precson drectly. Interpolaton task s to calculate the coordnates of several ntermedate ponts between the start and end of the part s contour, makng the coordnates of track are set by the nterpolaton curve. Snce calculaton s tme of each pont drectly affect the control speed of the CNC system, and the accuracy affect the fnal geometrc precson [4-5]. So the nterpolaton algorthm s crtcal to performance of CNC system devces, t s seen as the core technology of CNC system devces. There are hgh requrements for real-tme moton control n modern hgh-speed CNC systems, although software nterpolator has advantages, the software nterpolaton [6] affects by restrcton of synchronous output. So the speed, accuracy, and effcency of nterpolator algorthm are dffcult to meet the performance requrements of hgh-speed and real-tme control. The way to solve ths problem s to gve full play to the respectve advantages of software and hardware, the real-tme demandng task mplemented by specally desgned hardware. Due to the desgn of FPGA s parallel, mult-threaded and onlne programmng, and FPGA has the advantages of both hgh speed and low cost, whle overcomes the shortage of dedcated processor s nflexblty. Therefore, FPGA-based hardware nterpolaton [7] has a hgh practcal value, and t s sutable for hgh effcency and hgh precson of the workplace. Fnally, the transmsson of nstructons, parameters between ARM [8] processor and FPGA [9] s through the parallel bus of FSMC, whch meets the requrement of real-tme better. BY-POINT COMPARISON INTERPOLATION By-Pont comparson nterpolaton [0] s compare current coordnate value wth theoretcal trajectory to judge whether the pont at the top or bottom (maybe nsde or outsde) of the gven trajectory and determne the drecton of the next step. If current pont s at the bottom (nsde) of Z-axs, then next step s to move to the top (outsde) of the gven trajectory; smlarly, f current pont s at the top (outsde) of the gven trajectory, then next step s to move to the bottom (nsde) of the gven trajectory. Thus, judge current poston whle move a step, determnes next step and approaches the gven trajectory untl the end of nterpolaton. 585
Mngyu Gao et al J. Chem. Pharm. Res., 04, 6(7):585-593 Assumng that arc radus s r, to processng a quarter of the frst quadrant crcle, startng pont s and end pont s, so the arc equaton s: x + y = r () Then wrte the devaton judgment formula: F = x + y r () We can summary out the relatve poston of relatonshp between the arc and the target, as follows: When F < 0 the fxed pont P s nsde of the set arc; When F = 0, the fxed pont P falls on the gven arc; When F > 0, the fxed pont P s outsde of the set arc. Fg. : Sketch of by-pont comparson nterpolaton From Fg., we can deduce that, when the devaton judgment formula of pont P correspondng to s less than 0, then X axal feeds and the next pont s ( x, y + ) F( x +, y+ ) = x + ( y + ) r = F( x, y ) + y + (3), the devaton judgment formula s re-calculated as follow: When the devaton judgment formula of pont P correspondng to s greater or equal to 0, then -Y axal feeds and the next pont s ( x +, y ), the devaton judgment formula s re-calculated as follow: (, ) ( ) (, ) F x + y + = x + + y r = F x y + x + (4) Fnally, the start pont s on the crcle, so we can gve out the ntal value of devaton judgment formula: F( x0, y 0) = 0 (5) By-pont comparson algorthm mplemented on FPGA s relatvely smple, and the requred logc resource s not too much, but the algorthm outputs only sgnal axle pulse not both when feedng, so the processng effcency can t be hgher. DDA INTERPOLATION Dgtal ntegral nterpolaton nterpolaton s also called mathematcal dfferental analyss nterpolaton, referred to as DDA. After a unt tme nterval, each axs accumulates a value to a regster and ths value s related to current coordnate poston. When the accumulator regster s more than a set value whch we called overflow, the correspondng axs output a pulse, the accumulator regster subtracts the set value and the remander s used for the next calculaton. When calculate non-lnear nterpolaton, DDA need to change the accumulated value by current coordnate poston, whch makes unavodable roundng error. 586
Mngyu Gao et al J. Chem. Pharm. Res., 04, 6(7):585-593 Fg. : Sketch of DDA nterpolaton From Fg., assumng the arc radus s r, so the equaton of crcle s we can know: x + y = r. Partal dervatve obtaned for x, dy x = (6) dx y From the DDA nterpolaton, the nterpolaton formulas of both axls are as follows: m m m x (7) = = = x = x = v t = k y m m m y (8) = = = y = y = v t = k x Lastly, we gve out the ntal value of accumulated overflow formula, because accumulated value s compared wth the long axs and short axs, t s always less than or equal to the long axs, there must be a certan lag. So the ntal value of the regster need loadng value frstly. Here we take a preset number of half-loadng nterpolaton for mprovng the speed and accuracy of the nterpolaton. MIN-ERROR INTERPOLATION Mn-error nterpolaton [] s that accordng the mnmum devaton among A to N, B to N and C to N to do each feed. Ths nterpolaton s realzed by comparng the dstance of three ponts, so the realzaton of FPGA hardware nterpolaton algorthm needs a large amount of regster varables, whch makes waste of the logcal resource when applyng for more regster varables. { { { Fg. 3: Sketch of mn-error nterpolaton From Fg. 3, assumng the radus of crcular arc s r, start pont s S( x0, y 0), and end pont s E( xe, y e). Pont N s 587
Mngyu Gao et al J. Chem. Pharm. Res., 04, 6(7):585-593 on the arc, and also A( x +, y ), B( x, y ), C( x, y ) devaton judgment formula s: +. Arc equaton s x + y = r. Then F = x + y r (9) n = + + = + + (0) ( x ) ( y ) r F x y n = x + ( y ) r = F y + () n = + + = F + x + () 3 ( x ) y r By comparng the dstance of n, n and n3, we can know the feed drecton: When n s the smallest, the curve closed the pont, so the feed drecton feeds both formula s: and, the new devaton F = ( x + ) + ( y ) R = F + x y + (3) + When n s the smallest, the curve closed the pont, so the feed drecton s, the new devaton formula s: F = x + ( y ) R = F y + (4) + 3 When n3 s the smallest, the curve closed the pont, so the feed drecton s, the new devaton formula s: F = ( x + ) + y R = F + x + (5) + Fnally, the start pont s on the crcle, so we can gve out the ntal value of devaton judgment formula: F 0 = 0 (6) Assumng the current pont s at, Accordng to the prncple of mn-error nterpolaton and dstance of n, n and n3, we can get the next pulse feed drecton. The output pulse can be made unformly, quckly and effcently, and the nterpolaton algorthm s easer to be realzed. But ths nterpolaton needs much logc elements. Fg. 4: Sketch of mproved mn-error nterpolaton IMPROVED MIN-ERROR INTERPOLATION The controller n order to make t easer to get the mn-error nterpolaton acheved, here we propose a new algorthm whch can acheve the mn-error algorthm wthout knowng three ponts. We select the Y axs (when k >) as the longer axs. Compare the devaton between the drecton of longer axs and dagonal lne, and the feed drecton s same as the drecton of smaller devaton. In ths paper, we decde the drecton through the coordnate of mddle pont 588
Mngyu Gao et al J. Chem. Pharm. Res., 04, 6(7):585-593 lke pont md. Ths nterpolaton uses the less logc elements because of the less regster varables. So ths nterpolaton can be used well n the lmted logc elements of FPGA. As shown n Fg4, now the processng pont s located n the slope k >, assumng the radus of crcular arc s r, start A( x, y ), and end pont s B( x, y ). Then devaton judgment formula s: pont s 0 0 e e F = x + y r (7) ( x, y + ), so t s satsfes wth the formula x + y = r, whch y = y.so we can know Due to p p x = r y = r y = x F + y. p + ( ) p + + Takng d x p = and d = xmd = ( x + ), then: 5 d d = y x F (8) 4 Remove the denomnator we can get formula: 4( d d ) = 8y 4x 5 4F (9) We can know whether the shorter axs feedng by judged the symbol of d d : when d d 0, the curve s closed the pont m, then the feed drecton s.new devaton judgment formula: F = x + y r = F + x y + (0) + + + when d d 0 formula: <, the curve s closed the pont n, then the shorter axs does nothng.new devaton judgment F = x + y r = F y + () + + + Fnally, the start pont s on the crcle, so we can gve out the ntal value of devaton judgment formula: F( x0, y 0) = 0 () Smlarly, we can know the case of k <. The mproved mn-error nterpolaton s realzed just by the coordnate of mddle pont and swtch between longer axs and the other. Ths nterpolaton s less than mn-error nterpolaton on regster varables, so we can save more logc resource wth ths nterpolaton. Fg. 5: Smulaton waveform of by-pont comparson nterpolaton REALIZATIONS OF FOUR INTERPOLATION ALGORITHM WITH FPGA Ths artcle uses the verloglanguage to acheve hardware nterpolaton algorthm, wth ModelSmdo the smulaton 589
Mngyu Gao et al J. Chem. Pharm. Res., 04, 6(7):585-593 waveforms of a radus s 5 of /4 smooth round. Whch coordnates the arc start pont s (5,0) and end pont s (0,5). Fg. 6: Smulaton waveform of DDA nterpolaton Fg. 7: Smulaton waveform of mn-error nterpolaton Fg. 8: Smulaton waveform of mproved mn-error nterpolaton Here are the generc sgnals n the smulaton waveform: clk s the clock sgnal; rst s the reset sgnal; Start _ X 0, Start _ Z 0, End _ X and End _ Z represent the startng pont and end pont coordnates; Syn s a synchronzaton start sgnal; X _ Pwm _ Out and Z _ Pwm _ Out s the nterpolaton pulse output; Busy ndcates when the nterpolaton s fnsh; Val _ x and Val _ z show the current coordnate values. In Fg.5, the Val _ f represents the devaton judgment formula. In Fg.6, Sum _ X and Sum _ Z represent two accumulator regsters n DDA. In Fg. 7, Val _ f, Val _ n, Val _ n and Val _ n3 represent the devaton judgment formula F, n, n and n 3. THE ANALYSIS OF SPEED AND ACCURACY Accordng to the actual pulse waveform of FPGA, we can get four knds of nterpolaton trajectory, whch are shown n Fg. 9: 590
Mngyu Gao et al J. Chem. Pharm. Res., 04, 6(7):585-593 6 5 4 3 6 5 4 3 3 4 5 by-pont comparson 3 DDA 4 5 Fg. 9: Four knds of nterpolaton trajectory about arc Where the blue lne represents the actual trajectory nterpolaton, red represents the deal arc. The arrows ndcate the drecton of servo feed. The comparson of the four nterpolatons for processng the same crcular arc s shown as table. Table also lsts the number of processng steps (nversely related to the number of steps and the processng speed), processng accuracy (error) and logc resource used, whle the error can be obtaned wth the normalzed values. Table : processng speed, error and logc resources of four knds crcular nterpolaton Pulse and error by-pont comparson DDA Mn-error Improved mn-error Pulse (unt:mnmum step) 0 8 7 7 Error (unt:mnmum step) 0.877 0.385 0.385 0.385 logc elements 690 74 79 74 Accordng to the dagram of smulaton and nterpolaton trajectores, we can learn that: by-pont comparson nterpolaton, each feed drecton only could be one of the axes, so the two feed axes can't be acheved smultaneously, the processng requred 0 steps, and normalzaton of errors s 0.877, but the logc elements requred are less. DDA, the ntal value of accumulator regster s set to a half of the major axs wth sem-loaded method. X axs and Z axs can feed smultaneously, but the feed must under the condton of overflow of the accumulator regster, the processng of ths arc requres 8 steps, normalzaton of errors s 0.385, and the logc elements requred are less than mn-error nterpolaton. 3 mn-error nterpolaton, determne the next pulse feed drecton by error of each nterpolaton drectly, the drecton s the same as the closest pont among the three ponts. X axs and Z axs can feed smultaneously and no need to wat the overflow of the accumulator regster, so the processng effcency would be hgher. The processng of ths arc requres 7 steps, normalzaton of errors s 0.385, but the logc elements requred are more than other nterpolatons. 4 mproved mn-error nterpolaton, frstly, the longer axs s selected, and then judge the shorter one feeds or not after each nterpolaton, X axs and Z axs can feed smultaneously and no need to wat the overflow of the accumulator regster, so the processng effcency would be hgher. The processng of ths arc requres 7 steps, normalzaton of errors s 0.385, and the logc elements requred are only 74 logc elements, whch less than 59
Mngyu Gao et al J. Chem. Pharm. Res., 04, 6(7):585-593 mn-error nterpolaton. FPGA-based hardware nterpolator has acheved good results n the processng tests of effcency and accuracy. And real-tme of communcaton between ARM and FPGA by FSMC bus s good. Meanwhle, to the dedcated nterpolaton controller, the cost of ths hardware nterpolator can be well controlled. Fg.0 s the actual processng test of mproved mn-error nterpolaton. Fg. 0: The actual processng test of mproved mn-error nterpolaton CONCLUSION ARM and FPGA-based hardware nterpolator has a hgh real-tme performance and a good cost advantage. To ths nterpolator realzed by mproved mn-error nterpolaton, by-pont comparson s worse n terms of speed and precson, and DDA s worse n terms of process s speed despte of the same precson. The logc elements of mproved mn-error nterpolaton are less than mn-error nterpolaton, so the proposed hardware nterpolator s worthy of applcaton and generalzaton. By-pont comparson nterpolaton s sutable for the general economcal CNC systems, DDA can be used n low-end requrements whch don t need hgh processng effcency because of ts hgh process precson, whle mproved mn-error nterpolaton s wdely used n the hgh precson CNC systems and ndustral robots. REFERENCES [] PANG, Q-shou, and Yu-sheng FENG. Manufacturng Automaton 6 (009): 08. [] Hua, Yan, Zuo Jan-mn, and Wang Mu-lan. Mod ern Manufacturng Engneerng 9 (007): 06. [3] TAN, Yong, Zh-sen WANG, and Xao-jng YAN. Journal of Hefe Unversty of Technology (Natural Scence) 6 (004): 008. [4] Guoyong Zhao, Hongjng An, Qngzh Zhao, Journal of Computers, vol 8, no 6 (03), 5-59, jun 03. [5] G Zhxang Shao, RufengGuo, Je L, JanJun Peng, Journal of Software, vol 6, no 0 (0), 056-063, oct 0. [6] Chen, Z. Y., W. Guo, and C. X. L. Industral Electroncs and Applcatons, 006 ST IEEE Conference on. IEEE, 006. [7] WANG, Fang, and Kun-q WANG. "Hardware Interpolaton of Moton Control System Based on CPLD." Journal of X'an Technologcal Unversty 3 (008): 007. [8] STM3F407xx.pdf(http://www.st.com/web/en/resource/techncal/document/datasheet/DM0003705.pdf). [9] Cyclone_II_Devce_Handbook.pdf(http://www.st.com/web/en/resource/techncal/document/datasheet/DM00037 05.pdf). [0] Huang Bn ; Wu Chunxue. The research and realzaton of Crcular nterpolaton track based on the Pont-to-pont comparson method of CNC n Sclab, Networkng and Dgtal Socety (ICNDS), 00 nd Internatonal Conference on, May 00, pp. 67-69. [] Chen, C.-Y. ; Lao, P.-S. ; Cheng, C.-C. ; Jong, G.-F. Desgn and Implementaton of Real-tme NURBS Interpolator for Moton Control, Industral Electroncs and Applcatons, 007. ICIEA 007. nd IEEE Conference on, May 007, pp. 46-43. [] Ungureanu-Anghel, D. ;Belc, D.-I. ; Raduca, E. ;Raduca, M. Mnmum vcnty nterpolaton algorthms for 59
Mngyu Gao et al J. Chem. Pharm. Res., 04, 6(7):585-593 calculaton of trajectory processng for a model of CNC machne tool. Computatonal Cybernetcs and Techncal Informatcs (ICCC-CONTI), 00 Internatonal Jont Conference on, May 00, pp. 367-37. 593