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Features MEMS motion sensor: high performance ±500 /s analog yaw-rate gyroscope 2.7 V to 3.6 V single-supply operation Wide operating temperature range (-40 C to +85 C) High stability overtemperature Analog absolute angular-rate output Two separate outputs (1x and 4x amplified) Integrated low-pass filters Low power consumption Embedded power-down Embedded self-test High shock and vibration survivability ECOPACK RoHS and Green compliant (see Section 5) Applications Gaming applications Pointing devices, remote and game controllers Motion control with user interface Industrial and robotics Description The is a low-power single-axis micromachined gyroscope capable of measuring angular rate along yaw axis. It provides excellent temperature stability and high resolution over an extended operating temperature range (-40 C to +85 C). LGA-16L (5x5x1.5mm) Preliminary data The has a full scale of ±500 /s and is capable of detecting rates with a -3 db bandwidth up to 140 Hz. The gyroscope is the combination of one actuator and one accelerometer integrated in a single micromachined structure. It includes a sensing element composed by single driving mass, kept in continuos oscillating movement and able to react when an angular rate is applied based on the Coriolis principle. A CMOS IC provides the measured angular rate to the external world through an analog output voltage, allowing high level of integration and production trimming to better match sensing element characteristics. ST s gyroscope family leverages on robust and mature manufacturing process already used for the production of micromachined accelerometers. ST is already in the field with several hundreds million sensors with excellent acceptance from the market in terms of quality, reliability and performance. is provided in plastic land grid array (LGA) package. Several years ago ST pioneered successfully the usage of this package for accelerometers. Today ST has the widest manufacturing capability and strongest expertise in the world for production of sensor in plastic LGA package. Table 1. Device summary Order code Temperature range ( C) Package Packing -40 to +85 LGA-16 (5x5x1.5) Tray TR -40 to +85 LGA-16 (5x5x1.5) Tape and reel July 2009 Doc ID 15802 Rev 2 1/12 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. www.st.com 12

Contents Contents 1 Block diagram and pin description............................. 3 1.1 Pin description.............................................. 3 2 Mechanical and electrical specifications........................ 5 2.1 Mechanical characteristics..................................... 5 2.2 Electrical characteristics....................................... 6 2.3 Absolute maximum ratings..................................... 6 3 Terminology................................................ 7 3.1 Sensitivity.................................................. 7 3.2 Zero-rate level.............................................. 7 3.3 Self-test................................................... 7 3.4 High pass filter reset (HP)..................................... 7 4 Application hints............................................ 8 4.1 Output response vs. rotation................................... 9 4.2 Soldering information......................................... 9 5 Package information........................................ 10 6 Revision history........................................... 11 2/12 Doc ID 15802 Rev 2

Block diagram and pin description 1 Block diagram and pin description Figure 1. Block diagram DRIVING MASS Feedback loop GAIN 4x 4xOUT Z (amplified) 1.1 Pin description Figure 2. REFERENCE CHARGE AMPLIFIER + - TRIMMING CIRCUITS Pin connection DEMODULATOR SWITCHED CAPACITOR LOW-PASS FILTER CLOCK Optional LP Filter PHASE GENERATOR Not amplified +Ω z filtered output Z +Ω z (TOP VIEW) DIRECTION OF THE DETECTABLE ANGULAR RATE HP ST OUTZ 4xINZ Res Vref Vdd 14 16 13 1 Res GND FILTVDD VCONT PD 9 Res 8 4xOUTZ 6 (BOTTOM VIEW) 5 Res Res Doc ID 15802 Rev 2 3/12

Block diagram and pin description Table 2. Pin description Pin # Pin name Analog function 1 GND 0V supply voltage 2 FILTVDD PLL filter connection pin #2 3 VCONT PLL filter connection pin #1 4 Res Leave unconnected 5 Res Leave unconnected 6 Res Leave unconnected 7 Vref Reference voltage 8 4xOUTZ Z rate signal output voltage (amplified) 9 4xINZ Input of 4x amplifier 10 OUTZ Not amplified output 11 ST Self-test (logic 0: normal mode; logic 1: self-test) 12 PD 13 HP 14,15 Res Reserved. Connect to Vdd 16 Vdd Power supply Power-down (logic 0: normal mode; logic 1: power-down mode) High pass filter reset (logic 0: normal operation mode; logic1: external high pass filter is reset) 4/12 Doc ID 15802 Rev 2

Mechanical and electrical specifications 2 Mechanical and electrical specifications 2.1 Mechanical characteristics Table 3. Mechanical characteristics @ Vdd = 3 V, T = 25 C unless otherwise noted (1) Symbol Parameter Test condition Min. Typ. (2) Max. Unit FSA 4x OUT (amplified) ±500 /s Measurement range FS OUT (not amplified) ±2000 /s SoA Sensitivity (3) 4x OUT (amplified) 2 mv/ /s So OUT (not amplified) 0.5 mv/ /s SoDr Sensitivity change vs temperature Delta from 25 C 0.05 %/ C Voff Zero-rate level (3) 1.23 V Vref Reference voltage 1.23 V OffDr Zero-rate level change Vs temperature Delta from 25 C 0.08 /s/ C NL Non linearity Best fit straight line ±1 % FS BW Bandwidth (4) 140 Hz Rn Rate noise density 0.059 /s / Top Operating temperature range -40 +85 C 1. The product is factory calibrated at 3 V. The operational power supply range is specified in Table 4. 2. Typical specifications are not guaranteed 3. Sensitivity and zero-rate level are not ratiometric to supply voltage 4. The product is capable of measuring angular rates extending from DC to the selected BW. Hz Doc ID 15802 Rev 2 5/12

Mechanical and electrical specifications 2.2 Electrical characteristics Table 4. Electrical characteristics @ Vdd =3 V, T=25 C unless otherwise noted (1) Symbol Parameter Test condition Min. Typ. (2) Max. Unit Vdd Supply voltage 2.7 3 3.6 V Idd Supply current PD pin connected to GND 5 5.5 ma IddPdn VST VPD Top Supply current in power-down mode Self-test input Power-down input Operating temperature range 1. The product is factory calibrated at 3 V 2. Typical specifications are not guaranteed 2.3 Absolute maximum ratings PD pin connected to Vdd 1 5 µa Logic 0 level 0 0.2*Vdd Logic 1 level 0.8*Vdd Vdd Logic 0 level 0 0.2*Vdd Logic 1 level 0.8*Vdd Vdd -40 +85 C Stresses above those listed as Absolute maximum ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Table 5. Absolute maximum ratings Symbol Ratings Maximum value Unit Vdd Supply voltage -0.3 to 6 V Vin Input voltage on any control pin (PD, ST) -0.3 to Vdd +0.3 V A Acceleration 3000 g for 0.5 ms 10000 g for 0.1 ms T STG Storage temperature range -40 to +125 C ESD Electrostatic discharge protection 2 (HBM) kv V V This is a mechanical shock sensitive device, improper handling can cause permanent damage to the part This is an ESD sensitive device, improper handling can cause permanent damage to the part 6/12 Doc ID 15802 Rev 2

Terminology 3 Terminology 3.1 Sensitivity An angular rate gyroscope is a device that produces a positive-going output voltage for counterclockwise rotation around the sensitive axis considered. Sensitivity describes the gain of the sensor and can be determined by applying a defined angular velocity to it. This value changes very little over temperature and time. 3.2 Zero-rate level Zero-rate level describes the actual output signal if there is no angular rate present. The zero-rate level of precise MEMS sensors is, to some extent, a result of stress to the sensor and therefore zero-rate level can slightly change after mounting the sensor onto a printed circuit board or after exposing it to extensive mechanical stress. This value changes very little over temperature and time. 3.3 Self-test Self-test allows testing of the mechanical and electrical part of the sensor, allowing the seismic mass to be moved by means of an electrostatic test-force. The self-test function is off when the ST pin is connected to GND. When the ST pin is tied to Vdd, an actuation force is applied to the sensor, emulating a definite Coriolis force. In this case the sensor output will exhibit a voltage change in its DC level which is also dependent on the supply voltage. When ST is active, the device output level is given by the algebraic sum of the signals produced by the velocity acting on the sensor and by the electrostatic test-force. If the output signals change within the amplitude specified in Table 3, then the mechanical element is working properly and the parameters of the interface chip are within the defined specifications. 3.4 High pass filter reset (HP) The provides the possibility to reset the optional external high pass filter by applying a high logic value to the HP pad. This procedure ensures faster response, especially during overload conditions. Moreover, this operation is suggested each time the device is powered. Doc ID 15802 Rev 2 7/12

Application hints 4 Application hints Figure 3. electrical connections and external component values 10nF C2 +Ω z 10kOhm 470nF GND GND Vdd R1 Typical values: R1 = 1MOhm C1 = 4.7 µf R2 = 33kOhm C2 = 2.2 µf to 2.2µF C1 GND 100 nf 1 5 10 µf 16 14 (Top View) 6 Power supply decoupling capacitors (100 nf ceramic or polyester + 10 µf aluminum) should be placed as near as possible to the device (common design practice). The allows band limiting of the output rate response through the use of an external low pass filter (suggested) and/or high pass filter (optional) in addition to the embedded low pass filter (f t = 140 Hz). 4xOUTZ is OUTZ amplified outputs line, internally buffered to ensure low output impedance. If external high pass or low pass filtering is not applied it is mandatory to short-circuit pad 9 to pad 10 when amplified outputs are used. When only non-amplified output is used (OUTZ), it is suggested to set pad 9 to fixed reference voltage (Vref). When high pass filter is applied to not amplified output (OUTx), it is recommended to buffer the line before entering ADC for performance optimization. The IC includes a PLL (phase locked loop) circuit to synchronize driving and sensing interfaces. Capacitors and resistors must be added at the FILTVDD and VCONT pins (as shown in Figure 3) to implement a low-pass filter. Vref 8 4xOUTZ 13 9 C1 R1 HP PD ST Vref (TOP VIEW) DIRECTION OF THE DETECTABLE ANGULAR RATE R2 C2 Not amplified filtered output Z GND 8/12 Doc ID 15802 Rev 2

Application hints 4.1 Output response vs. rotation Figure 4. Output response vs. rotation +Ω z +Ω z Steady State position: 4xOUTZ = 1.23V OUTZ = 1.23V 4.2 Soldering information The LGA package is compliant with the ECOPACK, RoHS and Green standard. It is qualified for soldering heat resistance according to JEDEC J-STD-020C. Leave pin 1 indicator unconnected during soldering. Positive rotations as indicated by arrows increase output value over Zero rate level: +500 /sec --> 4xOUTZ = 1.23V + SoA*500 = 2.23V +500 /sec --> OUTZ = 1.23V + So*500 = 1.48V Land pattern and soldering recommendations are available at www.st.com. Doc ID 15802 Rev 2 9/12

Package information 5 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Figure 5. LGA-16: mechanical data and package dimensions A1 1.46 1.5 1.6 0.057 0.059 0.063 A2 1.33 0.052 A3 0.16 0.2 0.24 0.006 0.008 0.009 C 0.3 0.012 D1 4.85 5 5.15 0.191 0.197 0.203 E1 4.85 5 5.15 0.191 0.197 0.203 L 0.8 0.031 L1 3.2 0.126 M 1.6 0.062 M1 2.15 2.175 2.20 0.085 0.086 0.087 M2 1.625 0.064 N 2.175 0.086 N1 2.4 0.094 T1 0.8 0.031 T2 0.475 0.5 0.525 0.019 0.020 0.021 R 1.2 1.6 0.047 0.063 S 0.1 0.004 h 0.15 0.006 k 0.05 0.002 j 0.1 0.004 LGA-16 (5x5x1.5mm) Land Grid Array Package 7887555A 10/12 Doc ID 15802 Rev 2

Revision history 6 Revision history Table 6. Document revision history Date Revision Changes 04-Jun-2009 1 Initial release 06-Jul-2009 2 Small text changes to improve readability. Updated Table 4 Doc ID 15802 Rev 2 11/12

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