Credit Suisse European Technology Conference

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Transcription:

Credit Suisse European Technology Conference Franki D Hoore Director European Investor Relations May 12, 2010 / Slide 1

Safe Harbor "Safe Harbor" Statement under the US Private Securities Litigation Reform Act of 1995: the matters discussed in this document may include forward-looking statements, including statements made about our outlook, realization of backlog, IC unit demand, financial results, average selling price, gross margin and expenses. These forward looking statements are subject to risks and uncertainties including, but not limited to: economic conditions, product demand and semiconductor equipment industry capacity, worldwide demand and manufacturing capacity utilization for semiconductors (the principal product of our customer base), including the impact of general economic conditions on consumer confidence and demand for our customers products, competitive products and pricing, manufacturing efficiencies, new product development and customer acceptance of new products, ability to enforce patents and protect intellectual property rights, the risk of intellectual property litigation, availability of raw materials and critical manufacturing equipment, trade environment, changes in exchange rates and other risks indicated in the risk factors included in ASML s Annual Report on Form 20-F and other filings with the US Securities and Exchange Commission. / Slide 2

Agenda Business summary Lithography trends Outlook and summary / Slide 3

/ Slide 4 Business summary

Q1 results - highlights Net sales of 742 million, 34 systems shipped valued at 632 million, service revenue at 110 million Average selling price for new systems shipped is 25.8 million Gross Margin of 40.3% Shipped 17 immersion systems Booked 50 systems, valued at 1,004 million Backlog increased to 2,170 million, 85 systems including 58 immersion tools with ASP of 28.8 million for new tools Generated 41 million cash from operations / Slide 5

Total net sales M Net sales 4500 4000 3500 3000 2500 2000 1500 1000 500 0 1,543 526 370 329 611 616 318 453 2,465 2,529 785 548 533 3,582 1053 958 763 942 685 629 3,768 955 934 930 2,954 494 697 844 949 919 1,596 581 555 277 183 1000 2003 2004 2005 2006 2007 2008 2009 2010 742 ASML guidance for Q2 Q4 Q3 Q2 Q1 Numbers have been rounded for readers convenience. / Slide 6

Key financial trends 2009 2010 Consolidated statements of operations M Q1 09 Q2 09 Q3 09 Q4 09 Q1 10 Net Sales 184 277 555 581 742 Gross profit Gross margin % Income (loss) from operations Operating income % Net income (loss) Net income as a % of net sales 12 6.7% 34 12.5% 191 34.4% 220 38.0% 298 40.3% R&D 118 118 115 115 120 SG&A 40 40 37 37 41 (146) -79.7% (117) -63.8% (124) -44.7% (104) -37.6% 39 6.9% 20 3.6% 68 11.8% 50 8.7% 137 18.5% 107 14.5% Units sold 11 10 24 25 34 ASP new systems 13.8 31.1 23.4 19.7 25.8 Net bookings value 207 394 777 956 1,004 Numbers have been rounded for readers convenience. Numbers have been adjusted for consolidation of variable interest entity / Slide 7

Backlog: value and litho units 2500 2000 1500 1000 500 0 Jan 04 Jul 04 Jan 05 Jul 05 Jan 06 Jul 06 Jan 07 Jul 07 Jan 08 Jul 08 Jan 09 Jul 09 Jan 10 Backlog value Systems / Slide 8 300 250 200 150 100 50 0 Backlog value M Backlog units

Backlog in value per March 28, 2010 Total value M 2,170 Technology 51% NXT 38% XT End-use Memory 75% IDM 14% Foundry 11% ArF immersion 89% 9% i-line 1% ArF 1% Taiwan 31% USA 19% Region Korea 23% Japan 11% Singapore 6% Europe 3% China 7% Numbers have been rounded for readers convenience / Slide 9

Sector growth summary DRAM Significant new immersion lithography tools required as immersion layers increase from node to node which will continue in 2011 DRAM unit growth forecasted by analysts at 16%, bit growth at 50% primarily met by shrink NAND Immersion demand ramping in Q3 and Q4 due to requirements of new nodes in addition to initial wafer capacity expansion NAND unit growth forecasted by analysts at 20%, bit growth at 75% primarily met by shrink LOGIC Immersion capacity ramping due to increased number of immersion layers required by 40 nm processing Logic IC unit growth expected at 13% by analysts / Slide 10

TWINSCAN NXT moving to volume chip manufacturing TWINSCAN NXTs have been shipped to several customers for volume semiconductor production in Q2 2010 Proven industry leading performance of CD imaging uniformity well below 1 nm and overlay of less than 2 nm Booked 14 systems in Q1 Backlog 28 systems end Q1 Shipped 9 systems to date TWINSCAN NXT shipment level moving to 11 systems in Q2 and increasing in following quarters / Slide 11

/ Slide 12 Lithography trends

IC segment roadmaps follow each a different pace Lithography supports shrink roadmap 200 Logic Resolution/half pitch, "Shrink" [nm] 100 80 60 50 40 30 AT:1200 XT:1400 XT:1700i 1 year/node XT:1900i 18 months/node NXT:1950i DRAM NAND NXE:3100 2 years/node ARF ARFi 20 NXE:3300 EUV 02 03 04 05 06 07 08 09 10 11 12 13 14 15 *Average customer input, (1/10) / Slide 13 Year of production start*

Customer lithography roadmap by sector DRAM Node = HP [nm] YEAR 2007 65 2008 55 2009 52 2010 45 2011 38 2012 32 2013 28 2014 25 2015 22 NAND Node = HP [nm] 55 42 35 28 22 20 18 15 12 MPU Node / HP [nm] 45 / 80 32 / 60 22 / 40 15 / 30 11 / 22 LOGIC Node / HP [nm] 45 / 70 40 / 70 32 / 50 28 / 50 22 / 35 DPT Mainstream die density 1 Gb by 2015 Mainstream die density 512 Gb by 2015 Single exposure Double patterning Spacer Double patterning LELE EUV Source: ASML Marketing (4/10) / Slide 14

DRAM industry wafer production capacity 2 concurrent node transitions in 2010 Wafer Starts [300 mm equiv. KWSM] 2000 1800 1600 1400 1200 1000 800 600 400 200 0 DRAM WW Monthly Wafer Production Split by Node 1XX nm -200mm 9x nm -200 mm 8x nm -200 mm 9x nm 8x nm 6x nm 5x nm 4x nm 3x nm 2x nm * Gartner DRAM bit forecast (3/10): 2009 2010 2011 Mio GB (new): 1348 2123 3129 YoY gr.: +24% +57% +47% Q1 08 Q2 08 Q3 08 Q4 08 Q1 09 Q2 09 Q3 09 Q4 09 Q1 10 Q2 10 Q3 10 Q4 10 Source: ASML (4/10) / Slide 15

NAND industry wafer production capacity 2 concurrent node transitions in 2010 1400 NAND WW Monthly Wafer Starts Split by Node and Utilization 7x-200 mm 6x-200 mm 5x-200 mm 7x nm 6x nm Wafer Starts [300 mm equiv. KWSM] 1200 1000 800 600 400 200 0 5x nm 4x nm 3x nm 2x nm 1x nm * Gartner NAND bit forecast (3/10): Q1 08 Q2 08 Q3 08 Q4 08 Q1 09 Q2 09 Q3 09 Q4 09 Q1 10 Q2 10 Q3 10 Q4 10 2009 2010 2011 Mio GB (new): 6467 10718 19680 YoY gr.: +43% +66% +84% Source: ASML (4/10) / Slide 16

DRAM bit sufficiency analysis: Continued mild undersupply throughout 2010 DRAM demand & supply [Mio. GB] 700 600 500 400 300 200 100 * Gartner DRAM bit forecast (3/10): 2009 2010 2011 Mio GB (new): 1348 2123 3129 YoY gr.: +24% +57% +47% ASML DRAM Sufficiency Model DRAM bit supply (ASML) [Mio. GB] DRAM bit demand (Gartner) [Mio. GB] DRAM Sufficiency 0 1Q08 2Q08 3Q08 4Q08 1Q09 2Q09 3Q09 4Q09 1Q10 2Q10 3Q10 4Q10 200% 180% 160% 140% 120% 100% 80% 60% 40% 20% DRAM Sufficiency [%] 0% Sources. Bit Supply: ASML (4/10). Bit Demand: Gartner (3/10) / Slide 17

NAND bit sufficiency analysis: Demand / supply in balance in 2010 NAND demand & supply [Mio. GB] 4,000 3,500 3,000 2,500 2,000 1,500 1,000 500 * Gartner NAND bit forecast (3/10): 2009 2010 2011 Mio GB (new): 6467 10718 19680 YoY gr.: +43% +66% +84% ASML NAND Sufficiency Model NAND bit supply (ASML) [Mio. GB] NAND bit demand (Gartner) [Mio. GB] NAND Sufficiency 0 1Q08 2Q08 3Q08 4Q08 1Q09 2Q09 3Q09 4Q09 1Q10 2Q10 3Q10 4Q10 200% 175% 150% 125% 100% 75% 50% 25% NAND Sufficiency [%] 0% Sources. Bit Supply: ASML (4/10). Bit Demand: Gartner (03/10) / Slide 18

WaferOutput[30mequiv.KWSM] By end 2010 memory output capacity is estimated to be more than 10% below peak capacity of 2008 Starts / Month [300mm equiv. KWspM] 2600 2400 2200 2000 1800 1600 1400 1200 1000 800 600 400 200 0 Memory WW wafer output split by wafer size and node Strong Capacity Add Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Source: ASML Marketing (9/09) / Slide 19 6x & 5x Conversion 300mm utilisation & fab closures 200mm retirement 2007 2008 2009 2010 300mm including(7x nm- 2x nm) 200mm (including 9xnm and 8x nm) Estimate Immersion for 5x, 4x & 3x conversion

ASML Systems: 300mm Memory Average number of systems required for new fab 3xnm NAND 4xnm DRAM ArF ArF ArF ArF ArF ArF 32 litho layers 37 litho layers 120k wafers/month 100k wafers/month / Slide 20

/ Slide 21 Outlook and summary

Q2 2010 outlook Net sales expected around 1 billion Gross margin expected of about 42% in Q2 R&D is expected at 125 million net of credits SG&A is expected at 42 million Q2 bookings are expected at similar level as in Q1 2010 We expect this cycle to be sustained by the normal technology transitions of the early adopters, the subsequent technology conversions by second tier DRAM makers, the next Flash memory upgrade cycle anticipated for Q2 2010, as well as Foundry s structural capacity build at advanced nodes At current rate, WW litho systems sold in 2010 will be adding approx. 15% IC unit production capacity to the market. This controlled capacity increase supports the possibility of sustained growth in 2011 if IC unit growth continues per historical trend ASML on track to surpass our 2007 revenue peak of 3.8 billion in 2010 / Slide 22

/ Slide 23