Proceedings of the Applied Telecommunication Symposium (part of Advanced Simulation Technologies Conference) Seattle, Washington, USA, April 22 26, 21 Virtual Circuit Blocking Probabilities in an ATM Banyan Network with b b Switching Elements Hongyuan Shi and Harish Sethu {hyshi@io.ece.drexel.edu, sethu@ece.drexel.edu} Department of Electrical and Computer Engineering Drexel University 3141 Chestnut Street, Philadelphia, PA 1914-2875 Abstract This paper presents the trade-offs that exist between the blocking probability, the size of the switching elements, the offered load and the link capacities in an ATM-based Banyan multistage interconnection network for QoS-sensitive applications. We present a quasi-analytical study which indicates that, as the link capacity between switching elements is increased, the blocking probability reduces exponentially. We show that, in contrast to what is generally believed, larger switching elements are often, but not always the best design choice. Relevant design recommendations that arise from these results are discussed. The conclusions of this paper are also applicable in non-atm contexts such as in circuit-switched networks with link-dilated topologies, or photonic switching networks using WDM. Keywords ATM, blocking performance, Banyan networks, non-blocking networks, multistage interconnection networks. 1 INTRODUCTION Asynchronous Transfer Mode (ATM) is a connectionoriented data transfer technology, in which communication between any two end-points of the network is accomplished through the establishment of a virtual circuit that allows variable-rate full-duplex transfer of data between them. Each distinct data transfer application uses a separate virtual circuit for the transmission of cells between the communicating entities. For applications such as telephony, achieving good availability of service is a critical component of the overall design objective. For such applications, therefore, a primary goal is to max- This work was supported in part by U.S. Air Force Contract F362--2-51 imize the number of virtual circuits that can be established in the network in a manner that satisfies the performance and quality-of-service requirements of each connection. At the time a request is made for a connection, the network control has to determine if there is a route available with sufficient capacity for an appropriate level of quality of service required for the requested communication. If a connection cannot be established, we say that the request for the virtual circuit is blocked. This paper presents a quasi-analytic study of the dependence of the virtual circuit blocking probability on the sizes of the switching elements, the offered load and the capacity of the physical links in an ATM-based Banyan network. The blocking behavior and the conditions for nonblocking in ATM-based multistage interconnection networks have been analyzed for Clos, Benes and Cantor topologies [3, 5, 6]. The results of these studies validate the widely held belief that the larger the switching element used to construct the network, the smaller the blocking probability. This paper shows that, in Banyan networks, a larger switching element is often, but not always the better design choice as far as blocking probabilities are concerned. Relevant design recommendations that arise from these results are discussed. Section 2 presents the problem statement and derives the minimum link capacity required in an ATM Banyan network to ensure a zero blocking probability. Section 3 describes the quasi-analytic simulation technique, first used recently in an analysis of blocking performance of photonic switching networks [1]. Section 4 presents our simulation results with interpretations. Finally, Section 5 concludes the paper with a brief discussion of the relevance of this work to other contexts in which switchbased multistage interconnection networks are used.
networks used in videoservers for video-on-demand applications. The following theorem, a special case of the result in [3], specifies the link capacity, C, required to ensure that the network is non-blocking. Theorem 1 Consider an N N Banyan network using b b switching elements, and physical links of capacity equivalent to C virtual circuits. The network is nonblocking if and only if C K, where, 1 2 3 4 5 6 7 (a) (c) Figure 1: 16 16 Banyan with (a) 2 2 and (b) 4 4 switching elements; (c) A subset of the 128 128 Banyan network 2 REQUIREMENT FOR ZERO BLOCKING Given b b switching elements, one can build an N N network using the Banyan topology, if N = b s, where s is the number of stages in the network. For purposes of illustration, Figures 1(a) and (b) show a 16 16 Banyan topology using 2 2 and 4 4 switching elements, respectively. In this paper, we use the baseline network as the representative banyan topology. We define capacity of a link as the number of virtual circuits that can be simultaneously supported on the physical link. This capacity is a function of the physical bandwidth that the link can support and the bandwidth requirements of each virtual circuit. Let C be the capacity of the physical links in an ATM network. When a switching element receives a virtual connection setup request over a certain physical link, it has to ensure that no more than C circuits have already been established. If C circuits are already established, the connection request is said to be blocked. We assume that each inlet link or outlet link can support only one connection at any given instant of time, which is the case in many implementations of ATM-based LANs and also in ATM-based (b) 1 2 3 4 5 6 7 K = { N, if logb N is even. Nb, if log b N is odd. (1) Proof: A given physical link in the network will never block a connection request, if it is able to support all the virtual circuits that may possibly use this link. Define the weight of a link as the maximum number of connections that may use this link at any given instant. The minimum link capacity required for the non-blocking property is the largest weight of all the links in the network. When log b N is even, it is easily observed that links with the largest weights are those between the middle two stages of the network. When log b N is odd, the links with the largest weight are the ones connected to the middle stage switches. For example, the links shown with thicker lines in Figure 1(c) are two of the links with the largest weights in a 128 128 Banyan network. This figure shows only the switches and links in the paths that may use these two links. Since only one connection can be established from an inlet to any outlet, the weight of a link is the smaller of the total number of inlets and the total number of outlets that can be reached from the link. It is obvious from this figure that the weight of the left one of the two links is just the total number of inlets in the network that can be reached from this link. Similarly, the weight of the right one of these two links is the total number of outlets of the network that can be reached from this link. Consider a tree with its root as one of the links with the largest weight in the network. Assume, without loss of generality, that the number of inlets reachable from this link is less than or equal to the number of outlets reachable from this link. Let the leaves of this tree be the inlets of the network that can be reached from this link. Let all the intermediate nodes in the network be the links on the paths between the inlets of the network and the link with the largest weight. Clearly, this is a tree in which the root and all the intermediate nodes have exactly b children. The partial network in Figure 1(c) provides a pictorial analogy with the tree for b = 2 and N = 128. Now, the minimum capacity required for the non-blocking property is the number of leaves in this tree.
Table 1: Capacity Requirements for a Nonblocking N N Network Using b b Switching Elements b N 8 16 32 64 128 256 512 124 2 2 4 4 8 8 16 16 32 4-4 - 4-16 - 16 8 - - - 8 - - 8-16 - - - - - 16 - - 32 - - - - - - - 32 Not counting the root of the tree, the total number of levels of the tree is (log b N)/2 when log b N is even, and (log b N 1)/2 when log b N is odd. When log b N is even, therefore, the number of leaves in the tree is b (log b N)/2 = N. When log b N is odd, the number of leaves is b (log b N 1)/2 = N/b. Table 1 lists the minimum link capacities required for the non-blocking property for various values of N and b. Note from the table, that a 64 64 network with link capacities equivalent to 4 virtual circuits, has zero blocking probability with 4 4 switching elements, but a non-zero blocking probability with 8 8 switching elements. A similar phenomenon of smaller switching elements leading to a lower blocking probability is observed in the 124 124 network with 4 4 switching elements. In the above theorem, we have assumed the same link capacity at each stage of the network. This is because, in order to achieve cost-effectiveness with the least possible number of different parts, most commercial switching systems use identical switching elements and, therefore, also have the same link capacity at each stage. A few specific design recommendations are easily derived based on the entries in Table 1. For example, when the link capacities are equivalent to 4 virtual circuits, a 64 64 network is best designed using 4 4 switching elements rather than 8 8 switching elements. When the link capacities are smaller, the size of switching elements to use is not quite obvious and can only be determined based on evaluations of blocking probabilities described in the next two sections. In the vast majority of cases, use of larger switching elements is a better design choice since it improves the throughput and thus the capacity of the links. However, as can be observed from Table 1 for 64 64 and 124 124 networks, a larger switching element as the building block is not always the better choice. 3 METHODOLOGY In this section, we describe the quasi-analytic simulation technique, first used in [1], to evaluate the blocking probabilities. We model connection setup requests by a Poisson process with an arrival rate of λ from each source. The utilization factor, ρ, of the network is given by (λ/µ)(1 P B ), where µ is the service rate, and P B is the blocking probability of the network. In our study, we use a normalized service rate equal to 1, i.e., µ = 1. The offered load, λ/µ, therefore is equal to λ. For an N N network, P B = N 1 k= P B k P k where, P k is the probability that k virtual circuits are established in the network, and P B k is the conditional probability that a connection is blocked while k virtual circuits are already established. The quantity P k is given by, ( ) N P k = ρ k (1 ρ) N k, k < N k Random permutations of source-destination pairs are generated in random order. Two counters are maintained for each value of k, k < N. The pass counter, p k is incremented whenever a (k + 1)-th connection is established, and the reject counter, r k is incremented whenever a (k +1)-th connection request is rejected (i.e., blocked). The following equation then gives us the conditional blocking probability given k connections are already established. P B k = r k p k 1 As described in [1], P B and ρ can now be computed iteratively starting with an assumed value of ρ. 4 SIMULATION RESULTS This section presents simulation results using a 64 64 interconnection network in a Banyan topology, using 2 2, 4 4 and 8 8 switching elements. Figure 2(a) plots the blocking probabilities in this network against the normalized offered load. This figure is plotted assuming that each physical link between switching elements can support no more than 2 virtual circuits. As can be observed from this figure, use of larger switching elements, in this case, reduces the blocking probabilities at all offered loads. Figure 2(b) plots the blocking probabilities
Blocking Probability Blocking Probability 1 1 1 1 2 (a) 1 3.2.4.6.8 1 Normalized Offered Load 1 1 1 2 1 3 1 4 (b) 1 5.2.4.6.8 1 Normalized Offered Load Figure 2: (a) P B vs. offered load, C = 2; (b) P B vs. offered load, C = 3. for the same 64 64 Banyan network, but assuming link capacities of 3 virtual circuits per link. This figure is different from Figure 2(a) with respect to the relative performances of networks using 4 4 and 8 8 switching elements. The blocking probability using 4 4 switches, as indicated in this figure, is slightly better than that with 8 8 switch chips. This further illustrates the fact that the use of larger size switching elements does not necessarily lead to an improvement in the blocking probability. Figure 3 plots the blocking probabilities for the same 64 64 Banyan network, against the link capacity, at an offered load of.7. Recall that we measure link capacity by the number of virtual circuits that can be supported on the link. As can be observed from Figure 3, the blocking probabilities decrease exponentially as the link capacity increases. For example, a 64 64 network using 2 2 switches with link capacities equal to 5 virtual circuits has a blocking probability about 34 times as small as with link capacities equal to 4 virtual circuits. This fig- Blocking Probability 1 1 2 1 4 1 6 1 8 Blocking probability of a 64 x 64 network based on is, with 4 VCs per link. 2 3 4 5 6 Number of VCs per link Figure 3: P B vs. link capacity, λ/µ =.7. ure suggests that increasing link capacities, as opposed to using larger switching elements, is almost always a better design choice (except when the switch size is increased to b b and log b N is odd). This is simply because using switch architectures that can be implemented in today s VLSI chips, high throughputs of 95% or more can already be achieved with 2 2 ATM switching elements [7]. A larger switching element therefore can only lead to a small increase in the throughput, resulting in only a small increase in the link capacity. 5 CONCLUDING REMARKS This paper shows that an N N ATM Banyan network using b b switching elements is non-blocking if and only if each physical link between the switching elements can support K virtual circuits, where K = N if log b N is even, and N/b otherwise. In blocking networks, using a recently developed quasi-analytic method, we have quantified the trade-offs between the blocking probability, the size of switching elements, the offered load and the link capacities for a representative 64 64 network. These results can be used to develop design recommendations on the bandwidth of the links and the size of switching elements to use in the design of an ATM-based Banyan network. The most interesting aspect of these trade-offs is that the use of larger switching elements in the design of a network does not always guarantee a lower blocking probability. Finally, the work presented in this paper is also relevant in some non-atm contexts. For example, each link with capacity C may be thought of as multiple links of capacity 1. Thus, the results of this paper can also
be applied to circuit-switched networks with link-dilated topologies. In addition, these results are also valid in the analysis of blocking probabilities in optical Banyanbased networks using Wavelength Division Multiplexing (WDM) and switching devices that include wavelength converters. References [1] M. M. Vaez and C.-T. Lea, Blocking performance with crosstalk consideration of the photonic switching networks based on electro-optical directional couplers, Journal of Lightwave Technology, vol. 17, no. 3, pp. 381 387, March 1999. [2] C.-T. Lea, Multi-log 2 N networks and their applications in high-speed electronic and photonic switching systems, IEEE Transactions on Communications, vol. 38, no. 1, pp. 174 1749, October 199. [3] R. Melen and J. S. Turner, Nonblocking Networks for Fast Packet Switching, Proceedings of IEEE INFOCOM, vol.2, 1989. [4] C. P. Kruskal and M. Snir, The performance of multistage interconnection networks for multiprocessors, IEEE Transactions on Computers, vol. 82, no. 12, pp. 191 198, December 1983. [5] S. C. Liew, M.-H. Ng and C. W. Chan, Blocking and Nonblocking Multirate Clos Switching Networks, IEEE/ACM Transactions of Networking, vol. 6, no. 3, pp. 37 318, June 1998. [6] E. Valdimarsson, Blocking in Multirate Interconnection Networks, IEEE/ACM Transactions on Communications, vol. 42, no. 2/3/4, pp. 228 235, February/March/April 1994. [7] M. Katevenis, D. Serpanos and E. Spyridakis, Credit-Flow-Controlled ATM for MP Interconnection: The ATLAS I Single-Chip ATM Switch, Proceedings of 4th Int l Symp. High Performance Computer Architecture, 1998. [8] A. Pattavina, Switching Theory, John Wiley & Sons, Inc., New York, NY, 1998.