Unsigned Binary Integers

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Unsigned Binary Integers Given an n-bit number x x n 1 n 2 1 0 n 12 xn 22 x12 x02 Range: 0 to +2 n 1 Example 2.4 Signed and Unsigned Numbers 0000 0000 0000 0000 0000 0000 0000 1011 2 = 0 + + 1 2 3 + 0 2 2 +1 2 1 +1 2 0 = 0 + + 8 + 0 + 2 + 1 = 11 10 Using bits 0 to +4,294,967,295 Chapter 2 Instructions: Language of the Computer 28 2s-Complement Signed Integers Given an n-bit number x x n 1 n 2 1 0 n 12 xn 22 x12 x02 Range: 2 n 1 to +2 n 1 1 Example 1111 1111 1111 1111 1111 1111 1111 1100 2 = 1 2 31 + 1 2 30 + + 1 2 2 +0 2 1 +0 2 0 = 2,147,483,648 + 2,147,483,644 = 4 10 Using bits 2,147,483,648 to +2,147,483,647 Chapter 2 Instructions: Language of the Computer 29 2s-Complement Signed Integers Bit 31 is sign bit 1 for negative numbers 0 for non-negative numbers ( 2 n 1 ) can t be represented Non-negative numbers have the same unsigned and 2s-complement representation Some specific numbers 0: 0000 0000 0000 1: 1111 1111 1111 Most-negative: 1000 0000 0000 Most-positive: 0111 1111 1111 Chapter 2 Instructions: Language of the Computer 30 Chapter 2 Instructions: Language of the Computer 1

Signed Negation Complement and add 1 Complement means 1 0, 0 1 x 2 x 1111...111 1 x 1 x Example: negate +2 +2 = 0000 0000 0010 2 2 = 1111 1111 1101 2 + 1 = 1111 1111 1110 2 Chapter 2 Instructions: Language of the Computer 31 2 s Complement complement all the bits 0101 and add a 1 0110 (6) 2 sc binary decimal -2 3 = 1000-8 -(2 3-1) = 1001-7 1010-6 1011-5 1100-4 1101-3 1110-2 1111-1 0000 0 0001 1 0010 2 0011 3 0100 4 0101 5 0110 6 2 3-1 = 0111 7 Chapter 2 Instructions: Language of the Computer Sign Extension Representing a number using more bits Preserve the numeric value In MIPS instruction set addi: extend immediate value lb, lh: extend loaded byte/halfword beq, bne: extend the displacement Replicate the sign bit to the left c.f. unsigned values: extend with 0s Examples: 8-bit to 16-bit +2: 0000 0010 => 0000 0000 0000 0010 2: 1111 1110 => 1111 1111 1111 1110 Chapter 2 Instructions: Language of the Computer 33 Chapter 2 Instructions: Language of the Computer 2

Representing Instructions Instructions are encoded in binary Called machine code MIPS instructions Encoded as -bit instruction words Small number of formats encoding operation code (opcode), register numbers, Regularity! Register numbers $t0 $t7 are reg s 8 15 $t8 $t9 are reg s 24 25 $s0 $s7 are reg s 16 23 2.5 Representing Instructions in the Computer Chapter 2 Instructions: Language of the Computer 34 MIPS R-format Instructions op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits Instruction fields op: operation code (opcode) rs: first source register number rt: second source register number rd: destination register number shamt: shift amount (00000 for now) funct: function code (extends opcode, selects the specific variant of the operation specified in the opcode field) Chapter 2 Instructions: Language of the Computer 35 R-format Example op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits add $t0, $s1, $s2 special $s1 $s2 $t0 0 add 0 17 18 8 0 ten 000000 10001 10010 01000 00000 100000 00000010001100100100000000100000 2 = 024020 16 Chapter 2 Instructions: Language of the Computer 36 Chapter 2 Instructions: Language of the Computer 3

Hexadecimal Base 16 Compact representation of bit strings 4 bits per hex digit 0 0000 4 0100 8 1000 c 1100 1 0001 5 0101 9 1001 d 1101 2 0010 6 0110 a 1010 e 1110 3 0011 7 0111 b 1011 f 1111 Example: eca8 6420 1110 1100 1010 1000 0110 0100 0010 0000 Chapter 2 Instructions: Language of the Computer 37 MIPS I-format Instructions op rs rt constant or address 6 bits 5 bits 5 bits 16 bits Immediate arithmetic and load/store instructions rt: destination -- rs source register number Constant: 2 15 to +2 15 1 Address: offset added to base address in rs Design Principle 4: Good design demands good compromises Different formats complicate decoding, but allow -bit instructions uniformly Keep formats as similar as possible Chapter 2 Instructions: Language of the Computer 38 MIPS I-format Instructions op rs rt constant or address 6 bits 5 bits 5 bits 16 bits addi $t0, $s1, 10 addi $t0 $s1 constant 8 8 17 10 001000 10000 10001 0000000000001010 Chapter 2 Instructions: Language of the Computer 39 Chapter 2 Instructions: Language of the Computer 4

Stored Program Computers The BIG Picture Instructions represented in binary, just like data Instructions and data stored in memory Programs can operate on programs e.g., compilers, linkers, Binary compatibility allows compiled programs to work on different computers Standardized ISAs Chapter 2 Instructions: Language of the Computer 40 Logical Operations Instructions for bitwise manipulation Operation C Java MIPS Shift left << << sll Shift right >> >>> srl Bitwise AND & & and, andi Bitwise OR or, ori Bitwise NOT ~ ~ nor 2.6 Logical Operations Useful for extracting and inserting groups of bits in a word Chapter 2 Instructions: Language of the Computer 41 Shift Operations op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits shamt: how many positions to shift Shift left logical Shift left and fill with 0 bits sll by i bits multiplies by 2 i Shift right logical Shift right and fill with 0 bits srl by i bits divides by 2 i (unsigned only) Chapter 2 Instructions: Language of the Computer 42 Chapter 2 Instructions: Language of the Computer 5

AND Operations Useful to mask bits in a word Select some bits, clear others to 0 and $t0, $t1, $t2 $t2 $t1 $t0 0000 0000 0000 0000 0000 1101 1100 0000 0000 0000 0000 0000 0011 1100 0000 0000 0000 0000 0000 0000 0000 1100 0000 0000 Chapter 2 Instructions: Language of the Computer 43 OR Operations Useful to include bits in a word Set some bits to 1, leave others unchanged or $t0, $t1, $t2 $t2 $t1 $t0 0000 0000 0000 0000 0000 1101 1100 0000 0000 0000 0000 0000 0011 1100 0000 0000 0000 0000 0000 0000 0011 1101 1100 0000 Chapter 2 Instructions: Language of the Computer 44 NOT Operations Useful to invert bits in a word Change 0 to 1, and 1 to 0 MIPS has NOR 3-operand instruction a NOR b == NOT ( a OR b ) nor $t0, $t1, $zero Register 0: always read as zero $zero 0000 0000 0000 0000 0000 0000 0000 0000 $t1 0000 0000 0000 0000 0011 1100 0000 0000 $t0 1111 1111 1111 1111 1100 0011 1111 1111 Chapter 2 Instructions: Language of the Computer 45 Chapter 2 Instructions: Language of the Computer 6

Conditional Operations Branch to a labeled instruction if a condition is true Otherwise, continue sequentially beq rs, rt, L1 if (rs == rt) branch to instruction labeled L1; bne rs, rt, L1 if (rs!= rt) branch to instruction labeled L1; j L1 unconditional jump to instruction labeled L1 2.7 Instructions for Making Decisions Chapter 2 Instructions: Language of the Computer 46 Conditional Operations beq $s0, $s1, L1 bne $s0, $s1, L1 Instruction format How to specify L1 op rs rt constant or address 6 bits 5 bits 5 bits 16 bits 5 16 17 L1 4 16 17 L1 Chapter 2 Instructions: Language of the Computer 47 Specifying Branch Destination We could specify the memory location, but that will require bits??? Can use a base register, the base register is PC Limits jumps to -2 15 2 15-1 In reality, 00 is appended to the immediate thus instructions (words not bytes) Chapter 2 Instructions: Language of the Computer 48 Chapter 2 Instructions: Language of the Computer 7

Branch destination from the low order 16 bits of the branch instruction 16 sign-extend offset 00 PC 4 Add branch dst Add address? Chapter 2 Instructions: Language of the Computer 49 Jump instruction J Label #go to label op 6 bits 26-bit address 2 xxxx..xx Again, concatenating 00 increase the effective number to 28 + the left-most 4 bits of the PC (added to the PC) Chapter 2 Instructions: Language of the Computer 50 Jump instruction from the low order 26 bits of the jump instruction 26 00 4 PC Chapter 2 Instructions: Language of the Computer 51 Chapter 2 Instructions: Language of the Computer 8