INF 101 Fundamental Information Technology Computer Organization Assistant Prof. Dr. Turgay ĐBRĐKÇĐ Course slides are adapted from slides provided by Addison-Wesley Computing Fundamentals of Information Technology 2 OBJECTIVES After reading this chapter, the reader should be able to: Distinguish between the three components of a computer hardware. List the functionality of each component. Understand memory addressing and calculate the number of bytes for a specified purpose. Distinguish between different types of memories. Understand how each input/output device works. Continued on the next slide Fundamentals of Information Technology 3 OBJECTIVES (continued) Understand the systems used to connect different components together. Understand the addressing system for input/output devices. Understand the program execution and machine cycles. Distinguish between programmed I/O, interrupt-driven I/O and direct memory access (DMA). Understand the two major architectures used to define the instruction sets of a computer: CISC and RISC. Fundamentals of Information Technology 4 Figure 5-1 Computer hardware (subsystems) 5.1 CENTRAL PROCESSING UNIT (CPU) Fundamentals of Information Technology 5 Fundamentals of Information Technology 6
Figure 5-2 CPU Control Unit 1. Transfers data from memory to register 2. Tells ALU when and which register has data 3. Activates logic circuits in ALU 4. Tells ALU which register to put result in 5. Transfers data from register to memory (if asked) Speed is usually measured in MIPs (millions of instructions per second) Fundamentals of Information Technology 7 Fundamentals of Information Technology 8 Registers Similar to memory cells, but with a lot faster access time Located as part of the CPU There is no bus transfer to access the register Usually limited number of registers CPU has a limited capacity for components, therefore cannot pack so many registers Usually 8, 16, or more (depending on the architecture) Registers Temporary holding place for data being manipulated by the CPU and ALU operations In most architectures, ALU is not allowed to manipulate data directly in memory cells Data in memory needs to be moved to a register first There are two types of registers: Special purpose (Program Counter - PC, Instruction Register - IR) General purpose (e.g., R0, R1, R2, ) Fundamentals of Information Technology 9 Fundamentals of Information Technology 10 Table 5.1 Memory units 5.2 MAIN MEMORY Unit ------------ kilobyte megabyte gigabyte terabyte petabyte exabyte Exact Number of bytes ------------------------ 2 10 bytes 2 20 bytes 2 30 bytes 2 40 bytes 2 50 bytes 2 60 bytes Approximation ------------ 10 3 bytes 10 6 bytes 10 9 bytes 10 12 bytes 10 15 bytes 10 18 bytes Fundamentals of Information Technology 11 Fundamentals of Information Technology 12
Main memory Note: Memory addresses are defined using unsigned binary integers. Fundamentals of Information Technology 13 Fundamentals of Information Technology 14 Example 1 A computer has 32 MB (megabytes) of memory. How many bits are needed to address any single byte in memory? Solution The memory address space is 32 MB, or 2 25 (2 5 x 2 20 ). This means you need log 2 2 25 or 25 bits, to address each byte. Example 2 A computer has 128 MB of memory. Each word in this computer is 8 bytes. How many bits are needed to address any single word in memory? Solution The memory address space is 128 MB, which means 2 27. However, each word is 8 (2 3 ) bytes, which means that you have 2 24 words. This means you need log 2 2 24 or 24 bits, to address each word. Fundamentals of Information Technology 15 Fundamentals of Information Technology 16 Memory Types RAM (Random access memory): SRAM (Static RAM) (flip-flop gates) DRAM (Dynamic RAM) ROM (Read only memory) PROM (programmable) EPROM (erasable programmable) EEPROM (electronically erasable programmable) Figure 5-4 Memory hierarchy Fundamentals of Information Technology 17 Fundamentals of Information Technology 18
Cache 5.3 INPUT / OUTPUT Fundamentals of Information Technology 19 Fundamentals of Information Technology 20 Arrangement of Memory Cells Mass Storage Is byte storage outside of the circuitry? On-line: no human intervention required for machine to access the storage Off-line: someone has to make the storage media available Mass storage is usually mechanical (moving parts), slower than memory Fundamentals of Information Technology 21 Fundamentals of Information Technology 22 Magnetic Disk Mass Storage Disk Layout Hard disk, fastest, size usually measured in gigabytes Random access is fast Tracks have sectors; if multiple platters are on same shaft, all tracks at same distance from shaft, constitute a cylinder Seek time, rotation delay (latency), access time, transfer rate Fundamentals of Information Technology 23 Fundamentals of Information Technology 24
CR/ROM Mass Storage CD-ROM, moderate speed About 650 megabytes (650,000,000) DVD extends technology to about 5 gigabytes (5,000,000,000 bytes) Originally developed for audio and video Best for software distribution, not very fast for random access Note for audio CDs: Sectors closer to edge contain more data than the ones on the inner tracks Flash Disk Layout USB is a serial bus standard to interface devices. USB can connect computer peripherals such as mouse devices,keyboards, PDAs,game pads and joysticks, scanners, printers, digital cameras and flash drives. Fundamentals of Information Technology 25 Fundamentals of Information Technology 26 CD-ROM Layout Table 5.3 DVD capacities Feature --------------------------------- single-sided, single-layer single-sided, dual-layer double-sided, single-layer double-sided, dual-layer Capacity ------------ 4.7 GB 8.5 GB 9.4 GB 17 GB Fundamentals of Information Technology 27 Fundamentals of Information Technology 28 Connecting CPU and memory using three buses 5.4 SUBSYSTEM INTERCONNECTION Fundamentals of Information Technology 29 Fundamentals of Information Technology 30
Bus Connecting I/O devices to the buses Connects CPU, memory, disk, and other components CPU can access data through the bus by specifying the memory cell address Usually 16 or 32 bits wide (parallel bit transfer, not serial one-at-a-time) Bus Speed (bits/sec) may differ from CPU speed Some architectures support multiple buses Fundamentals of Information Technology 31 Fundamentals of Information Technology 32 SCSI controller (Small Computer System Interface) FireWire controller-(ieee 1394) Daisy Chain Fundamentals of Information Technology 33 Fundamentals of Information Technology 34 USB controller- (Universal Serial Bus) Isolated I/O addressing Fundamentals of Information Technology 35 Fundamentals of Information Technology 36
Memory-mapped I/O addressing 5.5 PROGRAM EXECUTION Fundamentals of Information Technology 37 Fundamentals of Information Technology 38 Stored-Program Concept Von-Neumann machine Program is in memory cells like data Control unit extracts instructions from memory, decodes, executes Machine language is in bit patterns Programs vs. Data There is no difference in appearance between programs and data Both are stored as 0 s and 1 s Both are housed in memory Who keeps track of what is what? Answer: you (the programmer) must Fundamentals of Information Technology 39 Fundamentals of Information Technology 40 Steps of a cycle Program Execution Control Unit handles it Program Counter contains memory cell address of next instruction Instruction Register contains the current instruction (the instruction now being executed) Fundamentals of Information Technology 41 Fundamentals of Information Technology 42
Machine Cycle Machine Cycle Fetch Bring next instruction from memory to CU Increment the program counter (depending on how many bytes the instruction has) Decode Interpret instruction in instruction register Execute Activate appropriate circuitry for instruction Fundamentals of Information Technology 43 Fundamentals of Information Technology 44 Machine Cycle Timing Controlled by an oscillator called clock Clock ticks at a very fast rate (such as 1.8GHz) Circuits in CU that actually Fetch, Decode, Execute are triggered by clock Each instruction execution might take one or more clock cycles to complete Depends on how complicated the instruction is General Program Startup Program counter is initialized to 0 (points to first memory cell as place to get next instruction) Fetch brings instruction in cell 0 (the one that is currently referenced by the program Counter) to instruction register in CU Program execution starts and continues until a termination instruction (such as halt) is reached Fundamentals of Information Technology 45 Fundamentals of Information Technology 46 How to Handle Jump (Branch/Go/Skip) Instruction? Branching instruction is interesting Basic form: jmp address All it does is put the address contained in the instruction into the Program Counter On next machine cycle, Fetch gets the instruction in the cell that the Program Counter points to Contents of memory and register before execution Fundamentals of Information Technology 47 Fundamentals of Information Technology 48
Contents of memory and registers after each cycle Contents of memory and registers after each cycle Fundamentals of Information Technology 49 Fundamentals of Information Technology 50 Contents of memory and registers after each cycle Contents of memory and registers after each cycle Fundamentals of Information Technology 51 Fundamentals of Information Technology 52 Programmed I/O 5.6 TWO DIFFERENT ARCHITECTURES Fundamentals of Information Technology 53 Fundamentals of Information Technology 54
Two different architectures CISC (Complex Instruction Set Computer) Intel RISC (Reduced Instruction Set Computer) PowerPC CISC Philosophy Hardware is always faster than software, therefore make a powerful instruction set, with lots of addressing modes, allowing assembly language programs that can do a lot, with short programs. Fundamentals of Information Technology 55 Fundamentals of Information Technology RISC Philosophy CISC versus RISC Almost no one uses complex assembly language instructions, and people mostly use compilers which never use complex instructions CISC Emphasis on hardware Includes multi-clock complex instructions Memory-to-memory: "LOAD" and "STORE" incorporated in instructions Small code sizes, high cycles per second Transistors used for storing complex instructions RISC Emphasis on software Single-clock, reduced instruction only Register to register: "LOAD" and "STORE" are independent instructions Low cycles per second, large code sizes Spends more transistors on memory registers Fundamentals of Information Technology Fundamentals of Information Technology Fundamentals of Information Technology 59