Xilinx XC2C128 CPLD development kit Ver. 01.00 01/08/2007
History Version Date Changes Author 01.00 01/08/2007 Initial version MM99 mm99@mentalmod.com Page 2 of 15 www.mentalmod.com 01/08/2007
Table of contents Table of Contents Table of Contents... 3 Introduction... 4 Key Features... 5 Schematics... 6 Development software... 7... 8 Create rcgen.ise project... 8 Schematics entry... 12 Pins assignment... 13 Generate the programming file... 15 Configure the device... 15 Page 3 of 15 www.mentalmod.com 01/08/2007
Introduction Introduction MMOD-UK-XC2C128-100 is a low-cost development kit for the Xilinx Cool Runner II XC2C128 CPLD with 128 macrocells. The kit includes: MMOD-UK-SO-DIMM144-MB-100 - ultra low-cost mother board for Mental Modular SO-DIMM144 suited embedded modules MMOD-EM-XC2C128-100 XC2C128 based embedded module MMOD-DT-XPROG-LPT-III-100 Xilinx Parallel Cable III low-cost clone Page 4 of 15 www.mentalmod.com 01/08/2007
Key features Key Features Xilinx Cool Runner II CPLD - XC2C128-7VQG100C in VQFP100 package 3.3V/1A LDO voltage regulator 1.8V/1A LDO voltage regulator Power supply presence red LED JTAG connector RC group for creating a RC-oscillator Crystal clock oscillator in the range 1-156.5MHz (Optional) USB connector for powering the kit from the USB port Eight LEDs connected to the CPLD I/Os 4 buttons connected to the CPLD I/Os 4-way DIP switch connected to the CPLD I/Os Three jumpers for configuration of the inputs and outputs of the attached module MMOD-DT-XPROG-LPT-III-100 Xilinx Parallel Cable III low-cost clone, used to flash the CPLD Wide prototyping area Two standart SMD component footprints (SOP-16 and SOP-20) for more convenient usage of the board Easily expandable with other SO-DIMM144 embedded modules. For more details please refer to the corresponding kit s components datasheets available on our website. Page 5 of 15 www.mentalmod.com 01/08/2007
Schematics Schematics Look at the kit s components schematics. Page 6 of 15 www.mentalmod.com 01/08/2007
Schematics Development software A variety of different software development tools are available for Xilinx complex programmable logic devices (CPLD) and field programmable gate arrays (FPGA). Such are: - Altium Designer - ISE Foundation - ISE WebPACK Here we ll use Xilinx ISE WebPACK, due to its unique features: A free, downloadable PLD design environment for both Microsoft Windows and Linux! The industry's fastest timing closure with Xilinx SmartCompile technology All the tools and features of ISE Foundation, including the Xilinx CORE Generator system and FPGA Editor The easiest, lowest cost way to get started with the industry leader for price and performance Support for Xilinx industry leading CPLD and FPGA families, including the Virtex-5 Family of platform FPGAs Fmax technology, an industry-unique combination of capabilities that solve logic engineers number 1 design challenge timing closure Easily upgradeable to ISE Foundation from the Xilinx Online Store Go to Xilinx website (www.xilinx.com), download for free and register your ISE WebPACK. Here we ll not go in details about the downloading, installation and product registration, because it s quite easy and we do not consider you ll have any problems with this, but if you have any problems don t hesitate to contact us at support@mentalmod.com. Page 7 of 15 www.mentalmod.com 01/08/2007
Here we ll describe a simple project implement a low-frequency RC-oscillator and connect its output to a 8-bit counter with a 10-bit prescaler, counter outputs are connected to the 8 LEDs on the MMOD-UK- SO-DIMM144-MB-100. Create rcgen.ise project Go to Start>Programs>Xilinx ISE9.1i>Project Navigator You go to the following view Now go to File>New Project Page 8 of 15 www.mentalmod.com 01/08/2007
Enter Project Name: rcgen, Project Location and Top-Level Source Type: Schematic. Then click Next>. Page 9 of 15 www.mentalmod.com 01/08/2007
Click on New Source. Click the Next> button and Finnish in the next window. Page 10 of 15 www.mentalmod.com 01/08/2007
Click the Next> button and Finnish in the next window. Click the Finnish button. Now you go to the following view: Page 11 of 15 www.mentalmod.com 01/08/2007
The next step is: Schematics entry Use the schematic editor to enter the following schematic: Page 12 of 15 www.mentalmod.com 01/08/2007
While drawing the schematic you could go to the C:/Xilinx91i/doc/usenglish/de/libs/lib directory and browse it to find out more about the symbols which could be used. After you have entered the schematic, go to the next step: Pins assignment You could either use the PACE, by starting it in the processes explorer tree: Or by editing the text constraints in the rcgen.ucf file by clicking on Edit Constraints (Text) Page 13 of 15 www.mentalmod.com 01/08/2007
Now edit the rcgen.ucf file. Enter the following: # RC generator pins NET "H139" LOC = P37; NET "H139" IOSTANDARD = LVCMOS33; NET "H141" LOC = P39; NET "H141" IOSTANDARD = LVCMOS33 FLOAT SCHMITT_TRIGGER ; # Outputs NET "H111" LOC = P17; NET "H111" IOSTANDARD = LVCMOS33; NET "H113" LOC = P18; NET "H113" IOSTANDARD = LVCMOS33; NET "H115" LOC = P19; NET "H115" IOSTANDARD = LVCMOS33; NET "H117" LOC = P22; NET "H117" IOSTANDARD = LVCMOS33; NET "H119" LOC = P24; NET "H119" IOSTANDARD = LVCMOS33; NET "H121" LOC = P27; NET "H121" IOSTANDARD = LVCMOS33; NET "H123" LOC = P28; NET "H123" IOSTANDARD = LVCMOS33; NET "H125" LOC = P29; NET "H125" IOSTANDARD = LVCMOS33; Page 14 of 15 www.mentalmod.com 01/08/2007
Generate the programming file Double click on Generate Programming File. Configure the device Page 15 of 15 www.mentalmod.com 01/08/2007