STEVAL-VNH5019A Motor driver evaluation board based on VNH5019A Description Data brief Features Type R DS(on) I out V CC(max) VNH5019A-E 18 mω typ (per leg) 30 A 41 V Handling up to 30 A of maximum motor current output Undervoltage and overvoltage shutdown Device thermal protection Cross-conduction protection Very low standby power consumption Programmable PWM operation (up to 20 khz) Protection against loss of ground and loss of V CC Motor current monitoring (thanks to VNH5019A current sense output) On-board charge pump output for reverse polarity protection Device output protected against short to ground and short to V CC Graphic User Interface (GUI) STEVAL-VNH5019A offers dedicated power stage and controls suitable for electric DC motor driving. This evaluation board comes pre-assembled with VNH5019A H-bridge belonging to the VNH Motor Driver series based on VIPower proprietary technology. Typical applications are Windows Lift, Sliding Door, Seat regulation. This Evaluation Board consists of a motherboard (STM8 Universal Board) and a daughterboard. The motherboard, based on STM8 microcontroller, provides the logic section for monitoring and driving the VNH5019A assembled in the daughterboard. With the aim to make simpler the board usage and settings, ST provides a dedicated and userfriendly software with a Graphic User Interface (GUI). This enables the user to set VNH5019A parameters (PWM, Motor direction ) and at the same time it shows real time device diagnostic information like current output evolution, battery voltage monitoring, board temperature and much more. Order code STEVAL-VNH5019A Table 1. Device summary Reference VNH5019A evaluation board September 2013 DocID025030 Rev 3 1/12 For further information contact your local STMicroelectronics sales office. www.st.com
Application schematics and layouts STEVAL-VNH5019A 1 Application schematics and layouts 1.1 VNH5019A daughterboard Figure 1. VNH5019A daughterboard top layer 2/12 DocID025030 Rev 3
STEVAL-VNH5019A Application schematics and layouts Figure 2. VNH5019A daughterboard bottom layer DocID025030 Rev 3 3/12
Application schematics and layouts STEVAL-VNH5019A A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 Figure 3. VNH5019A daughterboard application schematic (part 1) +5V_DB +5V_P erm PB0/AI N0/TI M1_NCC1 PB1/AI N1/TI M1_NCC2 PB2/AI N2/TI M1_NCC3 PB3/AI N3 PB4/AI N4 PB5/AI N5 PB6/AI N6 PB7/AI N7 PE7/AI N8 PE6/AI N9 PF0/AIN10 PF3/AIN11 PF4/AIN12 PF5/AIN13 PF6/AIN14 PF7/AIN15 PA3/TI M2_CC3 PC0/ADC_ETR PC1(HS)/TI M1_CC1 PC2(HS)/TI M1_CC2 PC3(HS)/TI M1_CC3 PC4(HS)/TI M1_CC4 PD0(HS)/TI M3_CC2 PD2(HS)/TI M3_CC1 PD3(HS)/TI M2_CC2 PD4(HS)TI M2_CC1 Daughterboard Socket1 STM8UB_DB1 PD7/TL I PE0/CL K _CCO PE3/TI M1_BK IN PE4 PH7/TI M1_NCC1 PH6/TI M1_NCC2 PH5/TI M1_NCC3 PH4/TI M1_ETR PH3 PH2 PH1(HS) PH0(HS) B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 NRESET PA6/USART_CX PA5/USART_TX PA4/USART_R X PD5/LINUART_TX PD6/LINUART_RX PG0/CAN_TX PG1/CAN_RX PE5/SPI_NSS PC5/SPI_SCK PC6/SPI_MOSI PC7/SPI_MISO PE1/I2C_SCL PE2/I2C_SDA LIN LIN_PU USB_CB2 USB_CB3 CAN_HI CAN_LO +5V _SW BTN_COM BTN_A BTN_B LED1 LED2 LED3 LED4 IO_CON1 IO_CON2 IO_CON3 IO_CON4 IO_CON5 IO_CON6 IO_CON7 IO_CON8 IO_CON9 IO_CON10 IO_CON11 IO_CON12 ext1 ext2 ext3 ext4 ext5 ext6 ext7 ext8 ext9 ext10 _VIP Vs_A Vs_A Vs_A VS_B Vs_Per CP D40 D39 D38 D37 D36 D35 D34 D33 D32 D31 D30 D29 D28 D27 D26 D25 D24 D23 D22 D21 D20 D19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 +5V CS TEMP VBAT_SENSE IN_B/I NPUT2 IN_A/INPUT1 EN/DI G_A/STATUS3 CS_DI S INPUT3 INPUT4 EN/DI G_B/STATUS4 (I N_)P WM ID3 ID2 ID1 ID0 D 2 1 J1 VCC 4/12 DocID025030 Rev 3
DocID025030 Rev 3 5/12 Figure 4. VNH5019A daughterboard application schematic (part 2) STEVAL-VNH5019A Application schematics and layouts
Application schematics and layouts STEVAL-VNH5019A 1.2 STM8 motherboard Figure 5. STM8 motherboard top layer 6/12 DocID025030 Rev 3
STEVAL-VNH5019A Application schematics and layouts Figure 6. STM8 motherboard bottom layer DocID025030 Rev 3 7/12
8/12 DocID025030 Rev 3 Figure 7. STM8 motherboard - I/O & Body application schematic Application schematics and layouts STEVAL-VNH5019A
DocID025030 Rev 3 9/12 Figure 8. STM8 motherboard - STM8 & Supply application schematic STEVAL-VNH5019A Application schematics and layouts
10/12 DocID025030 Rev 3 Figure 9. STM8 motherboard - USB Interface application schematic Application schematics and layouts STEVAL-VNH5019A
STEVAL-VNH5019A Revision history 2 Revision history Table 2. Document revision history Date Revision Changes 22-Jul-2013 1 Initial release. 06-Sep-2013 2 Updated Section 1.2: STM8 motherboard 16-Sep-2013 3 Updated disclaimer. DocID025030 Rev 3 11/12 11
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