UNIT I DATA REPRESENTATION, MICRO-OPERATIONS, ORGANIZATION AND DESIGN Data representation: Data types, complements, fixed point representation, floating-point representation, other binary codes, error detection codes. Register transfer and micro operations: Register transfer language, register transfer, bus and memory transfers, arithmetic micro-operations, logic micro-operations, shift micro operations, arithmetic logic shift unit. Basic computer organization and design: Instruction codes, computer registers, computer instructions, timing and control, instruction cycle, memory reference instructions, input output and interrupt. Complete computer description, design of basic computer, design of accumulator logic. UNIT - II CONTROL AND CENTRAL PROCESSING UNIT Micro programmed control: Control memory, address sequencing, micro-program example, design of control unit. Central processing unit: General register organization, stack organization, instruction formats, addressing modes, data transfer and manipulation, program control, reduced instruction set computer. UNIT - III COMPUTER ARITHMETIC, PIPELINE AND VECTOR PROCESSING Computer arithmetic: Addition and subtraction, multiplication algorithms, division algorithms, floating-point arithmetic operations, decimal arithmetic unit, decimal arithmetic operations. Pipeline and vector processing: Parallel processing, pipelining, arithmetic pipeline, instruction pipeline, RISC pipeline, vector processing array processors. UNIT - IV INPUT-OUTPUT ORGANIZATION Input-output organization: Peripheral devices, input-output interface, asynchronous data transfer, modes of transfer, priority interrupt, direct memory access, input-output processor, serial communication. UNIT - V MEMORY ORGANIZATION Memory organization: Memory hierarchy, main memory, auxiliary memory, associative memory, cache memory, virtual memory, memory management hardware. REFERENCE BOOKS 1 Morris Mano, Computer System Architecture, 3rd Edition, Pearson Education, 2002 / PHI. 2 Vincent P.Heuring and Harry F.Jordan, Computer Systems Design and Architecture, Pearson Education Asia Publications, 2002. 3 John P.Hayes, Computer Architecture and Organization, Tata McGraw Hill, 1988. 4 Andrew S.Tanenbaum, Structured Computer Organization, 4th Edition, Prentice Hall of India/Pearson Education, 2002. 5 William Stallings, Computer Organization and Architecture, 6th Edition, Prentice Hall of India/Pearson Education, 2003.
1.What are the basic functional units of a computer? Input, memory, arithmetic and logic unit, output and control units are the basic functional units of a computer. 2.What are the instructions? Instructions are the explicit commands that govern the transfer of information within a computer as well as between the computer and its I/O device. 3.Specify the arithmetic and logic operations to be performed. 4.Define a program A list of instructions that performs a task is called as a program. 5.Define data. Data are numbers and encoded characters that are used as operands by the instructions. The term data however is often used to mean any digital information. 6.Give some example for input devices. Keyboard, joysticks, trackballs and mouses are some examples for input deices. 7.What is the function of memory unit? How will you classify it? The function of the memory unit is to store programs and data. are two classes of storage, called primary and secondary. There
8. What are registers? High speed storage elements which are mainly used for storing the operands while calculations are called as registers. Each register can store one word of data. 9. What are timing signals? Timing signals are that determine when a given action is to take place. The actual timing signals that govern the transfers are generated by control circuits. 10. What is the purpose of IR? The instruction register (IR) holds the instruction that is currently being executed. Its output is available to the control circuits which generate the timing signals that control the various processing elements involved in executing the instruction. 11. What is the purpose of PC? PC (Program Counter) is a specialized register which keeps track of the execution of a program. It contains the memory address of the next instruction to be fetched and executed. 12. What are the two registers which facilitate communication with the memory? MAR (Memory Address Register) and MDR (Memory Data Register) are the two registers which facilitate communication with memory. MAR holds
the address of the location to be accessed. MDR contains the data to be written into or read out of the address location. 13. What is a bus? A group of lines that serves as a connection path for several devices is called as bus. 14. Give any two uses of system software? The uses of system software are, Receiving and interpreting user commands. Managing the storage and retrieval of files in secondary storage device. 15.Define clock rate. Clock rate is the reciprocal of the length (P) of one clock cycle. ( i. e) R 1 P 16.Give the range of negative numbers in floating point format. The range of negative numbers in the floating point format is -(2-2 -23 ) x 2 128 and -2-127 17.Give the range of positive numbers in floating point format.
The range of positive numbers in the floating point format is, 2-127 and -(2-2 -23 ) x 2 128 18. Define negative overflow and negative underflow. * Negative numbers less than - -(2-2 -23 ) x 2 128 are called negative overflow Negative numbers greater than 2-127 are called negative underflow 19. Define positive underflow and positive overflow. Positive number less than 2-127 are called positive underflow. Positive numbers greater than (2-2 -23 ) x 2 128 are called positive overflow. 20.Give the four basic phases of algorithm for addition and subtraction. For addition and subtraction, the basic phases are, Check for zeros Align the significands Add or subtract the significands Normalize the result. 21. Give the five regions on the number line in 32-bit format of floating point numbers. The five regions are, Negative overflow Negative underflow Zero
Positive underflow Positive overflow 22.What does an overflow occur? Overflow can occur when the signs of two operands are the same. It obviously occurs if the sign of the result is different. A circuit to detect overflow can be added t the n bit adder by implementing the logic expression. 23. What are the four types of operations that have to be done by the instructions in computer? The types of operations done by the instruction are, 24.Data transfer between the memory and the processor registers. Arithmetic and logic operations on data. Program sequencing and control I/O transfers. 25.List the basic instruction types. The various instruction types are, Three address instructions Two address instructions Single address instructions. 26.What is a branch instruction? A branch instruction loads a new value into the program counter.
As a result, the processor fetches and executes the instruction at this new address, called the branch target, instead of the instruction at the location that follows the branch instruction is sequential address order. 27.What are condition code flags? The processor keeps track of information about the results of various operations for use by subsequent conditional branch instructions. This is accomplished by recording the required information in individual bits, often called condition code flags. 28.List the four condition code flags. The code flags are, Negative flag (N) Zero flag (Z) Overflow flag (V) Carry flag ( C ) 29.What are addressing modes? The different ways in which the location of an operand is specified in an instruction are referred to as addressing modes. 30.Define register addressing mode. In register addressing mode, the operand is the contents of a processor register. The name (address) of the register is given in the instruction. 31.Define absolute addressing mode. In absolute addressing mode, the operand is in a memory location. The address of this location is given explicitly in the instruction. This is also called as direct addressing mode.
32.Define indirect addressing mode. The effective address of the operand is the contents of a register or memory location whose address appears in the instruction. This is called as indirect addressing mode. 33.What is indexed addressing mode? The effective address of the operand is generated by adding a constant value to the contents of a register. This is called as indexed addressing mode. 34.What is relative addressing mode? The effective address is determined by the index mode using the program counter in place of general purpose register. This mode is used to access the data operands. 35.What is auto increment mode? The effective address of the operand is the contents of a register specified in the instruction. After accessing the operand, the contents of this register are automatically incremented to point the next item in a list. 36.What is auto decrement mode? The contents of a register specified in the instructions are first automatically decremented and then used as the effective address of the operand. 37.What does an overflow occur? Overflow can occur when the signs of two operands are the same. It obviously occurs if the sign of the result is different. A circuit to detect overflow can be added t the n bit adder by implementing the logic expression.
38.What are the two approaches to reduce delay in address? To use fastest possible electronic technology in implementing the ripple carry design or variations of it. To use an augmented logic gate network structure. 39.What is Booth s algorithm? Booth s algorithm is a technique for generating a 2 n bit product. It treats both positive and negative 2 s complement n bit operands uniformly. 40.List the two attractive features of Booth algorithm. Booth algorithm has the following features. It handles both positive and negative multipliers uniformly. It achieves some efficiency in the number of additions required when the multiplier has a few large blocks of 41.What are the two techniques for speeding up multiplication operation? To speed up multiplication operation, the techniques used are given below. The maximum number of summands that must be added is n/2 for n bit operands. Reduces the time needed to add the summands. 42. Give the algorithm for performing restoring division. The algorithm for performing restoring division is as follows. Shift A and Q left one binary position.
Subtract M from A, and place the answer back in A. If the sign of A is 1, set q 0 to 0 and add M back to A; otherwise set q 0 to 1. 43.Give the algorithm for performing non restoring division. The algorithm for performing non restoring division is given below. Step 1: Do the following n times. a)if the sign of A is 0, shift A and Q left one bit position and subtract M From A; otherwise, shift A and Q left and add M to A. Now; if the sign A is 0, add M to A. 44.Give the addition rule for floating point numbers. The addition rule for floating point numbers is as follows. a)choose the number with the smaller exponent and shift its mantissa right a number of steps equal to the difference in exponents. b) Set the exponent of the result equal to larger exponent. c) Perform addition on the mantissas and determine the sign of the result. d) Normalize the resulting value, if necessary. 45.Give the subtraction rule for floating point numbers. o The subtraction rule for floating point numbers is as follows. Choose the number with smaller exponent and shift its mantissa right a number of steps equal to the difference in exponents. Set the exponent of the result equal to larger exponent.
Perform subtraction on the mantissa and determine the sign of the result. Normalize the resulting value, if necessary. 46.Give the multiplication rule for floating point numbers. The multiplication rule for floating point numbers is as follows. Add the exponents and subtract 127. Multiply the mantissa and determine the sign of the result. Normalize the resulting value, if necessary. 47.Give the division rule for floating point numbers. The division rule for floating point numbers is as follows. Subtract the exponents and add 127. Divide the mantissa and determine the sign of the result. Normalize the resulting value, if necessary. 48. Draw the cell for array implementation of multiplication of positive binary operands.
Cell for array implementation of multiplication of positive binary operands 49. Give is Booth s algorithm? Bit i Multiplier Bit i - i Version of multiplicand selected by bit i 0 1 0 1 1 0 x M +1 x M -1 x M 0 x M
50.Draw the block diagram of hardware for addition and subtraction. OF : Overflow bit SW : Switch (Select addition / subtraction) 51.Draw the flow chart for unsigned binary multiplication. Flow chart for unsigned binary multiplication.
52. Give the 32-bit floating point format. 32 bit floating point format 53. Define a normalized number. A normaised number is one in which the most significant digit of the significant is non zero 55. Draw the flow chart for Booth s algorithm for 2 s complement multiplication. Flow chart for 2 s complement multiplication
56. Give the normalised number for base 2 representation. For base 2 representation, a normalised number is one in which the most significant bit of the significant is one. 57. Give the range of negative numbers in floating point format. The range of negative numbers in the floating point format is -(2-2 -23 ) x 2 128 and -2-127 58. Give the range of positive numbers in floating point format. The range of positive numbers in the floating point format is, 2-127 and -(2-2 -23 ) x 2 128 59. Define negative overflow and negative underflow. * Negative numbers less than - -(2-2 -23 ) x 2 128 are called negative overflow Negative numbers greater than 2-127 are called negative underflow 60. Define positive underflow and positive overflow. Positive number less than 2-127 are called positive underflow. Positive numbers greater than (2-2 -23 ) x 2 128 are called positive overflow.
61. Give the typical 32 bit format of floating point numbers by expressible numbers. 32 bit format of floating point numbers 62. List the conditions produced during a floating point operation. During a floating point operation, the conditions produced are, Exponent overflow Exponent underflow Significand underflow Significand overflow 63. Give the four basic phases of algorithm for addition and subtraction. For addition and subtraction, the basic phases are, Check for zeros Align the significands Add or subtract the significands Normalize the result.
64. Draw the flow chart for unsigned binary division. Flow Chart for unsigned binary division. 65. Give the five regions on the number line in 32-bit format of floating point numbers. The five regions are, Negative overflow Negative underflow Zero Positive underflow
Positive overflow 66. What are denormalized numbers? denormalized numbers are those numbers to handle cases of exponent underflow. When the exponent of the result becomes too small, the result is denormalized by right shifting the fraction an incrementing the exponent for each shift, until the exponent within a representable range. 67. What is a floating point representation system? A numeration system in which a real number is represented by a pair of distinct numerals is called a floating point representation system. The real number being the product of the fixed point part, one of the numerals and a value obtained by raising the implicit floating point base to a power denoted by the exponent in the floating point representation, indicated by the second numeral, 68.What are the three steps involved in executing an instruction? An instruction is executed in the following way. Fetch the contents of the memory location pointed by the PC. The contents of this location are interpreted as an instruction to be executed. Hence they are loaded into the IR. symbolically, this can be written as, IR (PC) Assuming that the memory is byte addressable, increment the contents of the Pc by 4, that is, PC ( PC) 4 Carry out the actions specified by instruction in the IR.
69.What is a data path? The register, the ALU and the interconnecting buses are collectively referred to as data path. 70.What is the purpose of an instruction decoder? The instruction decoder generates the control signals needed to select the registers involved and direct the transfer of data. 71.What are the steps accomplished when we wish to transfer the contents of register RI to register R4? Enable the output of register R1 by setting R1 out to 1. This places the contents of R1 on the processor bus. Enable the input of register R4 by setting R4 in to 1. This loads data from the processor bus into register R4. 72.What is a processor clock? All the operations and data transfers within the processor take place within time periods defined by a clock called as the processor clock. 73.Define ALU. ALU (Arithmetic and Logic Unit) is a combinational circuit that has no internal storage. It performs arithmetic and logic operations on two operands applied as the input. 74.What are the actions needed to execute the instruction Move (R1) R2?
To execute the instruction Move (R1) R2, the steps followed are, MAR [R] Start a read operation on the memory bus. Wait for the MFC response from the memory. Load MDR from the memory bus. R2 [MDR] 75.What are the actions performed when we execute the instruction Add (R3) R1. To execute the instruction Add (R3) R1, the steps followed are, Fetch the instruction Fetch the first operand Perform the addition Load the result into R1. 76.What is the purpose of WMFC signal? WMFC is the control signal that causes the processor s control circuitary to wait for the arrival of the MFC signal. 77. Give the control sequence for the execution of instruction, Move (R1) R2. To execute the instruction Move (R1) R2, the steps followed are, R1 out, MAR in, Read MDR ine, WMFC MDR out R2 in 78. Give the control sequence for the execution of instruction and (R3) R1. PC out, MAR in, Read, Select 4, Add, Z in Z out, PC in, Y in, WMFC MDR out IR in
c) R1 out, Y in, WMFC R3 out, IR in, Read f) MDR out, Select Y, Add, Z in g) Z out, R1 in, End 79. What is a branch instruction? A branch instruction replaces the contents of the PC with the branch target address. This address is usually obtained by adding an offset, x, which is given in the branch instruction, to the updated value of the PC. 80. What is a register file? A register file is a single block of all general purpose registers. 81. Give the control sequence for an unconditional branch instruction. PC out, MAR in, Read, Select 4, Add, Z in Z out, PC in, Y in, WMFC MDR out, 1R in Offset field of IR out, Add, Z in Z out, PC in, End 82. Give the control sequence for the instruction Add R4, R5, R6 for the three bus organization.
The control sequence is, PC out, R = B, MAR in, Read, Inc PC WMFC MDR outb, R = B, IR in R4 ou t, R5 outb, Select A, Add, R6 in, End. 83. How will you determine the required control signals for hardwired control? For hardwired control, the required control signals are determined by, Contents of the control step counter Contents of the instruction register Contents of the condition code flags External input signals, such as MFC and interrupt requests. 84. What is a hardwired control unit? A hardwired control unit consists of a collection of combinational circuits to generate various control signals. 85. What are the difference between hardwired and micro programmed control unit? Sl. No Hardwired control unit Microprogrammed control unit a) Digital circuits generate the control signals. b) It is a conventional design technique. The control signals are stored as bit patterns in a Rom. It is a modern design technique.
86. What is a control word? A control word is a word whose individual bits represent the various control signals. 87. What is a micro routine? A sequence of control words corresponding to the control sequence of a machine instruction constitutes the micro routine. 88. Define micro instructions. The individual control words in the micro routine are called as micro instructions. 89. What is a control store? The micro routines for all instructions in the instruction set of a computer are stored in a special memory called the control store. 90. What is a vertical microprogramming organisation? Highly encoded schemes that use compact codes to specify only a small number of control functions in each micro instruction are referred to as a vertical organisation. 91. What is a horizontal microprogramming organisaiton? The organisation in which (the minimally encoded scheme) many resources can be controlled with a single micro instruction is called a horizontal organization. 92. Why does vertical microprogramming organisation result in slower operating speeds? Because more micro instructions are needed to perform the desired control functions.
93. What is bit ORing technique? It is a technique for modifying the branch address. This technique by pass micro instruction 170 by having the preceding branch micro instructiosn specifying the address 170 and then use an OR gate to change the least significant bit of the address to 1 if the direct addressing mode is involved. 94. What are the advantages for microprogramming? The advantages of microprogramming are, The design of microprogram control unit is less complex. The microprogram is flexible. A given CPU s instruction set can be easily modified. the debugging and maintenance of microprogrammed CPU is easy. 95. What are the disadvantages of microprogramming? The disadvantages of microprogramming are, A microprogrammed CU is slow. For a small CPU with very limited hardware resources, a microprogram CU is expensive. 96. What is the main function of microprogrammed control? The main function of microprogrammed control is to provide a means for simple, flexible and relatively inexpensive execution of machine instructions. UNIT 4
1. What is memory mapped I/O? With memory mapped I/O, any machine instruction that can access memory can be used to transfer data to or from an I/O device. 2. What constitute the device s interface circuit? The address decoder, the data and status register and the control circuitry required to co ordinate I/O transfers constitute the device s interface circuit. 3. What is interrupt service routine? The routine executed in response to an interrupt request is called as interrupt service routine. In short, it is called as ISR. 4. Define interrupt latency. The delay between the time an interrupt request is received and the start of execution of the interrupt service routine is called interrupt latency. 5. What is the difference between subroutine and interrupt service routine? Subroutine is the routine which could be called by another subroutine or main routine under program control. Interrupt Service Routine is called automatically on the occurrence of an interrupt which is predefined. 6.Give a typical scenario assuming that interrupts are enabled. The typical scenario is as follows : The device raises an interrupt request. The processor interrupts the program currently being executed. Interrupts are disabled by changing the control bits in the PS. The device is informed that its request has been recognized and in response, it deactivates the interrupt request signal. The action requested by the interrupt is performed by the ISR.
Interrupts are enabled and execution of the interrupted program is resumed. 7.What are vectored interrupts? To reduce the time involved in the polling process, a device requesting an interrupt may identify itself directly to the processor. Then the processor can immediately start executing the corresponding ISR. The term vectored interrupts refer to all interrupt handling schemes based on this approach. 8.What is interrupt vector? Interrupt vector is the starting address of the interrupt service routine stored in the location pointed by the interrupting device. 9.What are privileged instructions? Privileged instructions are the instructions which are executed only while the processor is running in the supervisor mode. 10.What is privilege exception? An attempt to execute a privileged instruction while in the user mode leads to a special type of interrupt called a privilege exception. 11.What are exceptions? Give an example. An except is a term often used to refer to any event that cause an interruption. Example : I / O interuupts 12.What is a debugger? A debugger is a program used by system software which helps the programmer finds errors in a program. 13 What are the two facilities provided by a debugger?
The facilities provided by a debugger are, Trace Break points. 14. When does an exception occur when the processor is in trace mode? When the processor is operating in the trace mode, an exception occurs after execution of every instruction, using the debugging program as the exception service routine. The trace exception is disabled during the execution of debugging program. 15.What are the uses of interrupts in OS? The Uses of interrupts in OS are, To assign priorities Switch from one user program to another. Implementing security. Protection features. Co ordinate I/O activities. 16.What is a process? A program, together with any information that describes its current state of execution, is regarded by the OS as an entity called a process. 17 Define multitasking. Multitasking is a mode of operation in which a processor executes several user programs at the same time. 18.What is time slicing? Time slicing is a common OS technique that makes multitasking possible. With this technique, each program runs for a short time period called as a time slice,t, then
another program runs for its time slice and so on. The period t, is determined by continuously running hardware clock, which generates an interrupt every t seconds. 19.What is a program state? A program state is state which includes register contents, program counter and the program status word. 20.What is DMA? A special control unit that may be provided to allow transfer of a block of data directly between an external device and the main memory, without continuous intervention by the processor. This approach is called direct memory access (DMA). 21.What is the purpose of DMA controller? The DMA controller performs the functions that would normally be carried out by the processor when accessing the main memory. 22.What is cycle stealing? Cycle stealing is an interweaving technique used by DMA controller to steal the memory cycles from the processor. 23.What is a block or burst mode? The DMA controller may be given exclusive to the main memory to transfer a block of data without interruption. This is known as block or burst mode. 24.What is a bus master? The device that is allowed to initiate data transfers on the bus at any given time is called bus master. 25.What is bus arbitration? Bus arbitration is the process by which the next device to become the bus master is selected and bus mastership is transferred to it.
26 Name the two approaches to bus arbitration. The approaches to bus arbitration are, Centralized arbitration Distributed arbitration 29. What do you mean by distributed arbitration? Distributed arbitration means that all devices waiting to use the bus have equal responsibility in carrying out the arbitration process, without using a central arbiter. 30. What is the purpose of a bus protocol? A bus protocol is the set of rules that governs the behavior of various devices connected to the bus as to when to place information on the bus, assert control signals and so on. 31. Define master. Master is a device that initiates data transfer by issuing read or write commands on the bus. Master is also called as initiator. 32 What is a slave? The device addressed by the master is called as slave. Slave can also be called as target. 33. What is a synchronous bus? In synchronous bus, all devices derive timing information from the common clock line. Equally spaced pulses on this define equal time intervals. 34. What is a asynchronous bus?
In asynchronous bus, controlling data transfer on the bus is based on the use of handshake between the master and the slave. 35. What is the main advantage of asynchronous bus? The main advantage of asynchronous bus is that the handshake process eliminates the need for synchronization of the sender and the receiver blocks, thus simplifying timing design. 36. What is a port? The side opposite to bus signals in an I/O interface consists of data path with its associated controls to transfer data between the interface and the I/O device. This side is called a port. 37. What is the difference between serial port and parallel port? A parallel port transfers data in the form of a number of bits typically 8 or 16 simultaneously to or from the device. A serial port transmits and receives data one bit at a time. 38. What is a bridge? A bridge is an interconnection circuit between two buses. It translates the signals and protocols of one bus into those of the other. 39. Define SCSI. SCSI stands for Small Computer System Interface. It refers to a standard bus defined by ANSI under designation X3.131. 40. What are the different categories of SCSI bus signals? SCSI bus signals are classified as, Data signal Phase signal
Information signal Handshake Direction of transfer. 41. What are the objectives of USB? The objectives of USB are as follows: Provide a simple, low cost and easy to use interconnection system. * Enhance user convenience through a plug and-play mode operation. 42. What is an isochronous data stream? An isochronous data stream means that the successive events are separated by equal periods of time. 43. What is a hub? A hub is the intermediate control point between the host and the I/O device. What is pipelining? The overlapping of successive instruction execution is called as pipelining. 44 What are the four steps involved when a pipelined processor process an instruction? The steps involved are; a) Fetch b) Decode c) Execute d) Write 45.Define a hazard.
Any condition that causes the pipeline to stall is called as hazard. 46.Define data hazard. A data hazard is any condition in which either the source or the destination operands of an instruction are not available at the time expected in the pipeline. 47.What is control hazard? The hazard which may result from a miss in the cache, requiring the instruction to be fetched from the main memory. The control hazard is also called as instruction hazard. 48.What is a bubble? Bubble is nothing but a stall or an idle period in pipelines. It moves downstream until it reaches the last minute as a result of delay in one of the pipeline stages. 49.When does a structural hazard occur? A structural hazard is the situation when two instructions require the use of a given hardware resource at the same time. The most common case in which this hazard may arise is in access to the memory. 50.What is branch penalty? The time lost as a result of a branch instruction is called as branch penalty. 51.What is the functions of dispatch unit? A dispatch unit is one which takes instruction from the front of the queue and sends them to the execution unit. the dispatch unit also performs the decoding function.
52.What is the idea behind delayed branching? The main idea is to minimize the penalty incurred as a result of condition branch instructions. 53.Define speculative execution. Speculative execution means that instructions are executed before the processor is certain that they are in the correct execution sequence. 54.What is static branch prediction? An approach whose branch prediction decision is a always the same every time a given instruction is executed is called as static branch prediction. 55.What is dynamic branch prediction? An approach in which the prediction decision may change depending on execution history is called dynamic branch prediction. 21. What is pipelining? Pipelining is the process of executing the instructions concurrently. i.e. overlapping the execution of successive instructions. 22. What is super scalar execution? A higher degree of concurrency can be achieved if multiple Instructions pipelines are implemented in the processor. This means that the multiple functional units are used, creating parallel paths through which different instructions can be executed in parallel. With such an arrangement, it becomes possible to start the execution of several instructions in every clock cycle. This mode of execution is called as super scalar execution.
The processors which are capable of achieving an instruction execution throughput of more than one instruction per cycle are called as superscalar processors. 23. Expand CISC and RISC. CISC Complex Instruction Set Computers RISC Reduced Instruction Set Computers. UNIT 5 1. Define RAM Memory in which any location can be reached in a short and fixed amount of time after specifying its address is called as Random Access Memory (RAM). 2. What is memory access time? The time required to access one word is called the memory access time. This time is fixed, independent of the location of the word being accessed. It typically ranges from a few nanoseconds to about 100 ns for modern RAM units. 3. What is a cache memory? The small, fast Ram units are called caches. They are tightly coupled with the processor and are often contained on the same integrated circuit chip to achieve high performance.
4. What is the use of secondary storage? Give examples. The additional, cheaper, secondary storage is used when large amounts of data and many programs have to be stored, particularly for information that is accessed in frequently. Examples: Magnetic disks, Tapes and Optical disks. 5. What are the two registers involved in data transfer between the memory and the processor? The registers used to transfer data are, MAR (Memory Address register) MDR (Memory Data Register) 6.Define memory cycle time. A useful measure of speed of memory units is the time that elapses between the initiation of an operation and the completion of that operation. This is referred to as memory access time. Memory cycle time is minimum time delay required between the initiation of two successive memory operations. 7.When is a memory unit called as RAM? A memory unit is called as RAM if any location can be accessed for a read or write operation in some fixed amount of time that is independent of the location address. 8.What is cache memory? Cache memory is a small, fast memory that is inserted between the larger, slower main memory and the processor. 9.What are the advantages of cache memory?
The advantages of cache memory are, It reduces the memory access time. It holds the currently active segments of a program and their data. 10.What is MMU? MMU is the memory management unit. It is a special memory control circuit used for implementing the mapping of the virtual address space onto the physical memory. 11.Define static memories. Memories that consist of circuits capable of retaining their state as long as long as power is applied is called static memories. 12.Differentiate between static RAM and dynamic RAM. Sl. No a) b) c) d) Static RAM They are fast. They are very expensive They require several transistors. They retain their state indefinitely. Dynamic RAM They are slow They are less expensive They require less/no transistor. They do not retain their state indefinitely. 13.Why SRAMS are said to be volatile? Static RAMs are said to be volatile memories because their contents are lost when power is interrupted.
14.What is a refresh circuit? A refresh circuit is a circuit which ensures that the contents of a DRAM are maintained when each row of cells are accessed periodically. 15.What are asynchronous DRAMs? In DRAM, the timing of the memory device is controlled asynchronously. A specialized memory controller circuit provides the necessary control signals RAS and CAS that govern the timing. The processor must take into account the delay in the response of the memory. Such memories are referred to as asynchronous DRAMs. 16.What are synchronous DRAMs? Synchronous DRAMs are those whose operation is directly synchronized with a clock signal. 17.Define memory latency. Memory latency is used to refer to the amount of time it takes to transfer a word of data to or from the memory. 18.Define bandwidth. The number of bits or bytes that can be transferred in one second is referred to as the memory bandwidth. 19.What are double data rate SDRAMs? Double data rate SDRAMs are those which can transfer data on both edges of the clock. 20.Expand SIMM and DIMM. SIMM Single In line Memory Modules DIMM Dual In line Memory Modules
21.What is memory controller? A memory controller is a circuit which is interposed between the processor and the dynamic memory. It is used for performing multiplexing of address bits. 22.What is RAMBUS Memory? The key feature of Rambus technology is a fast signaling method used to transfer information between chips.instead of using signals that have voltage levels of either 0 or 5V to represent the logic values, Rambus technology uses 0.3 and +2 V. 23.Define ROM. ROM (Read Only Memory) is a non volatile memory which involves only reading of stored data. 24.List the features of PROM The features of PROM are, They are programmed directly by the user. It is faster. Less expensive approach. More flexible than ROM. 25.What is the disadvantage in EEPROM? The only disadvantage of EEPROM is that different voltages are needed for erasing, writing and reading the stored data. 26.Give the memory hierarchy. Registers, Cache memory, Main Memory and Secondary Memory.
27.What is meant by memory interleaving? The memory cell array is organized in two banks. Each bank can be accessed separately. Consecutive words of a given block are stored in different banks. Such interleaving of words allows simultaneous access to two words that are transferred. 28.Define virtual memory techniques. Techniques that automatically move program and data blocks into the physical main memory when they are required for execution are called virtual memory techniques. 29.What are pages? All programs and data are composed of fixed length units called pages, each of which consists of a block of words that occupies contiguous locations in the main memory. 30.Define system space and user space. Management routines are part of the operating system of the computer. It is convenient to assemble the operating system rountines into a virtual address space, called the system space, that is separate from the virtual space in which the user application programs reside. The letter space is called user space. 31.What is phase encoding? Phase encoding or Manchester encoding is a scheme in which changes in magnetization occur for each data bit. The drawback here is poor bit storage density. 32.Define access time.
The sum of seek time and rotational delay (latency time) is called access time. Access time = Seek time + Rotational delay. 33. What is meant by replacement algorithm? When the cache is full and memory word that is not in the cache is requested, the cache control hardware must decide which block should be removed to create space for the new block that contains the referenced word. The algorithm used for this purpose is called replacement algorithm. 34. Define the term miss penalty. In case of cache miss, extra time is needed to bring the desired information into a cache is called the miss penalty. 35. What is meant by page frame? An area in main memory that can hold one page is called a page frame. 36. What will be the width of address and data buses for a 16 x 8 memory chip? Address lines = 4 Data lines = 8