Marking Scheme. Examination Paper. Module: Microprocessors (630313)

Similar documents
Philadelphia University Student Name: Student Number:

Marking Scheme. Examination Paper Department of CE. Module: Microprocessors (630313)

Marking Scheme. Examination Paper. Module: Microprocessors (630313)

Marking Scheme. Examination Paper Department of CE. Module: Microprocessors (630313)

SPRING TERM BM 310E MICROPROCESSORS LABORATORY PRELIMINARY STUDY

EXPERIMENT WRITE UP. LEARNING OBJECTIVES: 1. Get hands on experience with Assembly Language Programming 2. Write and debug programs in TASM/MASM

Code segment Stack segment

8086 INTERNAL ARCHITECTURE

MICROPROCESSOR PROGRAMMING AND SYSTEM DESIGN

EC 333 Microprocessor and Interfacing Techniques (3+1)

Module 3 Instruction Set Architecture (ISA)

Intel 8086 MICROPROCESSOR ARCHITECTURE

Faculty of Engineering Student Number:

Microprocessors ( ) Fall 2010/2011 Lecture Notes # 15. Stack Operations. 10 top

Lecture 5:8086 Outline: 1. introduction 2. execution unit 3. bus interface unit

Basic Execution Environment

9/25/ Software & Hardware Architecture

Lab 4: Basic Instructions and Addressing Modes

Intel 8086 MICROPROCESSOR. By Y V S Murthy

Faculty of Engineering Computer Engineering Department Islamic University of Gaza Assembly Language Lab # 2 Assembly Language Fundamentals

Lecture 15 Intel Manual, Vol. 1, Chapter 3. Fri, Mar 6, Hampden-Sydney College. The x86 Architecture. Robb T. Koether. Overview of the x86

PESIT Bangalore South Campus

Philadelphia University Student Name: Student Number:

COMPUTER ENGINEERING DEPARTMENT

ADVANCE MICROPROCESSOR & INTERFACING

X86 Addressing Modes Chapter 3" Review: Instructions to Recognize"

Basic Assembly SYSC-3006

Lab 6: Conditional Processing

Arithmetic Instructions

Introduction to IA-32. Jo, Heeseung

Internal architecture of 8086

INTRODUCTION TO IA-32. Jo, Heeseung

Introduction to Microprocessor

The x86 Architecture

CC411: Introduction To Microprocessors

Microprocessor. By Mrs. R.P.Chaudhari Mrs.P.S.Patil

Ex: Write a piece of code that transfers a block of 256 bytes stored at locations starting at 34000H to locations starting at 36000H. Ans.

SPRING TERM BM 310E MICROPROCESSORS LABORATORY PRELIMINARY STUDY

icroprocessor istory of Microprocessor ntel 8086:

Chapter Four Instructions Set

Q1: Multiple choice / 20 Q2: Protected mode memory accesses

16.317: Microprocessor Systems Design I Fall 2013

Conditional Processing

UNIT 2 PROCESSORS ORGANIZATION CONT.

Summer 2003 Lecture 4 06/14/03

CSC 2400: Computer Systems. Towards the Hardware: Machine-Level Representation of Programs

Islamic University Gaza Engineering Faculty Department of Computer Engineering ECOM 2125: Assembly Language LAB. Lab # 8. Conditional Processing

US06CCSC04: Introduction to Microprocessors and Assembly Language UNIT 1: Assembly Language Terms & Directives

Ex : Write an ALP to evaluate x(y + z) where x = 10H, y = 20H and z = 30H and store the result in a memory location 54000H.

Signed number Arithmetic. Negative number is represented as

complement) Multiply Unsigned: MUL (all operands are nonnegative) AX = BH * AL IMUL BH IMUL CX (DX,AX) = CX * AX Arithmetic MUL DWORD PTR [0x10]

Section 001. Read this before starting!

SRI VENKATESWARA COLLEGE OF ENGINEERING AND TECHNOLOGY DEPARTMENT OF ECE EC6504 MICROPROCESSOR AND MICROCONTROLLER (REGULATION 2013)

We can study computer architectures by starting with the basic building blocks. Adders, decoders, multiplexors, flip-flops, registers,...

16.317: Microprocessor Systems Design I Fall 2013

Read this before starting!

Complex Instruction Set Computer (CISC)

CSC 8400: Computer Systems. Machine-Level Representation of Programs

EXPERIMENT WRITE UP. LEARNING OBJECTIVES: 1. Get hands on experience with Assembly Language Programming 2. Write and debug programs in TASM/MASM


EECE.3170: Microprocessor Systems Design I Summer 2017 Homework 4 Solution

Intel 8086: Instruction Set

Assembly Language. Dr. Esam Al_Qaralleh CE Department Princess Sumaya University for Technology. Overview of Assembly Language

16.317: Microprocessor Systems Design I Spring 2015

Assembler Programming. Lecture 2

8086 INSTRUCTION SET

SHEET-2 ANSWERS. [1] Rewrite Program 2-3 to transfer one word at a time instead of one byte.

Section 002. Read this before starting!

UNIVERSITY OF CALIFORNIA, RIVERSIDE

INSTRUCTOR: ABDULMUTTALIB A. H. ALDOURI

Lecture (08) x86 programming 7

Q1: Multiple choice / 20 Q2: Data transfers and memory addressing

COMPUTER ENGINEERING DEPARTMENT

We will first study the basic instructions for doing multiplications and divisions

Inline Assembler. Willi-Hans Steeb and Yorick Hardy. International School for Scientific Computing

VARDHAMAN COLLEGE OF ENGINEERING (AUTONOMOUS) Shamshabad, Hyderabad

EC-333 Microprocessor and Interfacing Techniques

Lab 3: Defining Data and Symbolic Constants

Scott M. Lewandowski CS295-2: Advanced Topics in Debugging September 21, 1998

Islamic University Gaza Engineering Faculty Department of Computer Engineering ECOM 2125: Assembly Language LAB. Lab # 7. Procedures and the Stack

Data Transfers, Addressing, and Arithmetic. Part 2

Islamic University Gaza Engineering Faculty Department of Computer Engineering ECOM 2125: Assembly Language LAB

Microprocessor and Assembly Language Week-5. System Programming, BCS 6th, IBMS (2017)

3.1 DATA MOVEMENT INSTRUCTIONS 45

16.317: Microprocessor Systems Design I Spring 2014

Arithmetic and Logic Instructions And Programs

LABORATORY WORK NO. 7 FLOW CONTROL INSTRUCTIONS

Q1: Multiple choice / 20 Q2: Memory addressing / 40 Q3: Assembly language / 40 TOTAL SCORE / 100

Come and join us at WebLyceum

CS/ECE/EEE/INSTR F241 MICROPROCESSOR PROGRAMMING & INTERFACING MODULE 4: 80X86 INSTRUCTION SET QUESTIONS ANUPAMA KR BITS, PILANI KK BIRLA GOA CAMPUS

SOEN228, Winter Revision 1.2 Date: October 25,

Islamic University Gaza Engineering Faculty Department of Computer Engineering ECOM 2125: Assembly Language LAB. Lab # 10. Advanced Procedures

16.317: Microprocessor Systems Design I Fall 2014

Section 001 & 002. Read this before starting!

Lecture (02) The Microprocessor and Its Architecture By: Dr. Ahmed ElShafee

INTRODUCTION TO MICROPROCESSORS

Instructions moving data

CS401 Assembly Language Solved MCQS From Midterm Papers

Logic Instructions. Basic Logic Instructions (AND, OR, XOR, TEST, NOT, NEG) Shift and Rotate instructions (SHL, SAL, SHR, SAR) Segment 4A

SYSC3601 Microprocessor Systems. Unit 2: The Intel 8086 Architecture and Programming Model

Transcription:

Philadelphia University Faculty of Engineering Marking Scheme Examination Paper Department of CE Module: Microprocessors (630313) Final Exam Second Semester Date: 12/06/2017 Section 1 Weighting 40% of the module total Lecturer: Coordinator: Internal Examiner: Dr. Qadri Hamarsheh Dr. Qadri Hamarsheh Eng. Anis Nazer

Marking Scheme Microprocessors (630313) The presented exam questions are organized to overcome course material, the exam contains 5 questions; all questions are compulsory requested to be answered. Thus, the student is permitted to answer any question out of the existing ones in this section. Marking Assignments The following scheme shows the marks assignments for each question. They show also the steps for which a student can get marks along the related procedure he/she achieves. Question 1This question is attributed with 10 marks if answered properly 1) The 8086/8088 used two processing logical units which were known as: a) Segment and Offset Units b) Bus Interface Unit and Execution Unit c) Bus Unit and Execution Interface Unit d) ALU and Control Unit 2) What are the names of the 4 segment registers? a) Data, Index, Code, Stack b) Stack, Index, Extra, Code c) Stack, Extra, Code, Data d) Stack, Data, Base, Counter 3) Memory segmentation (partitioning) was necessary because the x86 registers were 16-bits and could not hold the 20-bit addresses of the main memory a) True b) False 4) In the following data definition, assume that List2 begins at offset 2000h. What is the offset of the third value (5)? List2 WORD 3, 4, 5, 6, 7 a) 2006h c) 2004h b) 2003h d) None of above 5) Which of the following is an invalid instruction? a) MOV AX, [BP] c) MOV AX, CS b) MOV DS, CS d) None of the above 6) Assume the following initial state for AX, BX, CX registers: AX 6521 H BX ABCD H CX 0105 H What are the flags after CMP AH, CL a) C=1, Z=0, S=1 c) C=0, Z=1, S=1 b) C=0, Z=1, S=0 d) C=0, Z=0, S=0 7) Given that the BL register contains b, the effect of the following instruction and BL, 1101 1111 is to a) clear bl c) store B in bl b) store 0010 0000 in bl d) leave bl unchanged 8) Given that the subprogram WriteChar displays the character in AL register, the effect of the following instructions: mov AL, c sub AL, 2 call WriteChar is to a) display 2 c) display 'c' b) display 'a' d) display a blank

9) The interrupt vector table (IVT) is located at addresses: a) 00000H 01024H c) 00000H 003FFH b) 00000H 000FFH d) FFF00H - FFFFFH 10) INT 21 service 01H is used to read character from standard input with echo. It returns the result in register. a) AL c) BH b) BL d) CL Question 2 This question is attributed with 9 marks if answered properly Question 2 (9 marks) a) Explain 8086 flag register? (2.5 marks) 1. Carry Flag (CF) - this flag is set to 1 when there is an unsigned overflow. For example when you add bytes 255 + 1 (result is not in range 0...255). When there is no overflow this flag is set to 0. 2. Parity Flag (PF) - this flag is set to 1 when there is even number of one bits in result, and to 0 when there is odd number of one bits. 3. Auxiliary Flag (AF) - set to 1 when there is an unsigned overflow for low nibble (4 bits). 4. Zero Flag (ZF) - set to 1 when result is zero. For non-zero result this flag is set to 0. 5. Sign Flag (SF) - set to 1 when result is negative. When result is positive it is set to 0. (This flag takes the value of the most significant bit.) 6. Trap Flag (TF) - Used for on-chip debugging. 7. Interrupt enable Flag (IF) - when this flag is set to 1 CPU reacts to interrupts from external devices. 8. Direction Flag (DF) - this flag is used by some instructions to process data chains, when this flag is set to 0 - the processing is done forward, when this flag is set to 1 the processing is done backward. 9. Overflow Flag (OF) - set to 1 when there is a signed overflow. For example, when you add bytes 100 + 50 (result is not in range -128...127). b) Fill the following table that describes data-related operators and directives used in assembly language. (3 marks) Operator Usage and Description OFFSET Return the distance of variable from the start of segment. PTR Allows for override of variable's default size. TYPE Returns the size (in bytes) of an operand or each piece of an array. LENGTHOF Returns number of elements in an array. SIZEOF Returns number of bytes used by an array initializer (same as LENGTHOF * TYPE). Provides a way to redefine the same variable with different size LABEL attributes (Provide an alternate size for a variable without using PTR). c) What is the use of Interrupt vector table of 8086 microprocessor and describe the IVT Format? (2 marks) The interrupt vector table contains 256 four byte entries, containing the CS:IP interrupt vectors for each of the 256 possible interrupts. The table is used to locate the interrupt service routine addresses for each of those interrupts using the following equation:

d) Explain the following instructions: (1.5 marks) NEG LOOP SAHF NEG: Arithmetic sign inversion or two s complement (NEG). The NEG instruction two s complements a number, which means that the arithmetic sign of a signed number changes from positive to negative or from negative to positive. LOOP: (Jump to specified label until CX = 0) this is used to repeat a sequence of instructions for the specified number of times. The number of times the specified sequence is to be repeated is stored in CX register. No flags are affected. SAHF: (Store AH register into flag register) It is an instruction used to store the data in the AH register into the lower eight bits of the flag register. Question 3 This question is attributed with 8 marks if answered properly Question 3.a (2.5 marks) This is a trick! The program does not stop, because the first loop instruction decrements EAX to zero.the second LOOP instruction decrements EAX to FFFFFFFFh, causing the outer loop to repeat. Question 3.b (3.5 marks) Task mark 1. Invert the seventh bit in DX (note: the LSB XOR DX, 40H 0.5 mark is the first bit) 2. Set the 5 th and the 11 th bits in AX OR AX, 410H 0.5 mark 3. Calculate the 2's complement of AX NOT AX 0.5 mark INC AX 4. Jump to label 'HELP' if AX is even TEST AX, 01H JZ HELP 0.5 mark 5. Three different instructions that will subtract 1 from register DX Question 3.c AX =2010h EAX =003b008ah AX =0 AX =0044h 1) DEC DX 2) ADD DX, -1 3) SUB DX, 1 1.5 marks (2 marks)

Question 4 This question is attributed with 6 marks. The complete code for this question as the following: TITLE (StackApplications.asm).Model Flat, stdcall.stack 1024 INCLUDE.Data.Code END Irvine32.inc Array1 DWORD 44h, FFh, 555, 11 Msg Byte " Assembly language is easy ",0 (2 mark) Main PROC push esi ; push registers push ecx push ebx mov esi,offset Array1; mov ecx,lengthof Array1 mov ebx,type Array1 call DumpMem mov esi,offset Msg; mov ecx,lengthof Msg mov ebx,type Msg call DumpMem pop ebx ; restore registers pop ecx pop esi exit Main ENDP Main Question 5 This question is attributed with 7 marks. Title CompareStrings.asm.Model small.stack 1024 Include.Data.Code Main PROC mov Irvine16.inc Src Byte First Strnig 1, 0 LSrc EQU $- Src Dst Byte First Strnig 2, 0 Equal Byte EQUAL, 0 Non_Eq Byte NOT EQUAL, 0 (2 marks) AX, @Data mov DS, AX mov SI, Offset Src mov DI, Offset Dst mov CX, LSrc (2 mark) Again: mov AL, [SI] cmp AL. [DI] je Next_Cmp mov DX,Offset Non_Eq jmp Output Next_Cmp: inc SI inc DI loop Again mov DX,Offset Equal Output: call WriteString Exit Main ENDP END Main (3 marks)