New STM32 F7 Series World s 1 st to market, ARM Cortex -M7 based 32-bit MCU
7 Keys of STM32 F7 series 2 1 2 3 4 5 6 7 First. ST is first to sample a fully functional Cortex-M7 based 32-bit MCU : STM32 F7 series Smartest STM32. STM32 F7 architecture is releasing all the potential intelligence of ARM Cortex -M7 and the STM32 peripherals, delivering the smartest STM32 ever. (Like increasing the interconnect of brain neurons) Record Performance. STM32 F4 = 608 CoreMark, STM32 F7 = 1000 CoreMark More math's, more signal processing = Up to 2x DSP performance vs STM32 F4 series Power Efficient. boosts performance, but does not compromise on power efficiency More Everything. Answering the embedded developers for ever more powerful peripherals., more In Out throughputs Innovation Now. optimized balance of innovation and time-to-market, based on state of art 90nm platform Great Investment. Pin-to-pin and code compatible with the STM32 F4 and STM32 Ecosystem Our advanced, future-proof architecture allow us to reach 2000 CoreMark on the next technology node with a fully backwards compatible product
1 First 3 ST is first to sample fully functional Cortex-M7 based 32-bit MCU: STM32 F7 series ST is a lead partner of ARM; ST actively participated to the specification of today s new Cortex -M7 core ST is ready with fully functional samples of the STM32 F7 microcontroller in TFBGA216 The first product of the new F7 series The STM32 F7 product is running several application demonstrations on an STM32 evaluation board. Full functional product today
2 Smartest STM32 4 Being smart is not about brain size, it is about connecting the right amount of neurons at the right time. STM32 F7 is built on the new state-of-art ARM Cortex -M7 core and STM32 F7 is about ST s art of combining and interconnecting the right features around Cortex-M7 core, to deliver the smartest STM32 ever. STM32 F7 architecture releases all the potential intelligence of Cortex-M7 and the STM32 peripherals, delivering the smartest STM32 ever. (Like increasing the interconnect of brain neurons)
2 Smart-system architecture for performance 5 STM32 F7 uses 2 independent mechanisms to reach 0-wait execution performance: ST ART Accelerator for internal Flash memory L1 cache (4 Kbytes + 4 Kbytes instruction and data cache) for external (or internal) memories AXI and Multi-AHB bus matrix with dual GP DMA controllers and dedicated DMA controllers for Ethernet, USB OTG HS and Chrom-ART graphic HW acceleration, Large SRAM with scattered architecture: 320 Kbytes including 240 Kbytes + 16 Kbytes on the bus matrix and 64 Kbytes of Data TCM RAM 16 Kbytes of instruction TCM RAM 4 Kbytes of backup SRAM
2 Smart Architecture Use case 6 Legend: ITCM: Critical Code with deterministic execution DTCM RAM: Critical real time data ( Stack, heap..) System SRAM: Concurrent data transfer CPU or DMA External Memories: Quad SPI, and FMC for data manipulation or code execution SDRAM, QUADSPI, NOR, NAND
3 Record Performance 7 Unleashed by STM32 F7 Silicon Benchmark Cortex-M4 ARM data Cortex-M7 Measured on STM32 F7 Silicon Executing from Embedded Flash Executing from External memory CoreMark/MHz 3.4 5 5 DMIPS/MHz 1.25 2.14 2.14 And : Up to twice more DSP performance increase over Cortex-M4 ARMv7-M architecture, 100% binary forwards compatibility from Cortex-M4 STM32 F7 runs at F CPU = 200 MHz 5 x 200 = 1000 CoreMark
3 3/7 Record Performance 8 STM32 F4 = 608 CoreMark, STM32 F7 = 1000 CoreMark More maths, more signal processing = Up to 2x DSP performance vs STM32 F4 series CoreMark 1200 1000 800 600 1000 CoreMark Cortex-M7 ST 90nm eflash 400 200 0 398 CoreMark Cortex-M3 ST 90nm eflash 608 CoreMark Cortex-M4 ST 90nm eflash 120 180 200 MHz
3 Heavy 3D-vectorial computation benchmark Demo from ST 1/2 9 Heavy 3D-vectorial computation benchmark: Computes a complete picture from equations to generate a 3D picture. Heavy vectorial computation based on floats (vector scaler, normalization etc ) Calculation of reflection and refraction on the objects of the scene Highly recursive (each time an object is hit by a ray, new rays need to be computed for reflexion, refraction and lighting) Key performance enablers: FPU, ART Accelerator, L1 cache, memory interface Ray tracing algorithms are perfect for benchmarking CPU computation efficiency
3 Heavy 3D-vectorial computation benchmark Demo from ST 2/2 10 Code has been developed on STM32F4 No code modification to move from STM32 F4 to STM32 F7 Only L1 Cache activation added Execution time 20.10s 12.23s x1.64 faster 11.01s x1.83 faster STM32 F4 at 180 MHz STM32 F7 at 180 MHz STM32 F7 at 200 MHz
3 Performance benefits for innovation 11 Better application responsiveness Spend less time optimizing code and data size by adding external memory resources with no performance penalty Reduced time to market thanks to metalanguages usage: JAVA,.Net Lower power consumption due to less time spent in Run mode to run the algorithms Combine a DSP and MCU into one chip, combine an MPU and MCU into one chip, better graphic performance for HMIs
4 Power Efficient 12 STM32 F7 power efficiency = STM32 F4 power efficiency STM32 F7 Boosts performance, but does not compromise on power efficiency Typ current STM32 F7 7 CoreMark/mW at 1.8 V ------- STM32 F4 7 CoreMark/mW at 1.8 V Low power modes (leakages kept at the same level than STM32 F4) 120µA Wake up time: 105μs 290µA Wake up time: 22μs 2.2µA 3.1µA Wake up time: 318μs <1µA Dynamic : RUN Mode* STOP Mode Standby Mode w/o and w/ RTC V BAT Mode w/o or w/ RTC Legend: Measurements conditions depend on Room temperature *Run mode Conditions: CoreMark executed from Flash, peripherals OFF
5 More Everything 13 Answering the embedded developers for ever more performance, interconnect possibilities and new peripherals More DMIPS and DSP performance with Cortex-M7 core More determinism with TCM More bus masters More bandwidth with 64-bit AXI bus More performance from external memories with L1-cache More SRAM 320KB More connectivity
6 Innovation Now 14 Right balance of innovation and time-to-market Our priority: deliver innovative, upward compatible, scalable STM32s on-time! STM32 F7 is designed around ST s mass-productionready 90nm embedded Flash platform, best in class : This 90nm e-flash platform has enabled our STM32 F4 series to be world s highest performance Cortex-M based MCU (currently 608 CoreMark at 180 MHz). Refer to coremark.org Everyday MCU developers need to accelerate their innovation pace. Developers have no time to optimize. All their skills must be devoted to innovation, differentiation, and creativity. Computing, data/signal transfer and processing Large embedded and external memory resources with fast access time, all packed inside a small single MCU. Enjoy 1000 CoreMark now!
6 STM32 F7 Demos 15 Pin-to-pin compatibility, enables demonstrations on the same board for STM32 F4 and STM32 F7 devices. STM32 benchmark demonstration shows (in 2 demos) increase of performance on the F7 vs. F4 series : Multi-tasking benchmark: Manages the HMI frames on the display, the buttons on the board, and shows the STM32 core performance to manage 2 computation intensive tasks (decodes and displays simultaneously two MJPEG files from one single USB mass storage device). Key performance enablers: ART Accelerator, L1 cache, ST Chrom-ART Accelerator and bus matrix to send the picture to the LCD. Recursive FPU computation: Computes and displays the Julia set fractal. Key performance enablers: FPU, ART Accelerator, L1 cache.
6 Multi-tasking benchmark 16 Video Player Frame window Controls Window manager (WM) Data Processing Video Processing GUI core JPEG decoder Display process Storage unit manager Requires high CPU resources Frame Rate 13 fps* STM32 F4 at 180 MHz x1.50 faster * : frames per second 20 fps* STM32 F7 at 200 MHz
6 Recursive FPU computation benchmark 17 Fractal Frame window Controls Julia Algorithm Processing Execution time 787 ms Window manager (WM) Display process x1.71 faster 459 ms GUI core Require high CPU resources STM32 F4 at 180 MHz STM32 F7 at 200 MHz
6 Demo from Vestec 1/2 18 Speech-Powered Embedded STM32 F7 Solutions Enabled by the STM32 F7 s powerful core processor, Vestec s EVA-SR s state of the art voice recognition technology offers high recognition accuracy, robustness, and responsiveness to voice control. Key features: EVA-SR is embedded in the STM32 F7 s flash memory, featuring a small footprint (typically 200KB) and low power usage Easy execution for application developers: Choose the wake-up trigger phrase and up to 100 control command phrases to execute the application s function Use Vestec tools for testing and fine-tuning Voice interface advantages: Embedded STM32 F7 solution is simple to design and implement, delivering highly accurate and responsive voice recognition capability Provides a hands-free, convenient and highly desired interface for customers Typical applications include home automation, home appliances, medical, industrial and consumer electronics www.vestec.com
6 Demo from Vestec 2/2 19 Voice HMI Demo States: Low-power state until voice is heard When voice is detected, listens for Trigger Phrase. If Trigger Phrase not detected, returns to-low power state, listening for voice again. If Trigger phrase is detected then listens for up to 100 custom Command Phrases and informs your system of the voice command given STM32 F7 Benefits: Cortex-M7 core with: Dual independent instruction pipelines allows superscalar pipeline to have integer & floating point instructions simultaneously. Floating point min and max (new instruction) improves performance with our searches Smart architecture interconnects the Core, large memories, the input audio data flow, and the graphic output data flow. Vestec software is a static C99 standalone library with no dependencies
7 8 product series / 30 product lines Great Investment 20 2 6 1 High-performance STM32F2x5 STM32F2x7 STM32F401 STM32F411 STM32F405/415 STM32F407/417 STM32F427/437 STM32F429/439 STM32F746/756 Mainstream STM32F030 Value line STM32F0x1 STM32F0x2 STM32F0x8 4 STM32F100 Value line STM32F101 STM32F102 STM32F103 STM32F105/107 5 STM32F301 STM32F302 STM32F303 STM32F3x4 STM32F373 STM32F3x8 6 3 3 Ultra-low-power STM32L0x1 STM32L0x2 STM32L0x3 STM32L100 Value line STM32L151/152 STM32L162 Next Cortex-M0 Cortex-M0+ Cortex-M3 Cortex-M4 Cortex-M7 Legend: new 2 number of lines
CoreMark 7 STM32 road to 2000 CoreMark 21 Fully compatible with the STM32 F4 and fully reuses STM32 Ecosystem Our next step will go for the 2000 CoreMark on the next technology node 2500 2000 CoreMark Cortex-M7 ST next eflash node 2000 1500 1000 398 CoreMark Cortex-M3 ST 90nm eflash 608 CoreMark Cortex-M4 ST 90nm eflash 1000 CoreMark Cortex-M7 ST 90nm eflash Next 500 0 120 180 200 400 MHz F CPU
SUMMARY 7 Keys of STM32 F7 series 22 1 2 First. Smartest STM32. 3 Record Performance. 4 Power Efficient. 5 6 7 More Everything. Innovation Now. Great Investment.
Thank you 23 /STM32 @ST_World st.com/e2e www.st.com/stm32f7