ELEC 5200/6200 Computer Architecture and Design Spring 2017 Lecture 1: Introduction Ujjwal Guin, Assistant Professor Department of Electrical and Computer Engineering Auburn University, Auburn, AL 36849 http://www.eng.auburn.edu/~uguin Adapted from Prof. Vishwani D. Agrawal 1/6/2017 ELEC 5200-001/6200-001 Lecture 1 1
Course Webpage http://www.eng.auburn.edu/~uguin/teaching/e6200_ Spring_2017/course.html Or Go to professor s webpage http://www.eng.auburn.edu/~uguin/ Click on Spring 2017: ELEC 5200/6200: Computer Architecture and Design 1/6/2017 ELEC 5200-001/6200-001 Lecture 1 2
Course Organization Text book: D. A. Patterson and J. L. Hennessy, Computer Organization & Design, the Hardware/Software Interface, Fifth Edition, Morgan Kaufman (Elsevier), 2014, ISBN 978-0-12-407726-3. Instructor: Ujjwal Guin, Broun 325, (334) 844-1835, ujjwal.guin@auburn.edu Graduate Assistant: Sun Wang, shk0005@tigermail.auburn.edu, Broun 362, consulting hours: Friday 1-3 PM. Classroom: Broun 235, MWF 11:00-11:50AM. Lab: Broun 320. 1/6/2017 ELEC 5200-001/6200-001 Lecture 1 3
Student Performance Evaluation Homework (25%) Two Class Tests (25%) Test 1, TBD, 11:00-11:50AM, Broun 235 Test 2, TBD, 11:00-11:50AM, Broun 235 CPU Design Project (25%) Final Exam (25%) TBD, 12:00-2:30PM, Broun 235 Participation in class discussion and attendance of lectures are strongly encouraged. 1/6/2017 ELEC 5200-001/6200-001 Lecture 1 4
Course Objective Learn what a digital computer contains and how it works. Learn design concepts of a modern computer. Gain design experience (through project). 1/6/2017 ELEC 5200-001/6200-001 Lecture 1 5
The Concept of a Computer Application software Systems software User Hardware Operating system compiler assembler Programs user writes and runs 1/6/2017 ELEC 5200-001/6200-001 Lecture 1 6
Software Compiler Assembler Application software, a program in C: swap (int v[ ], int k) {int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; } Application software Systems software Hardware MIPS compiler output, assembly language program: swap; muli $2, $5, 4 add $2, $4, $2 lw $15, 0 ($2) lw $16, 4 ($2) sw $16, 0 ($2) sw $15, 4 ($2) jr $31 See pages 15 MIPS binary machine code: 00000000101000010000000000011000 00000000000110000001100000100001 10001100011000100000000000000000 10001100111100100000000000000100 10101100111100100000000000000000 10101100011000100000000000000100 00000011111000000000000000001000 1/6/2017 ELEC 5200-001/6200-001 Lecture 1 7
The Hardware of a Computer Control Input Datapath Central Processing Unit (CPU) or Processor Memory Application software Systems software Output Hardware 1/6/2017 ELEC 5200-001/6200-001 Lecture 1 8
Instruction Set Instruction Set Architecture (ISA) A set of assembly language instructions (ISA) provides a link between software and hardware. Given an instruction set, software programmers and hardware engineers work more or less independently. ISA is designed to extract the most performance out of the available hardware technology. Application software Systems software Hardware Software Hardware 1/6/2017 ELEC 5200-001/6200-001 Lecture 1 9
ISA Defines registers Defines data transfer modes between registers, memory and I/O Types of ISA RISC, CISC, VLIW, Superscalar Examples: IBM370/X86/Pentium/K6 (CISC) PowerPC (Superscalar) Alpha (Superscalar) MIPS (RISC and Superscalar) Sparc (RISC), UltraSparc (Superscalar) 1/6/2017 ELEC 5200-001/6200-001 Lecture 1 10
Computer Architecture Architecture: System attributes that have a direct impact on the logical execution of a program Architecture is visible to a programmer: Instruction Set Data Representation I/O Mechanisms Memory Addressing 1/6/2017 ELEC 5200-001/6200-001 Lecture 1 11
Computer Organization Organization: Physical details that are transparent to a programmer, such as Hardware implementation of an instruction Control signals Memory technology used Example: System/370 architecture has been used in many IBM computers, which widely differ in their organization. 1/6/2017 ELEC 5200-001/6200-001 Lecture 1 12
CPU Design Project Design and implementation of a processor: Define instruction set Design datapath and control hardware Implement hardware in FPGA Verify 1/6/2017 ELEC 5200-001/6200-001 Lecture 1 13
Research and Developments of Continuing Interest Instruction level parallelism (ILP) Multi-core systems and chip multi-processing (CMP) Processors Inter-processor communication Memory organization Operating system Programming languages Computing algorithms Energy efficiency and low power design Embedded systems Quantum computing, biological computing,... 1/6/2017 ELEC 5200-001/6200-001 Lecture 1 14
Summary A computer processes digital data. A user solves problems by writing and running programs written in a high-level programming language like C. Inside computer, system programs called compiler and assembler break the user program down into assembly code (instruction set) and then into binary machine code. The machine code is processed by the 5-piece hardware (control unit, datapath, memory, input and output) to obtain the desired result. Readings on architecture (posted at course website): S. Borkar and A. A. Chen, The Future of Microprocessors, Comm. ACM, vol. 54, no. 5, pp. 67-77, May 2011. L. Hoffmann, Q&A: RISC and Reward (An Interview with David Patterson), Comm. ACM, vol. 57, no. 3, pp. 112, 111, March 2014. 1/6/2017 ELEC 5200-001/6200-001 Lecture 1 15