Representation of Non Negative Integers

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Representation of Non Negative Integers In each of one s complement and two s complement arithmetic, no special steps are required to represent a non negative integer. All conversions to the complement number systems begin with conversion to simple binary representation, often from decimal notation. The only issue with non negative integers is to insure that the number is not too large for the number of bits used in the representation. There are two ways to define this size limitation in the complement numbers system. 1. The most significant bit (leftmost) must be a 0 for non negative numbers. 2. For an N bit representation, the number must be less than 2 N 1. The biggest signed 8 bit integer is 2 7 1= 127. The biggest signed 16 bit integer is 2 15 1= 32767. Three 8 bit examples: 100 = 0110 0100 22 = 0001 0110 0 = 0000 0000

Negative Numbers and Subtraction The adders we designed can add only non-negative numbers If we can represent negative numbers, then subtraction is just the ability to add two numbers (one of which may be negative). We ll look at three different ways of representing signed numbers. How can we decide representation is better? The best one should result in the simplest and fastest operations. This is just like choosing a data structure in programming. We re mostly concerned with two particular operations: Negating a signed number, or converting x into -x. Adding two signed numbers, or computing x + y. So, we will compare the representation on how fast (and how easily) these operations can be done on them Subtraction (lvk) 1

Representation of Negative Numbers Sign Binary Integers (word length: n=4) Note: 1000 represent -0 in sign and magnitude system and -8 in 2 s complement system and -7 in 1 s complement system

Comparing the signed number systems Here are all the 4-bit numbers in the different systems. Positive numbers are the same in all three representations. Signed magnitude and one s complement have two ways of representing 0. This makes things more complicated. Two s complement has asymmetric ranges; there is one more negative number than positive number. Here, you can represent -8 but not +8. However, two s complement is preferred because it has only one 0, and its addition algorithm is the simplest. Decimal S.M. 1 s comp. 2 s comp. 7 0111 0111 0111 6 0110 0110 0110 5 0101 0101 0101 4 0100 0100 0100 3 0011 0011 0011 2 0010 0010 0010 1 0001 0001 0001 0 0000 0000 0000-0 1000 1111-1 1001 1110 1111-2 1010 1101 1110-3 1011 1100 1101-4 1100 1011 1100-5 1101 1010 1011-6 1110 1001 1010-7 1111 1000 1001-8 1000 Subtraction (lvk) 12

Ranges of the signed number systems How many negative and positive numbers can be represented in each of the different systems on the previous page? Unsigned Signed Magnitude One s complement Two s complement Smallest 0000 (0) 1111 (-7) 1000 (-7) 1000 (-8) Largest 1111 (15) 0111 (+7) 0111 (+7) 0111 (+7) In general, with n-bit numbers including the sign, the ranges are: Unsigned Signed Magnitude One s complement Two s complement Smallest 0 -(2 n-1-1) -(2 n-1-1) -2 n-1 Largest 2 n -1 +(2 n-1-1) +(2 n-1-1) +(2 n-1-1) Subtraction (lvk) 13

Converting signed numbers to decimal Convert 110101 to decimal, assuming this is a number in: (a) signed magnitude format (b) ones complement (c) two s complement Subtraction (lvk) 14

Example solution Convert 110101 to decimal, assuming this is a number in: Since the sign bit is 1, this is a negative number. The easiest way to find the magnitude is to convert it to a positive number. (a) signed magnitude format Negating the original number, 110101, gives 010101, which is +21 in decimal. So 110101 must represent -21. (b) ones complement Negating 110101 in ones complement yields 001010 = +10 10, so the original number must have been -10 10. (c) two s complement Negating 110101 in two s complement gives 001011 = 11 10, which means 110101 = -11 10. The most important point here is that a binary number has different meanings depending on which representation is assumed. Subtraction (lvk) 15

Two s Complement Arithmetic We now address the issue of representing integers as binary strings in a computer. There are four formats that have been used in the past; only one is of interest to us. The four formats are 1. Sign Magnitude 2. One s Complement 3. Two s Complement 4. Excess N, where N is some positive integer; say 127 for Excess 127. Sign magnitude representation is obsolete. Excess 127 representation is only used as part of floating point representations. If discussed at all, it will be in the context of the IEEE 754 standard. We focus on Two s complement, but discuss one s complement arithmetic as a mechanism for generating the two s complement.

Signed magnitude representation Humans use a signed-magnitude system: we add + or - in front of a magnitude to indicate the sign. We could do this in binary as well, by adding an extra sign bit to the front of our numbers. By convention: A 0 sign bit represents a positive number. A 1 sign bit represents a negative number. Examples: 1101 2 = 13 10 (a 4-bit unsigned number) 0 1101 = +13 10 (a positive number in 5-bit signed magnitude) 1 1101 = -13 10 (a negative number in 5-bit signed magnitude) 0100 2 = 4 10 (a 4-bit unsigned number) 0 0100 = +4 10 (a positive number in 5-bit signed magnitude) 1 0100 = -4 10 (a negative number in 5-bit signed magnitude) Subtraction (lvk) 2

Two s complement Our final idea is two s complement. To negate a number, complement each bit (just as for ones complement) and then add 1. Examples: 1101 2 = 13 10 (a 4-bit unsigned number) 0 1101 = +13 10 (a positive number in 5-bit two s complement) 1 0010 = -13 10 (a negative number in 5-bit ones complement) 1 0011 = -13 10 (a negative number in 5-bit two s complement) 0100 2 = 4 10 (a 4-bit unsigned number) 0 0100 = +4 10 (a positive number in 5-bit two s complement) 1 1011 = -4 10 (a negative number in 5-bit ones complement) 1 1100 = -4 10 (a negative number in 5-bit two s complement) Subtraction (lvk) 7

Taking the Two s Complement (Part 2) The recipe for taking the two s complement of a binary number is simple. 1. Take the one s complement of the number 2. Add 1 to that complement. + 100 in 8 bit two s complement binary 0110 0100 100 in 8 bit two s complement binary Represent +100 as an 8 bit number 0110 0100 Take the one s complement 1001 1011 Add 1 1 100 is represented as 1001 1100 + 22 in 8 bit two s complement binary 0001 0110 22 in 8 bit two s complement binary Represent +22 as an 8 bit number 0001 0110 Take the one s complement 1110 1001 Add 1 1 22 is represented as 1110 1010

Taking the Two s Complement (Part 3) +0in8 bit two s complement binary 0000 0000 0in8 bit two s complement binary Represent +0 as an 8 bit number 0000 0000 Take the one s complement 1111 1111 Add 1 1 Discard the high carry bit 0 is represented as 0000 0000 Claim: 1in8 bit two s complement binary is 1111 1111. 127 and 128 in 8 bit two s complement binary. + 127 in 8 bit two s complement binary 0111 1111 127 in 8 bit two s complement binary Represent +127 as an 8 bit number 0111 1111 Take the one s complement 1000 0000 Add 1 1 127 is represented as 1000 0001 128 is one less than 127, so is represented as 1000 0000

Standard Ranges Here is the standard Java implementation of Two s Complement arithmetic. In general the range for N bit two s complement arithmetic is 2 N 1 to 2 N 1 1 Java Type Number of Bits Lower Limit Upper Limit byte 8 128 127 short 16 32768 32767 int 32 2147483648 2147483647 long 64 2 63 2 63 1 Log 10 (2) is about 0.30103. Log 10 (3) is about 0.47712. Log 10 (2 63 )isabout0.30103 63 = 18.9649. Log 10 (9) = Log 10 (3 2 )=2 Log 10 (3) =2 0.47712 = 0.95424. As 0.9649 > Log 10 (9), we concludethat2 63 is bigger than 9 10 18.

Standard Values in N Bit Two s Complement Arithmetic (With Examples for 16 bit integers) 0 is represented by N zeroes 0000 0000 0000 0000 1 is represented by N ones 1111 1111 1111 1111 2 N 1 is represented by a 1 followed by (N 1) zeroes 1000 0000 0000 0000 The student should memorize these patterns and not bother with standard conversion techniques when obtaining them. Technically speaking, the representation of 2 N 1 cannot be derived by standard means, as 2 N 1 cannot be represented.

Two s complement addition Negating a two s complement number takes a bit of work, but addition is much easier than with the other two systems. To find A + B, you just have to: Do unsigned addition on A and B, including their sign bits. Ignore any carry out. For example, to find 0111 + 1100, or (+7) + (-4): First add 0111 + 1100 as unsigned numbers: 0 1 1 1 + 1 1 0 0 1 0 0 1 1 Discard the carry out (1). The answer is 0011 (+3). Subtraction (lvk) 9

More about two s complement Two other equivalent ways to negate two s complement numbers: You can subtract an n-bit two s complement number from 2 n. 1 0 0 0 0 0-0 1 1 0 1 (+13 10 ) 1 0 0 1 1 (-13 10 ) 1 0 0 0 0 0-0 0 1 0 0 (+4 10 ) 1 1 1 0 0 (-4 10 ) You can complement all of the bits to the left of the rightmost 1. 01101 = +13 10 (a positive number in two s complement) 10011 = -13 10 (a negative number in two s complement) 00100 = +4 10 (a positive number in two s complement) 11100 = -4 10 (a negative number in two s complement) Often, people talk about taking the two s complement of a number. This is a confusing phrase, but it usually means to negate some number that s already in two s complement format. Subtraction (lvk) 8

Another two s complement example To further convince you that this works, let s try adding two negative numbers 1101 + 1110, or (-3) + (-2) in decimal. Adding the numbers gives 11011: 1 1 0 1 + 1 1 1 0 1 1 0 1 1 Dropping the carry out (1) leaves us with the answer, 1011 (-5). Subtraction (lvk) 10

Addition of 2 s Complement Numbers Different cases in addition of 2 s complement numbers for n=4 Case 1: Addition of two positive numbers, sum < 2 n-1 Case 2: Addition of two positive numbers, sum > 2 n-1 Overflow since +11 requires 5 bits including sign

Addition of 2 s Complement Numbers Case 3: Addition of positive and negative numbers (negative number has greater magnitude) Case 4: Same as case 3 except positive number has greater magnitude the carry from the sign bit is ignored (NOT overflow)

Addition of 2 s Complement Numbers Case 5: Addition of two negative numbers, sum 2 n-1 the last carry is ignored (NOT overflow) Case 6: Addition of two negative numbers, sum > 2 n-1 Overflow since -11 requires 5 bits including sign

Signed overflow With two s complement and a 4-bit adder, for example, the largest representable decimal number is +7, and the smallest is -8. What if you try to compute 4 + 5, or (-4) + (-5)? 0 1 0 0 (+4) + 0 1 0 1 (+5) 0 1 0 0 1 (-7) 1 1 0 0 (-4) + 1 0 1 1 (-5) 1 0 1 1 1 (+7) We cannot just include the carry out to produce a five-digit result, as for unsigned addition. If we did, (-4) + (-5) would result in +23! Also, unlike the case with unsigned numbers, the carry out cannot be used to detect overflow. In the example on the left, the carry out is 0 but there is overflow. Conversely, there are situations where the carry out is 1 but there is no overflow. Subtraction (lvk) 17

Detecting signed overflow The easiest way to detect signed overflow is to look at all the sign bits. 0 1 0 0 (+4) + 0 1 0 1 (+5) 0 1 0 0 1 (-7) 1 1 0 0 (-4) + 1 0 1 1 (-5) 1 0 1 1 1 (+7) Overflow occurs only in the two situations above: If you add two positive numbers and get a negative result. If you add two negative numbers and get a positive result. Overflow cannot occur if you add a positive number to a negative number. Do you see why? Subtraction (lvk) 18

Overflow: Busting the Arithmetic The range of 16 bit two s complement arithmetic is 32,768 to 32,767 Consider the following addition problem: 24576 + 24576. Now + 24,576 (binary 0110 0000 0000 0000) is well within the range. 0110 0000 0000 0000 24576 0110 0000 0000 0000 24576 1100 0000 0000 0000 16384 What happened? We had a carry into the sign bit. This is overflow. The binary representation being used cannot handle the result. NOTE: This works as unsigned arithmetic. 24,576 + 24,576 = 49,152 = 32768 + 16384. When we design a binary adder for N bit integers (N > 1), we shall address the standard method for detecting overflow.

Saturation Arithmetic Saturation arithmetic is applied to unsigned N bit integers. The unsigned range is 0 2 N 1. N=8 0 through 255 N=16 0 through 65535 N=32 0 through 4,294,967,295 Saturation arithmetic is commonly appliedto8 bit integers used in computer graphics. RULES: In addition, if the sum is greater than 2 N 1, set it to 2 N 1. In subtraction, if the number is less than 0, set it to 0. Examples (8 bit saturation arithmetic) 100 + 100 =200 128 + 128 =255 128 + 127 =255 200 + 200 =255 255 + 255 =255 Result: Brightening a bright scene does not accidentally make it dark.

Sign extension In everyday life, decimal numbers are assumed to have an infinite number of 0s in front of them. This helps in lining up numbers. To subtract 231 and 3, for instance, you can imagine: 231-003 228 You need to be careful in extending signed binary numbers, because the leftmost bit is the sign and not part of the magnitude. If you just add 0s in front, you might accidentally change a negative number into a positive one! For example, going from 4-bit to 8-bit numbers: 0101 (+5) should become 0000 0101 (+5). But 1100 (-4) should become 1111 1100 (-4). The proper way to extend a signed binary number is to replicate the sign bit, so the sign is preserved. Subtraction (lvk) 19

Signed Numbers are Sign-Extended to Infinity! Memorize this idea. It will save you every time when you are doing binary arithmetic by hand. 0111 in twos complement is actually 00000111 1011 in twos complement is actually 11111011 1011 + 1100 = 10111. This is overflow. But can you see it? Look again: 11111011 + 11111100 = 11110111 The sign of the result (1) is different than bit 3 (0). We cannot represent the result in 4 bits The sign of the result is extended to infinity Check this every time in your answers and you will always see the precision of the result (number of significant bits) very clearly. Sign-extend inputs to infinity Do the math on an infinite number of bits (conceptually) Truncate the result to the desired output type Subtraction (lvk) 20

Sign Extension In two s complement arithmetic, the leftmost bit is the sign bit. It is 1 for negative numbers 0fornon negative numbers Sign extension is the process of converting a N bit representation to alargerformat;e.g.,a16 bit number to a 32 bit number. Example: + 100 in 8 bit two s complement binary 0110 0100 + 100 in 16 bit two s complement binary 0000 0000 0110 0100 100 in 8 bit two s complement binary 1001 1100 100 in 16 bit two s complement binary 1111 1111 1001 1100 Rule just extend the sign bit to fill the new high order bits.

Subtraction summary A good representation for negative numbers makes subtraction hardware much easier to design. Two s complement is used most often (although signed magnitude shows up sometimes, such as in floating-point systems, which we ll discuss later). Using two s complement, we can build a subtractor with minor changes to the adder from last time. We can also make a single circuit which can both add and subtract. Overflow is still a problem, but signed overflow is very different from the unsigned overflow we mentioned last time. Sign extension is needed to properly lengthen negative numbers. After the midterm we ll use most of the ideas we ve seen so far to build an ALU an important part of a processor. Subtraction (lvk) 25