HC912D60A / HC912Dx128A 0.5µ Microcontrollers Mask sets 2K38K, 1L02H/2L02H/3L02H & K91D, 0L05H/1L05H/2L05H

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Freescale Semiconductor Engineering Bulletin EB664 Rev. 6, 08/2006 HC912D60A / HC912Dx128A 0.5µ Microcontrollers Mask sets 2K38K, 1L02H/2L02H/3L02H & K91D, 0L05H/1L05H/2L05H by: Devaganesan Rajoo HC12 Product Manager This document explains certain characteristics of the following devices: HC912D60A mask sets 2K38K from TSMC and 1L02H, 2L02H, and 3L02H from TSC6 (SND-FAB) HC912Dx128A mask sets K91D from TSMC and 0L05H, 1L05H, and 2L05H from TSC6 (SND-FAB) Table of Contents 1 Introduction.............................. 1 2 Issue Description......................... 2 3 Issue Cause............................. 2 4 Freescale Recommendation................. 3 5 POR Clarification......................... 3 6 Additional Notes: HC12 POR Description....... 4 1 Introduction As a result of an investigation into issues reported by customers and analysis of related application modules, Freescale has found that some units behave in a manner that may lead to these issues when the microcontroller is operated outside of its specification. This document describes this behavior and tells customers how to avoid the conditions that give rise to the issue. Freescale Semiconductor, Inc., 2006. All rights reserved.

Issue Description 2 Issue Description Some applications have encountered a situation where the microcontroller occasionally fails to restart when the power is cycled off and on, but V DD fails to decay to zero volts within the cycle period, and toggling the reset pin does not recover the microcontroller. 3 Issue Cause Freescale's analysis has determined that the cause of the issue is a disturbance of reset or residual voltage applied to the device, which may be caused by a combination of factors present on the application. Such factors include bounce on the reset line and the improper decay of V DD to zero volts. The impact of bounce on the reset line is heightened by the lower operating voltage during the power off cycle. The diagram below illustrates one such situation whereby reset toggling features an unusual pulse that coincides with non-por (power on reset) V DD level, and the oscillator does not restart even after reset and V DD are returned to 5V (device is locked-up). Figure 1. Reset Toggling Featuring an Unusual Pulse As a result of these factors, the oscillator is disabled and prevented from being re-started, a situation similar to a stop mode. After the device has entered into this locked-up state, toggling the external reset pin does not restart the oscillator, as it would following a software stop instruction. This situation requires a power on reset to recover the device. Freescale notes no fault with the external reset, which is designed to reset the device while V DD is within the operational range. 2 Freescale Semiconductor

Freescale Recommendation If the voltage drops low enough to induce POR, then this issue does not arise. 4 Freescale Recommendation Applications should be reviewed to determine whether the power down cycle shows any indication of fluctuating low voltages or unstable behavior on the reset. It is recommended that whenever V DD is powered off, the application should be arranged to allow V DD to decay to 0.1V or less, to guarantee POR operation, before a clean rise back to the recommended operating voltage. 5 POR Clarification Device specification 9.6.1 Power-On Reset states The POR circuit only initializes internal circuitry during cold starts and cannot be used to force a reset as system voltage drops. Cold start is conventionally understood to be 0V, but for practical application purposes, Freescale recommends a voltage level lower than 100mV. NOTE HC12 0.5υ family of parts is considered to be of older technology and Freescale does not plan on any design revisions of these devices. Newer versions of the HC12 parts exist in the HCS12 family of products. The issue addressed in this document does not apply to the HCS12 family of products because the reset circuitry is a different design. Freescale Semiconductor 3

Additional Notes: HC12 POR Description 6 Additional Notes: HC12 POR Description These notes are provided to help with the understanding of the POR circuit. Architecture was designed in 1990. Circuit uses SR latch with cap to V DD on S input and cap to V SS on R input, as described in the figure below: Figure 2. SR Latch with Cap to VDD on S Input and Cap to V SS on R Input When V DD ramps, a positive voltage difference in favor of the S input is required to initialize the POR circuit. When V DD powers down, the capacitor will start to discharge. The voltage on the S input must discharge to a sufficiently low value with respect to the R input to ensure that the latch resets before the next V DD ramp. This action re-arms the POR circuit. The POR circuit is not a forced circuit. It uses charging and discharging capacitors. Therefore the re-arm voltage of the circuit is not an absolute, and it is impossible to specify an exact re-arm voltage. To guarantee a proper recovery, V DD must go to 0.1V or below to margin against process variations affecting switch-points and discharge currents. 4 Freescale Semiconductor

Additional Notes: HC12 POR Description Freescale Semiconductor 5

How to Reach Us: Home Page: www.freescale.com E-mail: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 +1-800-521-6274 or +1-480-768-2130 support@freescale.com Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen, Germany +44 1296 380 456 (English) +46 8 52200080 (English) +49 89 92103 559 (German) +33 1 69 35 48 48 (French) support@freescale.com Japan: Freescale Semiconductor Japan Ltd. Headquarters ARCO Tower 15F 1-8-1, Shimo-Meguro, Meguro-ku, Tokyo 153-0064 Japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com Asia/Pacific: Freescale Semiconductor Hong Kong Ltd. Technical Information Center 2 Dai King Street Tai Po Industrial Estate Tai Po, N.T., Hong Kong +800 2666 8080 support.asia@freescale.com Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Freescale Semiconductor reserves the right to make changes without further notice to any products herein. Freescale Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals, must be validated for each customer application by customer s technical experts. Freescale Semiconductor does not convey any license under its patent rights nor the rights of others. Freescale Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold Freescale Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part. Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. Freescale Semiconductor, Inc. 2006. All rights reserved. For Literature Requests Only: Freescale Semiconductor Literature Distribution Center P.O. Box 5405 Denver, Colorado 80217 1-800-441-2447 or 303-675-2140 Fax: 303-675-2150 LDCForFreescaleSemiconductor@hibbertgroup.com EB664 Rev. 6, 08/2006