The World Leader in High Performance Signal Processing Solutions. DSP Processors

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The World Leader in High Performance Signal Processing Solutions DSP Processors NDA required until November 11, 2008

Analog Devices Processors Broad Choice of DSPs Blackfin Media Enabled, 16/32- bit fixed point Micro + DSP Networked Media Automotive Infotainment Automotive Vision SHARC Floating Point Motor Control Industrial Control Professional Audio SigmaDSP Low-Cost Audio, post processing Integrated Codecs Algorithms Easy to Use (SigmaStudio) 2

Blackfin Processor Portfolio Lower Power Highest Performance Future BF592 BF504 BF512 BF522 BF523 BF531 BF533 BF534 BF535 BF538 BF542 BF561 BF60x BF506 BF514 BF524 BF525 BF532 BF536 BF539 BF544 BF516 BF526 BF527 BF537 BF547 BF518 BF548 Lowest BOM Cost BF549 Baseline Connectivity System-Level Connectivity Low Standby Lockbox Security System Integration (Flash, Mixed-Signal) 600 MHz or Greater Multicore

The New Blackfin -BF592 Best-in-class cost/performance 400 MHz for $3 at 10k Performance up to 400 MHz (dual MAC) Small Footprint 9x9mm 5 MIPs/mm 2 Lowest pin count Blackfin 64 LFCSP Low cost development tools $199 BF592 EZ-KIT Lite $150 ICE-100B Blackfin Emulator 90 day VisualDSP++ Test Drive

Blackfin BF592 Low-Cost, Low-Power Embedded Processor Test and Interrupt Watchdog 32 bit PLL & Power Emulate Controller Timer Core Timer Management 400MHz Blackfin Processor Core Data SRAM 32kB Data Scratchpad SRAM 4kB Instruction ROM 64kB Instruction SRAM 32kB L1 Boot ROM 4kB L3 DMA Controller I/O Signal Multiplexing TWI SPORT0,1; SPI0,1; UART 16-bit PPI 3 x 32 bit ITU-656 Timer/Counters 32 GPIO s 90nm LP process 16-bit PPI (ITU-R 656) Dual SPORT Dual SPIs 400 MHz maximum core clock frequency 36kB data SRAM, 32kB instruction SRAM 64kB L1 instruction ROM VDK & RTL 4kB L3 boot ROM <1mA static leakage current (typ at 25C) Fully software compatible with BF5xx family 9mm x 9 mm 64 LFCSP (QFN) package -40 to +85 C

SHARC Processor Portfolio Higher Performance 21261 21262 21266 21362 21363 21364 1 1 21371 21375 21368 21369 21365 21366 21367 1 21478 21479 21483 21486 21487 21467 21469 Future 21488 21489 Performance > 2 GFLOPS Application-Specific Peripherals Configurable Applications I/O Interface Low Cost Audio Decoders in ROM Hardware Accelerators High Speed Interprocessor Communication (Link Ports) Low Power 1-21363, 21364, and 21366 do not have hardware accelerators. 6 Automotive grade available.

3 rd & 4 th Generation SHARC Comparison Family 21364 21369 21371 21469 2147x 2148x Performance 200-333MHz 266-400MHz 200-266MHz 400-450MHz 200-266MHz 300-400MHz MMACS 400 666MMACS 532-800MMACS 400-532MMACS 800-900MMACS 400-532MMACS 600-800MMACS On-chip SRAM External Memory I/F Key Peripherals Other features Core Power (Max, 25 o C) Package Options Max Ambient Temp Option 3Mbits 2Mbits 1Mbits 5Mbits 5Mbits (21479) 3Mbits (21478) SRAM, Flash 6 SPORT, 2 SPI PWM, SPDIF, 2 PCG 32-bit SDRAM, SRAM, Flash 8 SPORT, 2 SPI, 2 UART, TWI, PWM, SPDIF, 4 PCG 32-bit SDRAM, SRAM, Flash 8 SPORT, 2 SPI, UART, TWI PWM, SPDIF, 4 PCG 16-bit DDR2, SRAM, Flash 8 SPORT, 2 SPI, UART,TWI,PWM SPDIF, 4 PCG, 2 Link Ports ASRC ASRC - ASRC, FIR/IIR/FFT, VISA Code 960mW (333MHz, 1.2V) LQFP 20x20mm BGA 12x12mm +85 o C 333MHz +105 o C 200MHz 1430mW (400MHz, 1.3V) LQFP 28x28mm BGA 27x27mm +70 o C 400MHz +85 o C 333MHz 720mW (266MHz, 1.2V) 773mW (450MHz, 1.1V) 16-bit SDRAM, SRAM, Flash (BGA only) 8 SPORT, 2 SPI, UART, TWI, 4 PWM, SPDIF, 4 PCG ASRC, WDT RTC, Shifter, FIR/IIR/FFT, VISA Code 193mW (266MHz, 1.2V) LQFP 28x28mm BGA 19x19mm LQFP 14x14mm BGA 12x12mm +85 o C 266MHz +105 o C 200MHz +70 o C 450MHz +85 o C 400MHz +85 o C 266MHz +105 o C 200MHz 5Mbits (21489) 3MBits (21488) 16-bit SDRAM, SRAM, Flash (LQFP 24x24 only) 8 SPORT, 2 SPI, UART, TWI, 4 PWM, SPDIF, 4 PCG ASRC, WDT, FIR/IIR/FFT, VISA Code 617mW (400MHz, 1.1V) LQFP 14x14mm LQFP 24x24mm +85 o C 400MHz Schedule Released Released Released Released X-grade : Oct 10 RTP : Mar 11 (QFP) Apr 11 (BGA X-grade : Now RTP : Dec 10 Price (1K QTY) Lowest Cost Device 7 $29.15 (333MHz) $19.69 (266MHz) SHARC Products with optional ROM are not listed here $13.27 (266MHz) $28.50 (400MHz) $7.99 (200MHz 21478 100QFP) $10.35 (300MHz 21488 100QFP)

-214xx Features Comparison Table 21467 21469 21478 21479 21483 21486 21487 21488 21489 Max Core Frequency (MHz) 450 450 266 266 400 400 400 400 400 Core Voltage (V) 1.1 1.1 1.2 1.2 1.1 1.1 1.1 1.1 1.1 RAM (Mbit) 5 5 3 5 3 5 5 3 5 ROM (Mbit) 4 0 0 0 4 4 4 0 0 Audio Decoders in ROM Yes N/A N/A N/A Yes Yes Yes N/A N/A ASRC Performance (up to) -128 db -128 db -128 db -128 db -128 db -128 db -128 db -140 db -128 db DDR2 16-bit 16-bit N/A N/A N/A N/A N/A N/A N/A SDRAM N/A N/A 16-bit 16-bit 16-bit N/A 16-bit 16-bit 16-bit Asynchronous Mem Int 8-bit 8-bit 16-bit 16-bit 16-bit 16-bit 16-bit 16-bit 16-bit Link Ports 2 2 NO NO NO NO NO NO NO Thermal Diode YES YES YES YES YES YES YES YES YES Watchdog Timer NO NO YES YES YES YES YES YES YES Real Time Clock NO NO YES YES NO NO NO NO NO Shift Register NO NO YES YES NO NO NO NO NO Package 324-Ball CSP_BGA 196-ball CSP_BGA (12 x 12 mm) 100-ld LQFP_EP (14 x 14 mm) 176-ld LQFP_EP (24 x 24 mm) 100-ld LQFP_EP (14 x 14 mm) Common Features VISA, 8 SPORTs, 2 SPIs, S/PDIF, UART, TWI, 4 PWMs, MLB, DTCP, MTM, 4 PCGs, 2 Timers, DAI/DPI (SRUs), IDP/PDAP; FIR, IIR, and FFT HW acc, Direct DMA from SPORT to External Port 8 Only available in 100-ld LQFP package Not available in 100-ld LQFP package Pin compatible packages Only 3 PWMs available in 100-ld LQFP package Automotive only

-21469 Block Diagram Thermal Diode 450 MHz (1.1V) SHARC5 5Mb RAM 64 External Port DDR2 DRAM 225 MHz 24 16/8 Addr Data Enhanced Core JTAG Test & Emulation FIR Engine IIR Engine FFT Engine Async Mem I/F 32 8 Data I/O Processor 9 IRQ/ Flags Digital Audio Interface Precision Clock Generators (4) SPDIF Rx/Tx Routing Unit IOP Register Control, Status, Data DAI DAI Pins SPORTs (8) Input Data Port/PDAP ASRC DMA Controller SPI (2) TWI GPIO 20 14 Link Ports(2) Routing Unit DPI DPI Pins GP Timers (2) UART Digital Peripheral Interface 16

DEVELOPMENT TOOLS Anal 10

Andromeda Integrated Development Environment Based upon the Eclipse IDE framework Extensible framework, tools and run-times Optimized for ADI processors Supporting unicore, homogeneous and heterogeneous multicore devices Multiple Toolchain Support gcc toolchain Blackfin ARM (Linaro based) Proprietary toolchain DSPs Blackfin SHARC Code generation improvements Assembly ANSI C99, ANSI C++2003, Embedded C99 32 bit FRACT support Advanced debugging capabilities MISRA-C (Motor Industry Software Reliability Association) Static code analysis Stack overflow detection Heap tracking Windows and Linux host support Anal 11

Andromeda IDE Anal 12