FSU. Av oiding Unconditional Jumps by Code Replication. Frank Mueller and David B. Whalley. Florida State University DEPARTMENT OF COMPUTER SCIENCE

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1 Av oiding Unconditional Jumps by Code Replication by Frank Mueller and David B. Whalley Florida State University

2 Overview uncond. jumps occur often in programs [4-0% dynamically] produced by loops, conditional statements, etc. can almost always be avoided technique to avoid uncond. jumps introduction evaluation 2

3 Motivation code generated includes uncond. jumps for while-loops and for-loops typically if-then-else construct always other language constructs (break, goto, continue in C) asaside-effect of optimizations uncond. jump instruction can be avoided when code is replicated from the target methods often employed for certain class of loops in frontend new method ispart of optimizations in back-end of compiler can be applied universally to all uncond. jumps may introduce sources for other optimizations 3

4 Example While-Loop (RTLs for 68020) without replication i=; while (x[i]) { x[i-] = x[i]; i++; } with replication a[0]=a[6]+x.+; NZ=B[a[6]+x.+]?0; a[]=a[0]; PC=NZ==0,L6; L5 a[0]=a[6]+x.; NZ=B[a[0]]?0; L000 PC=NZ==0,L6; B[a[0]]=B[a[0]+]; B[a[0]-]=B[a[]++]; a[0]=a[0]+; a[0]=a[0]+; NZ=B[a[0]+]?0; PC=L5; PC=NZ!=0,L000; L6... L6... 4

5 Example 2 For-Loop (RTLs for 68020) without replication for (i = k; i < 0; i++) x[i] = y[i]; with replication L9 L8 d[0]=l[a[6]+k.]; a[0]=d[0]+a[6]+x.; a[]=d[0]+a[6]+y.; PC=L8; B[a[0]++]=B[a[]++]; d[0]=d[0]+; L9 d[0]=l[a[6]+k.]; NZ=d[0]?0; PC=NZ>=0,L000; a[0]=d[0]+a[6]+x.; a[]=d[0]+a[6]+y.; B[a[0]++]=B[a[]++]; d[0]=d[0]+; NZ=d[0]?0; NZ=d[0]?0; PC=NZ<0,L9; PC=NZ<0,L9;... L

6 Example 3 Exit Condition in the Middle of a Loop (RTLs for 68020) i=; while (i++ < n) x[i-] = x[i]; without replication with replication L5 d[]=; a[0]=a[6]+x.; d[0]=; d[]=2; NZ=d[0]?L[_n]; PC=NZ>=0,L6; a[0]=a[6]+x.+; d[0]=d[]; a[0]=a[0]+; d[]=d[]+; L000 NZ=d[0]?L[_n]; B[a[0]]=B[a[0]+]; PC=NZ>=0,L6; a[0]=a[0]+; B[a[0]]=B[a[0]+]; d[0]=d[]; PC=L5; d[]=d[]+; L6... NZ=d[0]?L[_n] PC=NZ<0,L000; L6... 6

7 Example 4 If-Then-Else Statement (RTLs for 68020) without replication if (i > 5) i=i/n; else i=i*n; return(i); with replication L22 L23 NZ=L[a[6]+i.]?5; PC=NZ<=0,L22; d[0]=l[a[6]+i.]; d[0]=d[0]/l[a[6]+n.]; L[a[6]+i.]=d[0]; PC=L23; d[0]=l[a[6]+i.]; d[0]=d[0]*l[a[6]+n.]; L[a[6]+i.]=d[0]; a[6]=uk; PC=RT; L22 NZ=L[a[6]+i.]?5; PC=NZ<=0,L22; d[0]=l[a[6]+i.]; d[0]=d[0]/l[a[6]+n.]; L[a[6]+i.]=d[0]; a[6]=uk; PC=RT; d[0]=l[a[6]+i.]; d[0]=d[0]*l[a[6]+n.]; L[a[6]+i.]=d[0]; a[6]=uk; PC=RT; 7

8 Remote Preheader No Preheader Remote Preheader 8

9 Algorithm JUMPS. set up matrix (used to find shortest replication sequence) 2. traverse basic blocks until uncond. jump found 3. choose replication sequence (towards return or loop) 4. expand replication sequence to include all blocks within a loop 5. replicate code and adjust its control flow 6. adjust control flow ofportion of loops which was not copied 7. if control flow has become non-reducible then remove replicated code 9

10 Interference with Natural Loops Without Replication With Partial Replication With Loop Replication

11 Partial Overlapping of Natural Loops Initial Control Flow After Replication Adjusted Control Flow 2

12 Measurements for Motorola 68020/6888 and Sun SPARC test programs included benchmarks UNIX utilities applications instrumentation of programs at code generation time compiled with different sets of optimizations: SIMPLE: standard opt. LOOPS: standard opt. + code replication at loops JUMPS: standard opt. + generalized code repl. 3

13 Measurements (cont.) Number of Static and Dynamic Instructions (Sun SPARC) Sun SPARC program static instructions dynamic instructions executed SIMPLE LOOPS JUMPS SIMPLE LOOPS JUMPS cal % +2.89% 37, % -3.5% quicksort % +50.6% 836, % -4.2% wc % % 540, % -.96% grep % %,930, % -3.57% sort, % +89.7%,8, % -0.49% od, % +95.9% 2,336, % -0.22% mincost, % % 335, % -3.9% bubblesort % +5.4% 29,07, % -0.07% matmult % +3.67% 4,403, % -0.28% banner % % 2, % -0.25% sieve % +3.23% 2,84, % -3.73% compact, % +75.8% 3,409, % -4.86% queens % +7.89% 263, % -0.03% deroff 7, % % 448,58-0.0% -3.3% average, % % 4,784, % -5.7% 5

14 Measurements (cont.) Number of Static and Dynamic Instructions (Motorola 68020) Motorola program static instructions dynamic instructions executed SIMPLE LOOPS JUMPS SIMPLE LOOPS JUMPS cal % % 36, % -3.7% quicksort % % 536, % -3.96% wc % % 42, % -5.32% grep % %,309, % -3.44% sort, % % 902, % -2.43% od, % %,980, % -0.30% mincost % % 302, % -5.3% bubblesort % +2.92% 20,340, % -8.92% matmult % +3.42% 4,89, % -0.2% banner % % 2, % -3.34% sieve % +.43%,759, % -8.53% compact, % % 0,602, % -5.26% queens % +2.77% 89, % -0.05% deroff 5, % +55.7% 360, % -7.05% average % % 3,6, % -6.94% 6

15 Future Work handle indirect jumps in algorithm should improve dynamic savings may reduce size of generated code limit length of replication sequence, use depth-bound DFS should reduce size of generated code should improve compile-time overhead of optimization phase determine best phase ordering trade-off compile-time / exploit optimizations 8

16 Conclusions code replication avoids almost all uncond. jumps reduces number of executed instructions by 6% increases number of instructions between branches by.5 on SPARC results in 4% decreased cache work (except for small caches) increases code size by 53% outperforms traditional methods to avoid uncond. jumps should be applied in the back-end of highly optimizing compilers 9

17 Order of Optimizations branch chaining; dead code elimination; reorder basic blocks to minimize jumps; code replication (either JUMPS or LOOPS); dead code elimination; instruction selection; register assignment; if (change) instruction selection; do { register allocation by register coloring; instruction selection; common subexpression elimination; dead variable elimination; code motion; strength reduction; recurrences; instruction selection; branch chaining; constant folding at conditional branches; code replication (either JUMPS or LOOPS); dead code elimination; } while (change); filling of delay slots for RISCs; 20