Interfacing 8051 MCUs with SPI Serial EEPROMs CIRCUIT FOR P89LPC952 MCU AND 25XXX SERIAL EEPROM
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- Patience Morgan
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1 Interfacing 8051 MCUs with SPI Serial EEPROMs Author: INTRODUCTION Alexandru Valeanu Microchip Technology Inc. The 25XXX series serial EEPROMs from Microchip Technology support a half-duplex protocol that functions on a master-slave paradigm that is ideally suited to data stream applications. The bus is controlled by the microcontroller (master), which accesses the 25XXX serial EEPROM (slave) via a simple Serial Peripheral Interface (SPI) compatible serial bus. Bus signals required are a clock input () plus separate data in () and data out (SO) lines. Access to the 25XXX serial EEPROM is controlled through a Chip Select () input. Maximum clock frequencies range from 3 MHz to 20 MHz. Communication to the 25XXX serial EEPROM can be paused via the hold pin (HOLD) if the clock line is shared with other peripherals on the SPI bus. While the EEPROM is paused, transitions on its inputs are ignored, with the exception of, allowing the MCU to service higher priority interrupts. After releasing the HOLD pin, operations will resume from the point when the hold was asserted. The main features of the 25XXX serial EEPROMs are: SPI-compatible serial interface bus EEPROM densities from 128 bits to 512 Kbits Bus speed from 3 MHz to 20 MHz Voltage range from 1.8V to 5.5V Low power operation Temperature range from -40 C to +125 C Over 1,000,000 erase/write cycles Built-in write protection This application note is part of a series that provide source code to help users implement the protocol with minimal effort. Figure 1 is the hardware schematic depicting the interface between the Microchip 25XXX series serial EEPROMs and NXP s P89LPC based MCU. The schematic shows the connections necessary between the MCU and the serial EEPROM as tested. The software was written assuming these connections. The WP and HOLD pins are tied to VCC through resistors, because the write-protect and hold features are not used in the examples provided. FIGURE 1: CIRCUIT FOR P89LPC952 MCU AND 25XXX SERIAL EEPROM Vcc (1) P89LPC P2.1/MO P2.3/MISO P2.4/SS P2.5/SPICLK SO XX Vcc HOLD (2) WP (2) 3 6 Vss 4 5 Note 1: A decoupling capacitor (typically 0.1 µf) should be used to filter noise on VCC. Note 2: WP and HOLD pins should have pull-up resistors (2 kω to 10 kω) Microchip Technology Inc. DS01198A-page 1
2 FIRMWARE DESCRIPTION This application note offers designers a set of examples for the read and write functions for the Microchip SPI serial EEPROM (byte read/write and page read/write) using a main routine and the bit-bang method, which implements serial communication on any MCU, including those lacking built-in serial support. The main routine writes a string in the SPI serial EEPROM, reads it back and compares the two strings, displaying the results on LEDs on an evaluation board. Moreover, the main routine sends the results of the read to the UART to verify the correctness of operations. The firmware was written in assembly language for NXP s P89LPC952 MCU using the Keil µvision3 IDE and was developed on the Keil MCB950 evaluation board. The code can easily be modified to use any available I/O lines. The code was tested using the 25XX256 serial EEPROM. The EEPROM features 32K x 8 (256 Kbit) of memory and 64-byte pages. Oscilloscope screen shots are shown in this application note. All timings are based on the internal RC oscillator of the MCU (7.373 MHz). If a faster clock is used, the code must be modified to generate the correct delays. The bus speed in these examples is ~ 500 khz. As explained in the applicable SPI serial EEPROM data sheets, the maximum allowed bus speed depends on the EEPROM s operating voltage. If desired, the bus speed may be decreased by introducing supplementary delays in the low-level routines (spi_wr and spi_rd). DS01198A-page Microchip Technology Inc.
3 INITIALIZATION Initialization consists of three routines: ini_str, ini_spi and ini_memspi. The ini_str routine creates the 16-byte string to be written to the serial EEPROM. The ini_spi routine prepares the MCU for communication with the serial EEPROM using the bitbang method. The ini_memspi routine prepares the serial EEPROM for further writes. The structure of the initialization operation is as follows: Write Enable (WREN) + Write STATUS Register (WRSR) + WRITE (#NOPROT = 00). The scope plot showing this operation appears in Figure 2. FIGURE 2: WRITE TO STATUS REGISTER Command Command Data to STATUS Register SO High-Impedance 2008 Microchip Technology Inc. DS01198A-page 3
4 WRITE ENABLE Before a write operation to the serial EEPROM can occur, the MCU must set the Write Enable Latch (WEL). This is done by issuing a WREN command. The MCU clears the WEL bit by issuing a Write Disable command (WRDI). The WEL bit is also automatically reset if the serial EEPROM is powered down or if a write cycle is completed. Figure 3 shows the WREN and WRITE pair of commands. FIGURE 3: WRITE ENABLE AND WRITE COMMANDS Command Command D SO High-Impedance DS01198A-page Microchip Technology Inc.
5 BYTE WRITE The byte write operation consists of the MCU sending the WRITE command followed by the word address and data byte. The word address for the 25XX256 is a 16-bit value, so two bytes must be transmitted for the entire word address, with the Most Significant Byte sent first. Note that the WREN instruction is not illustrated in this section but is still required to initiate the operation. Figure 4 shows the sequence WRITE (02), the MSB address (00) and LSB address (00) and the first written byte (61h). FIGURE 4: WRITE COMMAND AND WORD ADDRESS SO Command 16-Bit Address Data Byte High-Impedance Twc 2008 Microchip Technology Inc. DS01198A-page 5
6 BYTE READ The byte read operation can be used to read data from the serial EEPROM. The MCU transmits the command byte followed by the word address bytes to the serial EEPROM. Figure 5 shows an example of the READ command, followed by the MSB and LSB address bytes, followed by the first read byte. After the MCU reads the data byte, the SO line relaxes and goes to a high impedance state. FIGURE 5: BYTE READ (COMMAND BYTE, WORD ADDRESS AND FIRST READ BYTE) Command 16-Bit Address SO High-Impedance Data Out DS01198A-page Microchip Technology Inc.
7 PAGE WRITE Page write operations provide a technique for increasing throughput when writing large blocks of data. The 25XX256 serial EEPROM features a 64-byte page. By using the page write feature, up to 1 full page of data can be written consecutively. It is important to point out that page write operations are limited to writing bytes within a single physical page, regardless of the number of bytes actually written. Physical page boundaries start at addresses that are integer multiples of the page size, and end at addresses that are [integer multiples of the page size] minus 1. Attempts to write across a page boundary result in the data being wrapped back to the beginning of the current page, thus overwriting any data previously stored there. The page write operation is very similar to the byte write operation. The serial EEPROM automatically increments the internal Address Pointer to the next higher address with receipt of each byte. Figure 6 shows four consecutive data bytes during a page write operation. FIGURE 6: PAGE WRITE (FIRST FOUR CONSECUTIVE DATA BYTES) Command 16-Bit Address Data Byte A 15 A 14 A 13 A 12 A 2 A 1 A Data Byte Data Byte Data Byte n (64 max) Microchip Technology Inc. DS01198A-page 7
8 PAGE READ Page read operations read a complete string, starting with the specified address. In contrast to page write operations described on the previous page, there is no maximum length for page read. After 64 Kbytes have been read, the internal address counter rolls over to the beginning of the array. Figure 7 depicts the entire sequence of commands necessary to perform the page read operation. For clarity, only the first five read bytes are shown. FIGURE 7: PAGE READ (FIRST FIVE READ BYTES) Command 16-bit Address A 15 A 14 A 13 A 12 A 2 A 1 A 0 SO High-Impedance Data Byte DS01198A-page Microchip Technology Inc.
9 BYTE WRITE VERSUS PAGE WRITE At first glance, the page write method appears superior to the byte write method: it s simpler and faster. However, a careful analysis shows that the byte write method has a major advantage over page write owing to the roll-over phenomenon (see Note). Note: Page write operations are limited to writing bytes within a single physical page, regardless of the number of bytes actually being written. Physical page boundaries start at addresses that are integer multiples of the page buffer size (or page size), and they end at addresses that are integer multiples of [page size-1]. If a Page Write command attempts to write across a physical page boundary, the result is that the data wraps around to the beginning of the current page (overwriting data previously stored there) instead of being written to the next page as might be expected. It is therefore necessary for the application software to prevent page write operations that would attempt to cross a page boundary. As a consequence of the roll-over phenomenon, applications that write long strings to the SPI serial EEPROM risk overlapping the page boundary in the middle of a string. In such instances, the firmware should use byte write to avoid this condition. The disadvantage of doing this is the slower speed involved in writing the entire string: every byte write cycle time is approximately 5 ms. The following summarizes the differences between the byte write and page write methods. Byte Write Is slower It needs a 5 ms write cycle time for each byte. Is more general It may write a string of any length. Page Write Is faster It needs only one write cycle time for the whole page. Care must be taken to observe page boundaries during page writes. CONCLUON This application note offers designers a set of firmware routines to access SPI serial EEPROMs. The code demonstrates byte and page operations. All routines were written in assembly language for an 8051-based MCU. The code was developed on the Keil MCB950 evaluation board using the schematic shown in Figure 1. It was tested using the NXP P89LPC952 MCU and debugged using the Keil µvision3 IDE Microchip Technology Inc. DS01198A-page 9
10 NOTES: DS01198A-page Microchip Technology Inc.
11 Note the following details of the code protection feature on Microchip devices: Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as unbreakable. Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dspic, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PITART, PRO MATE, rfpic and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dspicdem, dspicdem.net, dspicworks, dsspeak, ECAN, ECONOMONITOR, FanSense, In-Circuit Serial Programming, IP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mtouch, PICkit, PICDEM, PICDEM.net, PICtail, PIC 32 logo, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rflab, Select Mode, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. 2008, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company s quality system processes and procedures are for its PIC MCUs and dspic DSCs, KEELOQ code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip s quality system for the design and manufacture of development systems is ISO 9001:2000 certified Microchip Technology Inc. DS01198A-page 11
12 WORLDWIDE SALES AND SERVICE AMERICAS Corporate Office 2355 West Chandler Blvd. Chandler, AZ Tel: Fax: Technical Support: Web Address: Atlanta Duluth, GA Tel: Fax: Boston Westborough, MA Tel: Fax: Chicago Itasca, IL Tel: Fax: Dallas Addison, TX Tel: Fax: Detroit Farmington Hills, MI Tel: Fax: Kokomo Kokomo, IN Tel: Fax: Los Angeles Mission Viejo, CA Tel: Fax: Santa Clara Santa Clara, CA Tel: Fax: Toronto Mississauga, Ontario, Canada Tel: Fax: AA/PACIFIC Asia Pacific Office Suites , 37th Floor Tower 6, The Gateway Harbour City, Kowloon Hong Kong Tel: Fax: Australia - Sydney Tel: Fax: China - Beijing Tel: Fax: China - Chengdu Tel: Fax: China - Hong Kong SAR Tel: Fax: China - Nanjing Tel: Fax: China - Qingdao Tel: Fax: China - Shanghai Tel: Fax: China - Shenyang Tel: Fax: China - Shenzhen Tel: Fax: China - Wuhan Tel: Fax: China - Xiamen Tel: Fax: China - Xian Tel: Fax: China - Zhuhai Tel: Fax: AA/PACIFIC India - Bangalore Tel: Fax: India - New Delhi Tel: Fax: India - Pune Tel: Fax: Japan - Yokohama Tel: Fax: Korea - Daegu Tel: Fax: Korea - Seoul Tel: Fax: or Malaysia - Kuala Lumpur Tel: Fax: Malaysia - Penang Tel: Fax: Philippines - Manila Tel: Fax: Singapore Tel: Fax: Taiwan - Hsin Chu Tel: Fax: Taiwan - Kaohsiung Tel: Fax: Taiwan - Taipei Tel: Fax: Thailand - Bangkok Tel: Fax: EUROPE Austria - Wels Tel: Fax: Denmark - Copenhagen Tel: Fax: France - Paris Tel: Fax: Germany - Munich Tel: Fax: Italy - Milan Tel: Fax: Netherlands - Drunen Tel: Fax: Spain - Madrid Tel: Fax: UK - Wokingham Tel: Fax: /02/08 DS01198A-page Microchip Technology Inc.
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