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1 #!/usr/bin/python # Cache simulator # Author: Shatrugna Sadhu # ssadhu at cs dot ucsb dot edu # Description: + A CMP Cache model with two levels of caching # Each core has its own independent L1 but all # share same L2 cache # + The following simulator also takes care of # invalidation # Acknowledgement : Sushmit Biswas import os import sys import signal import string import math import random import re L1=[] file_ext=0 i=0 #L1_cache_size=0TProof #L1_cache_way=0 #L2_cache_size=0 #L2_cache_way=0 class g1(object): # Global constants def init (self, cac=none): self.cache = cac # Instance of cache class self.hits=0 self.misses=0

2 class g2: # Global constants cache = 0 hits = 0 misses = 0 class Cache_l1: def init (self): self.lruvalue = {} self.clearcache() # Zero out cache blocks/flags/values def clearcache(self): for n in range(num_sets_l1): self.lruvalue[n]={} def checkcachehit(self, address): index=(add >> log2)%(num_sets_l1) if self.lruvalue[index].has_key(address): return 1; return -1; #BS def incrementlru(self, address): index=(add >> log2)%(num_sets_l1) old_lru_val = self.lruvalue[index][address] if old_lru_val == 0: # if this is the last accessed line, don't alter anything # increment for all other in the set that has LRU counter < current block, then # reset for current block for key, value in self.lruvalue[index].iteritems(): if value <= old_lru_val: self.lruvalue[index][key]+=1; self.lruvalue[index][address]=0;

3 def storelrublock(self, address): index=(add >> log2)%(num_sets_l1) max_value = -1; max_value_key = -1; for key, value in self.lruvalue[index].iteritems(): if len(self.lruvalue[index]) == L1_cache_way : if value > max_value: max_value_key = key; max_value = value; self.lruvalue[index][key]+=1; if len(self.lruvalue[index]) == L1_cache_way : del self.lruvalue[index][max_value_key]; self.lruvalue[index][address]=0; def invalidate(self, address): index=(add >> log2)%(num_sets_l1) if self.lruvalue[index].has_key(address): del self.lruvalue[index][address]; class Cache_l2: def init (self): self.lruvalue = {} self.clearcache() # Zero out cache blocks/flags/values def clearcache(self): for n in range(num_sets_l2): self.lruvalue[n]={} def checkcachehit(self, address): index=(add >> log2)%(num_sets_l2) if self.lruvalue[index].has_key(address): return 1;

4 adding L2 return -1; #Heres the place where I should be def incrementlru(self, address): index=(add >> log2)%(num_sets_l2) old_lru_val = self.lruvalue[index][address] if old_lru_val == 0: # if this is the last accessed line, don't alter anything # increment for all other in the set that has LRU counter < current block, then # reset for current block for key, value in self.lruvalue[index].iteritems(): if value <= old_lru_val: self.lruvalue[index][key]+=1; self.lruvalue[index][address]=0; def storelrublock(self, address): index=(add >> log2)%(num_sets_l2) max_value = -1; max_value_key = -1; for key, value in self.lruvalue[index].iteritems(): if len(self.lruvalue[index]) == L2_cache_way : if value > max_value: max_value_key = key; max_value = value; self.lruvalue[index][key]+=1; if len(self.lruvalue[index]) == L2_cache_way : del self.lruvalue[index][max_value_key]; self.lruvalue[index][address]=0; # def printsummary(): """

5 Print results of program execution. This is called at the end of the program run to provide a summary of what settings were used and the resulting time. In addition, the command line number codes are converted to text for readability. """ temp_h = 0 temp_m =0 i = 0 for i in range(0,4): temp_h=l1[i].hits+temp_h i = 0 for i in range(0,4): temp_m=l1[i].misses+temp_m # print "" # print "o " # print " Cache: L1" # print " Cache size:", repr(l1_cache_size) # print " Cache associativity:", repr(l1_cache_way) # print " Hits:", repr(temp_h) # print " Misses:", repr(temp_m) # print " Hit Rate: %3.2f" % (temp_h * 100.0/ (temp_h + temp_m)) # print "o " print repr(temp_m) # print "" # print "o " # print " Cache: L2" # print " Cache size:", repr(l2_cache_size) # print " Cache associativity:", repr(l2_cache_way) # print " Hits:", repr(g2.hits) # print " Misses:", repr(g2.misses) # print " Hit Rate: %3.2f" % (g2.hits * 100.0/ (g2.hits + g2.misses)) # print "o " # print "%3.2f" % (g2.hits * 100.0/ (g2.hits + g2.misses)) print " ", repr(g2.misses) # print len(g.cache.lruvalue) # for i in range(len(g.cache.lruvalue)): # print len(g.cache.lruvalue[i]) def signal_handler(signal, frame): printsummary()

6 sys.exit(0) def main(): """ Main program; contains primary clock loop and core logic. associativity 0 = fully associative """ i=0 j=0 count1 = 0 count2 = 0 count3 = 0 count4 = 0 if not len(sys.argv) == 7: # Check for command line arguments print "Usage: %s [ cache size L1 ] [ associativity L1 ] [ cache size L2 ] [ associativity L2 ] [ trace filename ] [Block size ]\n" % \ os.path.basename(sys.argv[0]) sys.exit(0) global L1_cache_size L1_cache_size=int(sys.argv[1]) global L1_cache_way L1_cache_way=int(sys.argv[2]) global L2_cache_size L2_cache_size=int(sys.argv[3]) global L2_cache_way L2_cache_way=int(sys.argv[4]) global num_blocks_l1 num_blocks_l1=(l1_cache_size*1024/int(sys.argv[6])) global num_blocks_l2 num_blocks_l2=(l2_cache_size*1024/int(sys.argv[6])) global num_sets_l1 num_sets_l1=(num_blocks_l1/l1_cache_way) global num_sets_l2 num_sets_l2=(num_blocks_l2/l2_cache_way) global log2 log2 = int(math.log(int(sys.argv[6]),2)) infile1 = sys.argv[5] # Input text file infile2 = sys.argv[5] # Input text file

7 infile3 = sys.argv[5] # Input text file infile4 = sys.argv[5] # Input text file infile1 = open(infile1,"r") # infile2 = open(infile2,"r") # infile3 = open(infile3,"r") # infile4 = open(infile4,"r") #Setting up independent L1 cache i=0 for i in range (0,4): L1.append(g1(Cache_l1())) #Setting up a shared L2 cache g2.cache = Cache_l2() line = 0 signal.signal(signal.sigint, signal_handler) global file_ext file_ext=0 while 1: #file_ext = random.randint(0,3) if file_ext>3: file_ext=0 #if file_ext==0: l = infile1.readline() #elif file_ext==1: # l = infile2.readline() #elif file_ext==2: # l = infile3.readline() #elif file_ext==3: # l = infile4.readline() text = l.split(" ") if text[0]!= '': text = text[1].split('\n') address=abs(int(text[0],16)); address=0;

8 # line += 1 # if line % == 0: # sys.stderr.write('processed queries: %d\r' %line) # sys.stderr.flush() if address == 0: break # EOF, so shut down # For speed, make these function calls once so # we can just test the return values #print file_ext l1_cachehit = L1[file_ext].cache.checkCacheHit(address) # print address, cachehit; # Read reference if l1_cachehit > 0: # Data is in cache, so move on L1[file_ext].cache.incrementLRU(address) L1[file_ext].hits+=1 # Data is not in cache, so # L2 for whether it has it or not # and fill the data from L2/memory L1[file_ext].cache.storeLRUBlock(address) L1[file_ext].misses+=1 l2_cachehit = g2.cache.checkcachehit(address) if l2_cachehit > 0: g2.cache.incrementlru(address) g2.hits+=1 g2.cache.storelrublock(address) g2.misses+=1 tm=0 for tm in range (0,4): L1[tm].cache.invalidate(address) file_ext = file_ext+1 # Display results of program run printsummary() # infile1.close(); if name == " main ": main()