The Criteria on STIL Usage Guide (Rev6.20)/ (Rev4.00) by STIL Mixed Data. Rev1.02 September 17, 2013

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1 STARC STIL-based Semiconductor Test Action Group (SSTAG) The Criteria on STIL Usage Guide (Rev6.20)/ (Rev4.00) by STIL Mixed Data Rev1.02 September 17,

2 This material shall not be revised nor copied. 2

3 Rev. Date Change Remarks Rev /17/2011 First Edition [Added No.22 to The Criteria on STIL Usage Guide (Rev6.10)/ (Rev4.00) by STIL Basic Data (Rev1.00) ] Rev1.01 2/19/2013 Modified No14 Net Name Rev1.02 9/17/2013 Modified No6/No9/No21/No22 Net Name 3

4 [How to use the data] 1. Regarding data name The file name of the circuit name.stil.pattern name indicates the STIL data, the file name of the circuit name.v indicates the NET data. 2. This data is the data for STIL reading test and this document has shown such criteria. Provide this data to STIL reading tool to read and confirm it meets the certain criteria. The evaluation of STIL output should be OK if it doesn t output STIL which violates each item of the criteria. Confirmed results should be put into the Blank Sheets for evaluation result (which can be downloaded online). The result is indicated as described below: O: Meets criteria X: Not meet criteria -: Chose either not supported or not tested. The points are handled as the same as X. If you move cursor to the blank sheet of test result, for each item of the result will be shown by pulldown menu (O, X, -) and if you make a choice then the points are automatically calculated. O counts 1, and X and count 0. For multiple data for one item, the points of the data result are multiplied, meaning that, when all data indicate O, that item points 1, other than that case, the point will be 0. 4

5 The Criteria on STIL Usage Guide by STIL Mixed Data No1. Problem of case-sensitive user-defined names (Page 55 of Section 6.1 of IEEE ) Points to be checked: The behavior when user-defined names in the same statement are distinguished only by their case. Data: User-defined names distinguished only by their case are defined as the following. Pin group name Timing domain WaveformTable name UserKeywords name ScanStructures domain name ScanChain name PatternBurst domain name Procedures domain name MacroDefs domain name Pattern domain name Procedure name Macro name "_pi","_pi" "_timing", "_Timing" "_default_wft_","_default_wft_" "ScanChainGroups", "scanchaingroups" "_scan", "_Scan" "c0", "C0" "_burst_", "_Burst_" "_proc", "_Proc" "_macro", "_Macro" "_pattern_","_pattern_" "load_unload","load_unload" "test_setup","test_setup" Data name: s1423.stil.mix.0_1, s1423_0_1.v Criteria: If a user-defined name falls into either of the following two categories, a case-sensitive name or an error according to STIL Usage Guide, it is satisfactory. (1) It is satisfactory if the user-defined name is case-sensitive, and the warning message that indicates so is output. In this data, the definitions of the case-sensitivity are described below, and when all of them are applied, it is considered to be OK. Timing domain "_Timing" is allowed in the PatternExec For instance, if the rate is 100ns at the top Vector of a Macro executed at the top of the subject Pattern, it is satisfactory. WaveformTable name In the Pattern block, "_default_wft_" is allowed. In the Procedure/Macro block, "_DEFAULT_wft_" is allowed. For instance, the same as Timing domain, if the rate is 100ns at the top Vector of a Macro executed at the top of the subject Pattern, it is satisfactory. UserKeywords name Both ScanChainGroups and scanchaingroups are allowed. ScanStructures domain name "_Scan" is allowed in the PatternBurst. If it can be read without error, it is satisfactory. ScanChain name The same as ScanStructures, ScanChain "c0" is allowed. If it can be read, it is satisfactory since it does not effect the results. PatternBurst domain name "_Burst_" is allowed in the PatternExec. If the distinction of the case is not right, "capture***" in the corresponding Procedures is not assigned, so it is satisfactory if these Procedures patterns can be read. Procedures domain name The same as PatternBurst, "_Proc" is allowed in the PatternBurst. MacroDefs domain name "_Macro" is allowed in the PatternBurst. 5

6 Pattern domain name Procedure name Macro name If it can be read, it is satisfactory since it does not effect the results. "_Pattern_" is allowed in the PatList of PatternBurst. It is satisfactory if Vector and Shift are executed seven times each, and if they are executed two times each, it is unsatisfactory. "load_unload" is referenced form the Pattern. It is satisfactory if the Shift statement is executed seven times, and if it is not executed at all, it is unsatisfactory. "test_setup" is referenced form the Pattern. If the patterns of the Vector statement in the Macro called at the top are V { "clk"=0; "rst"=1; it is satisfactory. In addition, according to the recommendation, confirm that the message saying that the user-defined names distinguished only with case sensitivity is used, is output. If it is not output, it will be NG. It is better if the output message prompts to standardize. (2) It is satisfactory when making the error determination according to STIL User Guide s recommendation If the program ends with an error according to STIL User Guide and a message states that the user-defined names distinguished only by case difference should be changed, it is satisfactory. For example, about the pin groups in the above data, if you get a message saying that either "_pi" or "_Pi" needs to be changed because they are distinguished only by case difference, it is satisfactory. 6

7 No2. Problem of how to handle concatenated character strings (Page 58 of Section 6.7 of IEEE1450.0) Points to be checked: Confirm which of hierarchy divider and concatenation character is given priority in case of a period is described in the InheritWaveformTable. Data: Data is checked by the following two points of view (1) Interpreted as a hierarchy divider InheritWaveformTable "test"."gen_tp1" is defined in WaveformTable "tset_gen_tp1". WaveformTable "tsetgen_tp1" is defined in Timing "STUCK_timing" and WaveformTable "gen_tp1" is defined in Timing "test". (2) If hierarchal destination is not found, interpreted as a concatenation character. InheritWaveformTable "gen". tp2" is defined in WaveformTable "tset_gen_tp2". It is interpreted as a concatenation character because Timing domain name "gen" does not exist. WaveformTable "gentp2" is defined in the same Timing "STUCK_timing". Timing "test" { WaveformTable "gen_tp1" { Period '50ns' ; Waveforms { input_time_gen_1 { 01 { '0ns' D; '20ns' D/U; '30ns' D; _po_ { LHXT { '0ns' X; '10ns' l/h/x/t; '20ns' X; Timing "STUCK_timing" { WaveformTable "testgen_tp1" { Period '50ns' ; Waveforms { input_time_gen_0 { 01X { '0ns' D/U/N; input_time_gen_1 { 01 { '0ns' D; '30ns' D/U; '40ns' D; _po_ { LHXT { '0ns' X; '20ns' l/h/x/t; '30ns' X; WaveformTable "tset_gen_tp1" { InheritWaveformTable "test"."gen_tp1"; Period '50ns' ; Waveforms { input_time_gen_0 { 01X { '10ns' D/U/N; WaveformTable "gentp2" { Period '50ns' ; Waveforms { input_time_gen_0 { 01X { '0ns' D/U/N; input_time_gen_1 { 01 { '0ns' D; '20ns' D/U; '30ns' D; _po_ { LHXT { '0ns' X; '10ns' l/h/x/t; '20ns' X; WaveformTable "tset_gen_tp2" { (1) Interpreted as a hierarchy divider 7

8 InheritWaveformTable "gen"."tp2"; (2) Interpreted as a concatenated character string Period '50ns' ; Waveforms { input_time_gen_0 { 01X { '10ns' D/U/N; Data name: s1423.stil.mix.0_2n2, s1423.v Criteria: In case that the interpretation as a hierarchy is prioritized, and no defined data is found, it is satisfactory if a period is interrupted as concatenation character. To determine if a period is interpreted as a hierarchy divider or concatenation character in this data, check the following two places. If both are OK, it is satisfactory. (1) Interpreted as a hierarchy divider (*1) According to STIL Usage Guide, InheritWaveformTable "test"."gen_tp1" in WaveformTable "tset_gen_tp1" references WaveformTable "gen_tp1" in Timing "test", and timings of WaveformTable "tset_gen_tp1" are as follows. Also if a message saying that WaveformTable "gen_tp1" has been inherited is output, it is satisfactory. Timing "STUCK_timing" { : WaveformTable "tset_gen_tp1" { //InheritWaveformTable "test"."gen_tp1"; *1 Period '50ns' ; Waveforms { input_time_gen_0 { 01X { '10ns' D/U/N; input_time_gen_1 { 01 { '0ns' D; '20ns' D/U; '30ns' D; //Inherit Data _po_ { LHXT { '0ns' X; '10ns' l/h/x/t; '20ns' X; //Inherit Data (2) Interpreted as a concatenation character (*2) According to STIL Usage Guide, InheritWaveformTable "gen"." tp2" in WaveformTable " tset_gen_tp2" does not have Timing domain name "gen", so it is interpreted as a concatenation character, and references WaveformTable "gentp2" in the same Timing "STUCK_timing". Timings of WaveformTable "tset_gen_tp2" are as the following. Also if you get a message saying that WaveformTable "gentp2" has been inherited, it is satisfactory. WaveformTable "tset_gen_tp2" { //InheritWaveformTable gen. tp2 ; *2 gen. tp2 is interrupted as shown below. //InheritWaveformTable "gentp2"; Period '50ns' ; Waveforms { input_time_gen_0 { 01X { '10ns' D/U/N; input_time_gen_1 { 01 { '0ns' D; '20ns' D/U; '30ns' D; //Inherit Data _po_ { LHXT { '0ns' X; '10ns' l/h/x/t; '20ns' X; //Inherit Data 8

9 No3. Problem in using STIL reserved words and characters (Page 59 of Section 6.8 of IEEE1450.0) Points to be checked: (1) The behaviors when user-defined names, which themselves are a reserved character, and user-defined names including a special character are enclosed with double quotes. Data: (1) User-defined names, which themselves are a reserved single character, user-defined names including a reserved character, and user-defined names including a special character are enclosed with double quotes, and Ohm, Cel, reserved multiple characters, is not enclosed with double quotes. UserKeywords Pin group name ScanStructures domain name ScanChain name MacroDefs domain name Macro name Timing domain name WaveformTable name Pattern domain name Signal name "Call" "p" "F" "s" Ohm "Macro" "T" "w" "V" Cel Data name: (1) s1423.stil.mix.0_3_1, s1423_0_3.v Criteria: (1) It is satisfactory if the data is treated as user-defined name, and the operation normally terminates. If the program ends normally since reserved words and character are enclosed with double quotes and no error occurs for reserved multiple characters, which are not necessary to be enclosed with double quotes, it is satisfactory. For instance, if pin group name p and signal name Cel are handled without an error, it is satisfactory. Points to be checked: (2) The behavior when user-defined names, which themselves are a reserved character, and user-defined names including a special character, are not enclosed with double quotes. Data: (2) User-defined names defined in (1) are not enclosed with double quotes. Data name: (2) s1423.stil.mix.0_3_2, s1423_0_3.v Criteria: (2) It is satisfactory if an error of violation of the language specification occurs, and the operation terminates. Since reserved words and characters are not enclosed with double quotes, for instance, if a message indicating a violation of the language specifications is output at the UserKeywords Call, the top user-defined name, it is satisfactory. 9

10 No4. Problem of how to handle double-quoted user-defined names (Page 59 of Section 6.8 of IEEE1450.0) Points to be checked: (1) The behavior when identical user-defined names distinguished by double quotes are described. Data: (1) Identical user-defined names distinguished by double quotes are the following. Pin group name all_outputs, "all_outputs" Timing domain name Tim, "Tim" WaveformTable name defaultwft, "defaultwft" UserKeywords name ScanChainGroups, "ScanChainGroups" ScanStructures domain name Scan, "Scan" ScanChain name c0, "c0" PatternBurst domain name burstb, "burstb" Procedures domain name Proc, "Proc" MacroDefs domain name MacroD, "MacroD" Pattern domain name patternb, "patternb" Procedure name load_unload, "load_unload" Macro name test_setup, "test_setup" Data name: (1) s1423.stil.mix.0_4_1n2, s1423.v Criteria: (1) If it falls into either of the following cases, it is satisfactory. 1. It is satisfactory if the operation normally terminates, and the message saying distinguishing of the user-defined names is output. If an error occurs since identical user-defined names distinguished by double quotes are not allowed, it is satisfactory. As for the pin group in this data, if you get a message saying that pin group names all_outputs and "all_outputs" are redundant with having only the difference of double quotes, it is satisfactory. 2. It is satisfactory if en error occurs, the operation terminates, and then the error message saying the violation of the language specifications is output. If identical user-defined names distinguished by double quotes are processed separately, and you get a message saying that the user-defined names should be changed, it is satisfactory. Points to be checked: (2) The behavior in a case that user-defined names are inconsistent in their use of double quotes, in definition and reference. Data: (2) Identical user-defined names with the inconsistent use of double quotes are the following. Signal name SignalGroups domain name ScanStructures domain name Procedures domain name MacroDefs domain name Pattern domain name Timing domain name PatternBurst domain name Macro name WaveformTable name test_si,clk,rst,test_se,g0,,g16 SigGr Scan Proc MacroD Pattern Tim burstb test_setup _default_wft_ 10

11 The above user-defined names are enclosed by double quotes when they are defined, but not when they are referenced. For example, signal name Signals is enclosed by double quotes when defined. Signals { "test_si" In { ScanIn; "clk" In; "rst" In; "test_se" In; "G0" In; "G1" In; "G2" In; However, they are not enclosed by double quotes when referenced in the SignalGroups or Timing block. SignalZGroups "SigGr" { "all_inputs" = 'test_si + clk + rst + test_se + G0 + G1 + G2 + Timing "Tim" { SignalGroups SigGr; WaveformTable "_fast_wft_" { Period '60ns'; Waveforms { : clk { P { '0ns' D; '30ns' U; '40ns' D; rst { P { '0ns' U; '30ns' D; '40ns' U; Data name: (2) s1423.stil.mix.0_4_2, s1423.v Criteria: (2) It is satisfactory if an error of the violation of the language specifications occurs, and the operation terminates. If an error occurs because of a violation of the language specifications, it is satisfactory. As for the signal name test_si in this data, it is enclosed by double quotes when defined in the Signals and it is not enclosed by double quotes when referenced in the SignalsGroups, so if an error occurs with a message saying that they are not the same signal, it is satisfactory. Points to be checked: (3) The behavior when BUS pins are described. Data: (3) The following is the defined BUS pin name. "G"[0..16] Data name: (3) s1423.stil.mix.0_4_3n, s1423_0_4_3.v Criteria: (3) It is satisfactory if the pin is treated as a BUS pin, and the operation normally terminates. When signal name "G"[0..16] is handled as a BUS pin, if an error of undefined pins in the Signals does not occur where they are separately specified as "G"[0], "G"[1] in the SignalGroups, it is satisfactory. Points to be checked: (4) The behavior when all BUS pin names including Index in the Signals are enclosed by double quotes, and in blocks other than Signals where they are referenced, only BUS pins are enclosed by double quotes. Data: (4) Data where all BUS pin names including Index in the Signals are enclosed by double quotes as "G [0..16]", and in SignalGroups and Procedures, only BUS pins except Index are enclosed by double quotes. Signals { "G[0..16]" In; SignalGroups { "all_inputs" = ' + "G"[0] +"G"[1] + "G"[2] + "G"[3] + "G"[4] + "G"[5] + "G"[6] + "G"[7] + "G"[8] + "G"[9] + "G"[10] + "G"[11] + "G"[12] + "G"[13] + "G"[14] + "G"[15] + "G"[16]'; 11

12 "_pi" = '"all_inputs"'; // #signals=21 "_in" = ' + "G"[0] +"G"[1] + "G"[2] + "G"[3] + "G"[4] + "G"[5] + "G"[6] + "G"[7] + "G"[8] + "G"[9] + "G"[10] + "G"[11] + "G"[12] + "G"[13] + "G"[14] + "G"[15] + "G"[16]'; : Procedures { : "capture_clk" { W "_default_wft_"; C{ '"G"[0]+"G"[1]+"G"[2]+"G"[3]+"G"[4]+"G"[5]+"G"[6]+"G"[7]+"G"[8]+"G"[9]+"G"[10]+"G"[11]+" G"[12]+"G"[13]+"G"[14]+"G"[15]+"G"[16]'= ; V { "_pi"= r21 # ; "_po"=######; "clk"=p; "capture_rst" { W "_default_wft_"; C{ '"G"[0]+"G"[1]+"G"[2]+"G"[3]+"G"[4]+"G"[5]+"G"[6]+"G"[7]+"G"[8]+"G"[9]+"G"[10]+"G"[11]+" G"[12]+"G"[13]+"G"[14]+"G"[15]+"G"[16]'= ; V { "_pi"= r21 # ; "_po"=######; "rst"=p; "capture" { W "_default_wft_"; C { '"G"[0..16]'= ; V { "_pi"= r21 # ; "_po"=######; Data name: (4) s1423.stil.mix.0_4_4n, s1423_0_4_3.v Criteria: (4) It is satisfactory if an error occurs because the pin is not treated as a BUS pin, and the operation terminates. Signal name "G [0..16]" is not handled as a BUS pin but as a signal name including special characters '[,'. ', ']' in the Signals. So if an error of undefined pins in the Signals occurs because only BUS pin names are enclosed by double quotes when they are referenced in the SignalGroups and Procedures, it is satisfactory. 12

13 No5. Problem of newline and tab characters included in user-defined names (Page 59 of Section 6.8 of IEEE1450.0) Points to be checked: (1) The behavior when a space is used in a user-defined name. Data: (1) The following are user-defined names with a space. Timing domain name "STUCK timing" WaveformTable name "tset gen_tp2" UserKeywords name "U Key"; ScanStructures domain name "Scan 1" ScanChain name "chain 1" ScanCell name "inst G**" MacroDefs domain name "Macro 1" Macro name "scan grp1" Pattern domain name "scan test" Data name: (1) s1423.stil.mix.0_5_1, s1423.v Criteria: If it falls into either of the following cases, it is satisfactory. i. If user-defined names with a space are allowed as they are, and the operation normally terminates, it is satisfactory. ii. If the message saying that the strings are replaced is output, and the operation normally terminates, it is satisfactory. If you get a message saying that user-defined names with a space have been replaced with allowed user-define names when an error due to using user-defined names with a space occurs in the application, it is satisfactory. Points to be checked: (2) The behavior when a newline or tab character is used in a use-defined name Data: (2) The following are user-defined names with a tab or newline character. Timing domanin name "STUCK timing" //Using a newline WaveformTable name "tset gen_tp2" //Using a tab ScanStructures domanin name "Scan 1" //Using a tab ScanChain name "chain 1" //Using a tab ScanCells name "inst G22" //Using a tab "inst G23" //Using a newline MacroDefs domanin name "Macro 1" //Using a tab Data name: (2) s1423.stil.mix.0_5_2, s1423.v Criteria: (2) If it falls into either of the following cases, it is satisfactory. i. If the operation normally terminates, and the message saying that the user-defined name should be corrected is output, it is satisfactory. If the message saying that user-defined names with a tab or newline should be processed and corrected as they are is output, it is satisfied. ii. It is satisfied if an error occurs, and the operation terminates with message saying that tab and newline are disabled. 13

14 In case that an error occurs on the application when the tab or newline is used as it is, it is satisfied if the operation terminates with a message saying that event. 14

15 No6. Problem of whether Include statement can be nested (Page 71 of Chapter 10 of IEEE1450.0) Points to be checked: (1) The behavior when the Include is nested. Data: (1) When all the patterns are concatenated by the Include, Macro "TEST" is called four times and Macro "SCAN_gsd_static" is called two times. MacroDefs { "TEST" { WaveformTable "test_cycle"; Vector { "ALLPOs" = %; "ALLPIs" = %; "SCAN_gsd_static" { WaveformTable "scan_cycle_gsd_static"; Condition { "ALLPOs" = XXXXXX; "ALLSIs_gsd_static" = 0; Shift { Vector { "ALLSOs_gsd_static" = #; "ALLSIs_gsd_static" = #; "ALLECs_gsd_static" = P; Data name: (1) s1423.stil.mix.0_6_1n, s1423.stil.mix.0_6_1n_include1, s1423.stil.mix.0_6_1n_include2, s1423.v Criteria: (1) It is satisfactory if a nested Include statement is properly referenced, and the operation normally terminates. A nested Include statement is properly referenced and Pattern blocks including Macro are processed. It is satisfactory if the Shift pattern has two steps and the pattern of the Vector statement has four steps. If the Shift is expanded, it would have 74 steps. After the Vector s two-step pattern, the Shift pattern is executed, and Vector s two-step pattern, then the Shift pattern is executed again. Points to be checked: (2) The behavior if an endless loop occurs when the Include is nested. Data: (2) s1423.stil.mix.0_6_2include2 is included in s1423.stil.mix.0_6_2_include1. Also Include "s1423.stil.mix.0_6_2_include1"; is defined in s1423.stil.mix.0_6_2includ2, as a result, the Include goes into an endless loop. Data name: (2)s1423.stil.mix.0_6_2, s1423.stil.mix.0_6_2_include1, s1423.stil.mix.0_6_2_include2, s1423.v Criteria: (2) If it falls into either of the following cases, it is satisfactory. i It is satisfactory if you get a message saying that the Include goes into an endless loop and the program ends with an error. ii It is satisfactory if an error occurs, the operation normally terminates, and then you get a message saying that the Include goes into a endless loop, according to the recommendation. 15

16 No7. Problems of how to define SignalGroups block (Page 77 of Chapter 15 of IEEE1450.0) Points to be checked: (1) The behavior when an empty pin group is used. Data: (1) An empty pin group stiltest1 and a pin group consisting of only a Pseudo pin are defined. Signals { "clk_net" Pseudo; "stiltest1"=''; "stiltest2"='"clk_net"'; Data name: (1) s1423.stil.mix.0_7_1n, s1423.v Criteria: (1) It is satisfactory if the definition of the empty or Pseudo pin group can be treated, and operation normally terminates. For the empty pin group "stiltest1", it is interpreted that definitions of Pattern and WaveformTable are not there so a message stating that should be output. Or if the pin group with only Pseudo can be handled without an error, it is satisfactory. Points to be checked: (2) The behavior when a pin group having the same name as the signal is used. Data: (2) Pin group name "test_si" which is the same as the signal name "test_si" is defined. Data name: (2) s1423.stil.mix.0_7_2, s1423.v Criteria: (2) It is satisfied if an error occurs, and the operation terminates with message saying that event. In the SignelGroups block with a domain, the same name as the pin name can be defined as the pin group name, but in a global SignalGroups block, the same name as the pin name cannot be defined as the pin group name. If it is, an error occurs. 16

17 No8. Problems of how to handle multiple PatternExec blocks (Page 80 of Chapter 16 of IEEE1450.0) Points to be checked: The behavior when multiple PatternExec blocks are defined. Data: Two PatternExecs are defined. Each PatternExec uses the same Timing and Pattern. Data name: s1423.stil.mix.0_8, s1423.v Criteria: It is satisfactory if the operation normally terminates, and you get a message of the processing method of PatternExec. It is satisfactory if you get a message saying the processing method specified with the application, such as to execute in the order of PatternExec PE1 and PE2 or to specify the PatternExec to be executed with an option. 17

18 No9. Problem of how to interpret multiple events specified to the same time (Page 84 of Section 18.1 of IEEE1450.0) Points to be checked: (1) The behavior when multiple events are specified at the same time in the timing definition of WaveformTable. Data: (1) In the timing definition in WaveformTable "test_cycle", input and output events are defined at the same time for the pin "test_so". WaveformTable "test_cycle" { Period ' ns'; Waveforms { "test_so" { LHTX { '0ns' Z; '0ns' X; ' ns' L/H/T/X; ^^^^^^^^^^^^^^^ Data name: (1) s1423.stil.mix.0_9_1n, s1423.v Criteria: (1) It is satisfactory if the events are executed in the order of the timing description, and the operation normally terminates. When Input/Output and Output/Input events are defined by the timing definition at the same time, the operation is executed in the described order. For "test_so," Drive is set to Off with '0ns,' and X is executed with '0ns.' Points to be checked: (2) The behavior when multiple input events or output events are specified at the same time in the WaveformTable. Data: (2) Define different events of the same type in the timing definition. WaveformTable "test_cycle" { Period ' ns'; Waveforms { "G*" { 01Z { '0ns' P; '0ns' D/U/Z; ^^^^^^^^^^^^^^^^^^^ Data name: (2) s1423.stil.mix.0_9_2, s1423.v Criteria: (2) If it falls into either of the following cases, it is satisfactory. i It is satisfactory if an error occurs, and the operation terminates. In WaveformTable "test_cycle", the input events are specified at the same time for signal name "G0" "G16", so it is satisfactory if you get a message saying so. ii According to the recommendation, if you get a message of the processing method of application side, such as backward prioritized, it is satisfactory. When, for example, backward is prioritized, it is satisfactory if the operation normally terminates in this data. 18

19 No10. Problem of Marker event expression (Page 88 of Section 18.2 of IEEE1450.0) Points to be checked: The behavior when a Maker event is described in the WaveformTable. Data: In pin group "all_outputs"("test_so" + "G726" + "G729" + "G702" + "G727" + "G701BF", timings are defined in the WaveformTable using a Marker event. WaveformTable "_fast_wft_" { Period '60ns'; Waveforms { "all_outputs" { X { '0ns' X; '57ns' M; "all_outputs" { H { '0ns' X; '2ns' M; '20ns' H; '57ns' M; Data name: s1423.stil.mix.0_10, s1423.v Criteria: If it falls into either of the following cases, it is satisfactory. i. Marker events can be handled without error. ii. Marker events are ignored so the message is output. 19

20 No11. Problem when Meas is selected in Selector block (Page 94 of Section 19.1 of IEEE1450.0) Points to be checked: The behavior when Meas is specified as the variable type in the Selector and the variable specified by the Meas is described in the WaveofrmTable. Data: Meas variable "delay1" is used in the timing definition of pin group "input_time_gen_1" in WaveformTable "STUCK_timing". Spec "spec"{ Category "mode1"{ "delay1"{ Min '11ns'; Typ '10ns'; Selector "mix"{ "delay1" Meas; Timing STUCK_timing { WaveformTable tset_gen_tp2 { Period '40ns' ; Waveforms { input_time_gen_1 { 01 { '0ns' D; 'delay1' D/U; '30ns' D; Data name: s1423.stil.mix.0_11n, s1423.v Criteria: If it falls into either of the following cases, it is satisfactory: (1) Outputting the message for handling Meas in applications (2) Ignoring Meas event and outputting its message 20

21 No12. Problem with multiple definitions (Page 103 of Section 22.1 of IEEE1450.0) Points to be checked: The behavior when multiple WFCs are specified to the same pin in the Pattern block. Data: Pattern multiple definitions are set for two steps in the Vector statement right after Macro "TEST" in Pattern "MAIN_TEST" (represented in address: 2nd and 3rd steps; in time: 80ns and 160ns). SignalGroups{ : "ALLPOs1" = '"G701BF"+"G702"+"G726"'; "ALLPOs2" = '"G727"+"G729"+"test_so"'; Pattern MAIN_TEST { //********************************************************************************************// // TESTER LOOP PROCEDURES HAVE MEMORY...no // // TEST PROCEDURE...1 TYPE init // // SLOW TO TURN OFF...false SEQUENCES HAVE MEMORY....no // // TEST SEQUENCE TYPE init // //*********************************************************************************************// // Processing the Static: EVENT : Stim_PI: Macro "TEST" { "ALLPIs" = r17 Z 011Z; "ALLPOs" = XXXXXX; V{ "ALLPOs1"=000; "ALLPOs1"=XXX; "ALLPOs2"=LLL; "ALLPOs2"=000; V{ "ALLPOs1"=XXX; "ALLPOs1"=LLL; "ALLPOs2"=000; "ALLPOs2"=111; Data name: s1423.stil.mix.0_12n2, s1423_0_12n.v Criteria: If it falls into either of the following cases, it is satisfactory: (1) It is satisfactory if an error occurs because of multiple definitions, and the operation terminates. (2) It is satisfactory if the message of the processing method of the application is output after the error message saying multiple definitions is output, and the processing continues. Since there are multiple definitions of input and output pin group for "ALLPOs1" ("G701BF"+"G702"+"G726") and "ALLPOs2" ("G727"+"G729"+"test_so") in the second and third step Vector statements, it is satisfactory if you get a message stating which definition has been selected by the application. 21

22 No13. Problem of timing change and pattern omission in Loop block (Page 106 of Section 22.6 of IEEE1450.0) Points to be checked: The behavior when patterns in the Loop block are not described for all the pins. Data: Defines right after the Macro "test_setup" call (represented in address: 2nd step; in time: 100ns) a Loop statement in which a Vector statement having only one pin is specified. A timing switch is defined between the two-step Vector statements in the Loop statement right after the above Loop statement (represented in address: 4th step; in time: 700ns). A Goto statement is defined at 1380ns. Jumps over four-step Vector statements. STIL 1.0; : : Timing { //Timing depends on Period,Strobe time, or clock time as shown below: WaveformTable "_fast_wft_" { Period '60ns'; Waveforms { "all_inputs" { 0 { '0ns' D; "all_inputs" { 1 { '0ns' U; "all_inputs" { Z { '0ns' Z; "all_inputs" { N { '0ns' N; "all_outputs" { X { '0ns' X; "all_outputs" { H { '0ns' X; '20ns' H; "all_outputs" { L { '0ns' X; '20ns' L; "all_outputs" { T { '0ns' X; '20ns' T; "clk" { P { '0ns' D; '30ns' U; '40ns' D; "rst" { P { '0ns' U; '30ns' D; '40ns' U; WaveformTable "_default_wft_" { Period '100ns'; Waveforms { "all_inputs" { 0 { '0ns' D; "all_inputs" { 1 { '0ns' U; "all_inputs" { Z { '0ns' Z; "all_inputs" { N { '0ns' N; "all_outputs" { X { '0ns' X; "all_outputs" { H { '0ns' X; '40ns' H; "all_outputs" { L { '0ns' X; '40ns' L; "all_outputs" { T { '0ns' X; '40ns' T; "clk" { P { '0ns' D; '45ns' U; '55ns' D; "rst" { P { '0ns' U; '45ns' D; '55ns' U; MacroDefs { "test_setup" { W "_default_wft_"; V { "clk"=0; "rst"=1; 22

23 Pattern "_pattern_" { W "_default_wft_"; "precondition all Signals": C { "_pi"= r21 0 ; "_po"=xxxxxx; Macro "test_setup"; stiltest1: Loop 3 { V { "G0"=1; V { "_pi"= r21 Z ; "_po"=hhlltx; Loop 3 { V { "_pi"= r21 0 ; "_po"=xxxxxx; //Fourth step W "_fast_wft_"; V { "_pi"= r21 0 ; "_po"=xxxxxx; //First step //Second step //The timing of top V in the Loop is _default_wft_ Macro "test_setup"; // all_inputs" = V{ "G3"=0; // all_inputs" = Goto Stiltest2; V{ "G4"=0; V{ "G5"=0; V{ "G11"=0; V{ "G12"=0; Stiltest2: // The timing after GotoJump is_default_wft V{ "G14"=0; // all_inputs" = //"all_outputs"= XXXXXX "all_inputs" = '"test_si" + "clk" + "rst" + "test_se" + "G0" + "G1" + "G2" + "G3" + "G4" + "G5" + "G6" + "G7" + "G8" + "G9" + "G10" + "G11" + "G12" + "G13" + "G14" + "G15" + "G16"'; // #signals=21 "_pi" = '"all_inputs"'; // #signals=21" "all_outputs" = '"test_so" + "G726" + "G729" + "G702" + "G727" + "G701BF"'; // #signals=6 "_po" = '"all_outputs"'; // #signals=6 Data name: s1423.stil.mix.0_13n2, s1423.v Criteria: It is satisfactory if the previously described pattern and WaveformTable are inherited, and the operation normally terminates. If the pattern or timing is not described, the WFC and WaveformTable of the previous pattern are reflected. It is better if the message saying that effect is output. Check the following three places. (1) In the second-step Loop, patterns of the Vector statement right before are used for patterns of the pins except this one pin ("G0") GO,rst is WFC 1, and WFCs are 0 for other input pins and X for all other output pins. The timing used is W "_default_wft_". When the Loop pattern is developed, the value will be as shown below: W "_default_wft_"; V { "all_inputs" = ; "all_outputs"= XXXXXX; // G0,rst=1 V { "all_inputs" = ZZZZZZZZZZZZZZZZZZZZZ; "all_outputs"= HHLLTX; 23

24 W "_default_wft_"; V { "all_inputs" = ; "all_outputs"= XXXXXX; // G0,rst=1 V { "all_inputs" = ZZZZZZZZZZZZZZZZZZZZZ; "all_outputs"= HHLLTX; W "_default_wft_"; V { "all_inputs" = ; "all_outputs"= XXXXXX; // G0,rst=1 V { "all_inputs" = ZZZZZZZZZZZZZZZZZZZZZ; "all_outputs"= HHLLTX; (2) In the fourth-step Loop, there is WaveformTable switch (W "_fast_wft_";). The timing before the WaveformTable switch is _default_wft_. When the Loop pattern is developed, the value will be as shown below: W "_default_wft_"; V { "_pi"= r21 0 ; "_po"=xxxxxx; W "_fast_wft_"; V { "_pi"= r21 0 ; "_po"=xxxxxx; W "_default_wft_"; V { "_pi"= r21 0 ; "_po"=xxxxxx; W "_fast_wft_"; V { "_pi"= r21 0 ; "_po"=xxxxxx; W "_default_wft_"; V { "_pi"= r21 0 ; "_po"=xxxxxx; W "_fast_wft_"; V { "_pi"= r21 0 ; "_po"=xxxxxx; (3) At the destination where Goto jumps to, the timing is W "_default_wft_". For deficient pattern, the previously described V{ "G12"=0; is interited. // W "_default_wft_"; Macro "test_setup"; // all_inputs" = V{ "G3"=0; // all_inputs" = Goto Stiltest2; V{ "G4"=0; // all_inputs" = V{ "G5"=0; // all_inputs" = V{ "G11"=0; // all_inputs" = V{ "G12"=0; // all_inputs" = Stiltest2: // The timing after GotoJump is_default_wft //For deficient pattern, V{ "G12"=0; is inherited. V{ "G14"=0; // all_inputs" =

25 No14. Problem of ScanChain statement (Page 108 of Section of IEEE1450.0) Points to be checked: The behavior when the ScanChain statement is described in the Pattern block. Data: The defined ScanChains are as follows : chain1, chain2, chain3 ScanStructures { ScanChain chain1 { ScanLength 25; ScanInversion 0; ScanCells "inst_g22" "inst_g23" "inst_g24" "inst_g25" "inst_g26" "inst_g27" "inst_g28" "inst_g29" "inst_g30" "inst_g31" "inst_g32" "inst_g33" "inst_g34" "inst_g35" "inst_g36" "inst_g37" "inst_g38" "inst_g39" "inst_g40" "inst_g41" "inst_g46" ; ScanIn "test_si1"; ScanOut "test_so1"; ScanMasterClock "clk"; ScanChain chain2 { ScanLength 25; ScanInversion 0; "inst_g42" "inst_g43" "inst_g44" "inst_g45" ScanCells "inst_g47" "inst_g48" "inst_g49" "inst_g50" "inst_g51" "inst_g52" "inst_g53" "inst_g54" "inst_g55" "inst_g56" "inst_g57" "inst_g58" "inst_g59" "inst_g60" "inst_g61" "inst_g62" "inst_g63" "inst_g64" "inst_g65" "inst_g66" "inst_g67" "inst_g68" "inst_g69" "inst_g70" "inst_g71" ; ScanIn "test_si2"; ScanOut "test_so2"; ScanMasterClock "clk"; ScanChain chain3 { ScanLength 24; ScanInversion 0; ScanCells "inst_g72" "inst_g73" "inst_g74" "inst_g75" "inst_g76" "inst_g77" "inst_g78" "inst_g79" "inst_g80" "inst_g81" "inst_g82" "inst_g83" "inst_g84" "inst_g85" "inst_g86" "inst_g87" "inst_g88" "inst_g89" "inst_g90" "inst_g91" "inst_g92" "inst_g93" "inst_g94" "inst_g95" ; ScanIn "test_si3"; ScanOut "test_so3"; ScanMasterClock "clk"; MacroDefs { "scan_grp1" { W tset_gen_tp2; Shift { V { "_chain1_test_si1_" = #; "_chain1_test_so1_" = #; "_chain2_test_si2_" = #; "_chain2_test_so2_" = #; "_chain3_test_si3_" = #; "_chain3_test_so3_" = #; "clk" = 1; W tset_gen_tp2; "scan_grp2" { W tset_gen_tp2; ScanChain chain1; 25

26 Shift { V { "_chain1_test_si1_" = #; "_chain1_test_so1_" = #; "_chain2_test_si2_" = #; "_chain2_test_so2_" = #; "_chain3_test_si3_" = #; "_chain3_test_so3_" = #; "clk" = 1; W tset_gen_tp2; Procedures { "scanchain1" { W tset_gen_tp2; V { _pi_=xxx010xxxxxxxxxxxxxxxxx; _po_=xxxxxxxx; Shift { V { "_chain1_test_si1_" = #; "_chain1_test_so1_" = #;"_chain2_test_si2_" = #; "_chain2_test_so2_" = #; "clk" = 1; "scanchain2" { W tset_gen_tp2; V { _pi_=xxx010xxxxxxxxxxxxxxxxx; _po_=xxxxxxxx; ScanChain chain1; ScanChain chain2; Shift { V { "_chain1_test_si1_" = #; "_chain1_test_so1_" = #;"_chain2_test_si2_" = #; "_chain2_test_so2_" = #; "clk" = 1; Data name: s1423.stil.mix.0_14n, s1423_0_14.v Criteria: It is satisfactory if the specified ScanChain is set to Active, and the operation normally terminates. If the ScanChain is not specified, all ScanChanins are set to Active, and when a ScanChain is specified, the specified ScanChain is set to Active. Specification of ScanChain activates only once. It is satisfactory if the Shift operations are performed in the following order. - Procedure scanchain1: No ScanChain statement All ScanChains are active - Procedure scanchain2: Define ScanChain chain1; ScanChain chain2; Only the specified ScanChains are active - Macro scan_grp1: No ScanChain statement All ScanChains are Active - Macro scan_grp2: Define ScanChain chain1; Only the specified ScanChains are active - Macro scan_grp1: No ScanChain statement All ScanChains are active 26

27 No15. Problem of state of pins undefined in Procedures block (Page 109 of Chapter 24 of IEEE1450.0) Points to be checked: The behavior when the WFC of all pins used in the Pattern at the beginning of Procedures are not specified. Data: All pins used in the Pattern are not defined in the Procedures "stiltest" (Undefined signals: "G0", "G1", "clk", "rst", "G702"). Procedures "stiltest" is called right after the Macro "TEST" in the Pattern (80ns in the time). Data name: s1423.stil.mix.0_15, s1423_0_15n2.v Criteria: It is satisfactory if DefaultState is effective, and the operation normally terminates. The input DefaultState is indicated in Z, and the output DefaultState is in X. In this data, it is OK if the WFC is complemented as shown in the table below: Signal name Attributes & DefaultState setting Added WFC G0 InOut Z G1 In Z clk In{DefaultState D; 0 rst InOut{DefaultState U; 1 G702 Out X 27

28 No16. Problem of # and % operators for pattern substitution (Page 112 of Section 24.5 of IEEE1450.0) Points to be checked: (1) The behavior when the WFC passed to the Macro is received with the # and % operators. Data: (1) Definitions that the WFC is received with # in the Macro "stiltest1" and the WFC is received with % in the Macro "stiltest2". MacroDefs { : "stiltest1" { W "_default_wft_"; C { "_pi"= ; "_po"=xxxxxx; V { "G0" = #; "G1" = #; "G2" = #; V { "G0" = #; "G1" = #; "G2" = #; V { "G0" = #; "G1" = #; "G2" = #; "stiltest2" { W "_default_wft_"; C { "_pi"= ; "_po"=xxxxxx; V { "G0" = %; "G1" = %; "G2" = %; V { "G0" = %; "G1" = %; "G2" = %; V { "G0" = %; "G1" = %; "G2" = %; Pattern "_pattern_" { W "_default_wft_"; Macro "stiltest1" { "G0"=01X; "G1"=1X0; "G2"=X01; Macro "stiltest1" { "G0"=01X; "G1"=01X; "G2"=01X; Macro "stiltest2" { "G0"=0; "G1"=1; "G2"=X; : Data name: (1) s1423.stil.mix.0_16_1n, s1423.v 28

29 Criteria: (1) It is OK if constants are substituted sequentially into argument # and correctly into %. It is OK if the pattern in Macro is equal to the followings shown below in this data. The first Macro "stiltest1" C { "_pi"= ; "_po"=xxxxxx; V{G0=0;G1=1;G2=X; V{G0=1;G1=X;G2=0; V{G0=X;G1=0;G2=1; The second Macro "stiltest1" C { "_pi"= ; "_po"=xxxxxx; V{G0=0;G1=0;G2=0; V{G0=1;G1=1;G2=1; V{G0=X;G1=X;G2=X; The third Macro "stiltest2" C { "_pi"= ; "_po"=xxxxxx; V{G0=0;G1=1;G2=X; V{G0=0;G1=1;G2=X; V{G0=0;G1=1;G2=X; Points to be checked: (2) The behavior when # and % are mixed in the description for the same pin in the Macro. Data: (2) In the WFC substitution in the Macro, # and % operators are mixed for the signal "G2". MacroDefs { : "stiltest1" { W "_default_wft_"; C { "_pi"= ; "_po"=xxxxxx; V { "G0" = #; "G1" = #; "G2" = #; V { "G0" = #; "G1" = #; "G2" = %; V { "G0" = #; "G1" = #; "G2" = %; "stiltest2" { W "_default_wft_"; C { "_pi"= ; "_po"=xxxxxx; V { "G0" = %; "G1" = %; "G2" = %; V { "G0" = %; "G1" = #; "G2" = %; V { "G0" = %; "G1" = #; "G2" = %; Data name: (2) s1423.stil.mix.0_16_2n2, s1423.v 29

30 Criteria: (2) If an error occurs, the operation terminates with a message saying that event, it is satisfactory It is satisfactory if an error occurs because the mixing of # and % operators is not allowed and the message saying so is output. 30

31 No17. Problem of pattern description allowed when Alignment statement is defined (Page 76 of Section 14.1 of IEEE1450.0) Points to be checked: (1) Confirm the Alignment is enabled when Alignment statements are described in the Signals block and the signal/signal group definition of the SignalGroups block and the patterns are specified with a value such as Hex. Data: (1) In signal group definition "_pi1" of the SignalGroups block, an Alignment statement is described and the patterns are described with Hex, and in signal group definition "_pi", no Alignment is described and the patterns are described with Hex. SignalGroups { : "_pi" = '"all_inputs"'; // #signals=21 "_pi1" = '"all_inputs"'{alignment LSB; Base Hex 01; // #signals=21 : Pattern "_pattern_" { W "_default_wft_"; "precondition all Signals": C { "_pi"= r21 0 ; "_po"=xxxxxx; Macro "test_setup"; V { "_pi1"= h 1FFFFF ; : Data name: (1) s1423.stil.mix.0_17_1n, s1423.v Criteria: (1) It is satisfactory, if the Alignment statement is properly interrupted, and the operation normally terminates. If a 21-bit pattern from the left is specified to signal group _pi1 in the first Vector statement after the Macro "test_setup" call, it is satisfactory. V { "_pi1"= ; Points to be checked: (2) Confirm that the Alignment is disabled and the program ends with an error when Alignment statements are described in the Signals block and the signal/signal group definition of the SignalGroups block, and the patterns described in the Vector statement are WFCs. Data: (2) In signal group definition _pi of the SignalGroups block, an Alignment statement is described and the patterns are described with WFC more than the number of the signals. SignalGroups { : "_pi" = '"all_inputs"'{alignment MSB; // #signals=21 : Pattern "_pattern_" { W "_default_wft_"; "precondition all Signals": C { "_pi"= r21 0 ; "_po"=xxxxxx; Macro "test_setup"; 31

32 V { "_pi"= r22 1 ; : Data name: (2) s1423.stil.mix.0_17_2, s1423.v Criteria: It is satisfactory if an error occurs when the operation terminates with a message saying that event. It is satisfactory if an error occurs when disagreement in figures is found between the signals of the signal group "_pi" and WFCs in the Vector statement before Macro test_setup Call, because Alignment is ineffective in WFC. 32

33 No18. Problem of DataBitCount pattern omission (Page 101 of Section 21.2 of IEEE1450.0) Points to be checked: Confirm that it is interpreted that the same description as the Vector statement immediately before is described in the empty Vector statement when an empty Vector statement follows after the Vector statement in which DataBitCount is described. Data: The DataBitCount is described in the signal "G0" in the Signals, the empty Vector statement is described in the second and the last Vector statement, and the "G0" pattern is omitted in the Shift statement within the Macro. MacroDefs { "scan_grp1" { W tset_gen_tp2; Shift { V { "_chain1_test_si_" = #; "_chain1_test_so_" = #; "clk" = 1; W tset_gen_tp2; Pattern scan_test { //Pattern:0 Cycle:0 Loop:0 Ann {* Pattern:0 Cycle:0 Loop:0 * W tset_gen_tp2; V { _pi_=x010xxxxxxxxxxxxxxxx; _po_=xxxxxx; "G0" {0; 1; //Pattern:0 Cycle:1 Loop:1 Ann {* Pattern:0 Cycle:1 Loop:1 * "pattern 0": V { Macro "scan_grp1" { "_chain1_test_si_" = ; "_chain1_test_so_" = XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX XXXXXXX; Data name: s1423.stil.mix.0_18, s1423.v Criteria: It is satisfactory if the data is interpreted to be equal to the previous Vector statement, and the operation normally terminates. In this data, it is satisfactory if the pattern of the signal GO in the initial Vector statement and in the Shift statement is the same as the pattern of the initial Vector. Confirm that the same patterns as those of the first Vector are specified to the signal "G0" in the first Vector or Shift statement. MacroDefs { "scan_grp1" { 33

34 W tset_gen_tp2; Shift { V { "_chain1_test_si_" = #; "_chain1_test_so_" = #; "clk" = 1; "G0" {0; 1; W tset_gen_tp2; Pattern scan_test { //Pattern:0 Cycle:0 Loop:0 Ann {* Pattern:0 Cycle:0 Loop:0 * W tset_gen_tp2; V { _pi_=x010xxxxxxxxxxxxxxxx; _po_=xxxxxx; "G0" {0; 1; //Pattern:0 Cycle:1 Loop:1 Ann {* Pattern:0 Cycle:1 Loop:1 * "pattern 0": V { _pi_=x010xxxxxxxxxxxxxxxx; _po_=xxxxxx; "G0" {0; 1; Macro "scan_grp1" { "_chain1_test_si_" = ; "_chain1_test_so_" = XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX XXXXXXX; 34

35 No19. Problem with pin definitions in the first Vector statement in Pattern block (Page 109 of Section 23.2 of IEEE1450.0) Points to be checked: (1) When pins not described in the first Vector statement in the Pattern block is described in the Include file or in the Procedure block, which is used as a separate Pattern block inside of the Pattern block, the pins not used in the first Vector in the Pattern block are assumed to be used in a later Vector. Confirm that this case is a violation of the specifications. Data: (1) Signal AAA to which patterns are specified only in the Procedures "TEST" is described. Procedures { "TEST" { WaveformTable "test_cycle"; Vector { "ALLPOs" = %; "ALLPIs" = %; "AAA"=Z; Pattern MAIN_TEST { // Processing the Static: EVENT : Stim_PI: Vector { "ALLPIs" = r17 Z 011Z; "ALLPOs" = XXXXXX; // Processing the Static: EVENT : Scan_Load: // Inserted the Scan Sequence: Scan_Preconditioning_Sequence Call "TEST" { "ALLPIs" = r17 Z 011Z; "ALLPOs" = XXXXXX; Data name: (1) s1423.stil.mix.0_19_1, s1423_0_19.v Criteria: (1) If an error occurs, and the message saying that event is output, it is satisfactory. It is satisfactory if the error occurs when pins not used in the initial Vector in the Pattern block are used in the middle of the Pattern. Points to be checked: (2) Confirm the following: when there are a Procedures block and an Include file used as Pattern blocks in the beginning of the Pattern block, and other Procedure blocks and Include files follow them, if some pins in those following blocks/files are not described, and no description of those pins is found in the middle of all the pattern blocks, the default state are applied to those pins. Data: (2) Signal AAA to which patterns are specified only in the Procedures "ADDTEST" called only in the first Pattern is described. Procedures { "ADDTEST" { WaveformTable "test_cycle"; Vector { "ALLPOs" = %; "ALLPIs" = %; 35

36 "AAA"=Z; Pattern MAIN_TEST { // Processing the Static: EVENT : Scan_Load: // Inserted the Scan Sequence: Scan_Preconditioning_Sequence Call "ADDTEST" { "ALLPIs" = r17 Z 011Z; "ALLPOs" = XXXXXX; // Processing the Static: EVENT : Stim_PI: Vector { "ALLPIs" = r17 Z 011Z; "ALLPOs" = XXXXXX; Data name: (2) s1423.stil.mix.0_19_2, s1423_0_19.v Criteria: (2) If the default state is applied, and the operation normally terminates, it is satisfactory. In this data, it is satisfactory if the DefaultState value (Z) is applied to the pattern to the signal AAA defined only in the Procedure "ADDTEST" within the Pattern block following the initial Procedure ADDTEST. 36

37 No.20 Problem with range of pattern repeated description (Page 65 in Section 6.15 of IEEE ) Points to be checked: The operation of list description of vector flag r repeated Characters Data: Mixed data of the list description with repeated vector flag r - r is described in the list description with repeated vector flag r, in the V statement of PatternBlock - w is described in the list description with repeated vector flag r, in the V statement of PatternBlock - r is described in the list description with repeated vector flag r, in the substitution pattern of Procedure : : Procedures { "proc1" { W "tim_wf"; V { "all_pin"= r27 #; : : Pattern "r_test" { W "tim_wf"; C {"all_pin"= r27 0 ; Call "proc1" { "all_pin"= r3 0 r2 1111; //Write r to Procedure argument V {"all_pin"= r2 0 r X; //Write r to list description of V statement V {"all_pin"= h01lh r2 w ; //Write w in r description of the list description of V statement : : Data name: s1423.stil.mix0_20, s1423_0_4.v Criteria: It is OK if the vector repetition is interrupted and normally terminates. Development of the repeated pattern would be equivalent to the description shown below. Pattern "r_test" { W "tim_wf"; V { "all_pin"= ; V { "all_pin"= x; V { "all_pin"= ; 37

38 No21.Problem with pattern substitution of Procedure/Macro (Page 112 of Section 24.5 of IEEE1450.0) Points to be checked: 1) The operation when there is no pattern defined before the first substitution pattern of Procedure Data: 1) The following shows the Procedure body and arguments for calling : : Procedures { "proc1" { W "tim_wf"; // No pattern defined before the first substitution pattern of Procedure V { "_po_2"= r6 #; // Substitution pattern 1 V { "_po_1"= r6 #; // Substitution pattern 2 C { "_po_2"= r6 X; V { "_po_3"= r2 #; // Substitution pattern 3 : : Pattern "proc_test" { Ann {* ERR 1 * W "tim_wf"; C {"all_pin"= r21 0 r6 X; Call "proc1" { "_po_1"=1hz0zl; //Substitute to substitution pattern 2 "_po_3"=1p; // Substitute to substitution pattern 3 V { "_po_3"=1l; Data name: s1423.stil.mix0_21_1, s1423.v Criteria: 1) It is OK if the error message indicating that the pattern to be substituted is not clear is output, and the operation is terminated. It is regarded that the no pattern is defined just before # of the substitution pattern 1, and the pattern to be substituted is not clear. This is considered to be an error. Points to be checked: 2) The operation when there is no pattern defined before the first substitution pattern of Macro Data: 2) The following shows the Macro body and arguments for calling : : MacroDefs { "Macro1" { W "tim_wf"; // No pattern defined before the first substitution pattern of Macro V { "_po_2"= r6 #; // Substitution pattern1 V { "_po_1"= r6 #; // Substitution pattern2 38

The Criteria on STIL Usage Guide (Rev6.20)/ (Rev4.00) by STIL Basic Data

STIL-based Semiconductor Test Action Group (SSTAG) The Criteria on STIL Usage Guide 1450.0(Rev6.20)/1450.2 (Rev4.00) by STIL Basic Data Rev1.01 September 17, 2013 1 This material shall not be revised nor