Compressed Sampling CMOS Imager based on Asynchronous Random Pixel Contributions

Transcription

1 Compressed Sampling CMOS Imager based on Asynchronous Random Pixel Contributions Marco Trevisi 1, H.C. Bandala-Hernandez 2, Ricardo Carmona-Galán 1, and Ángel Rodríguez-Vázquez 1 1 Institute of Microelectronics of Seville (IMSE-CNM), CSIC-Universidad de Sevilla, Spain 2 National Institute of Astrophysics, Optics and Electronics (INAOE), Puebla, Mexico trevisi@imse-cnm.csic.es bandala@inaoep.mx ANAFOCUS 2007

2 Introduction Bio inspired approach and Compressive Sensing 2

3 Introduction Bio inspired approach and Compressive Sensing 3

4 Introduction Bio inspired approach and Compressive Sensing 4

5 Introduction Bio inspired approach and Compressive Sensing 5

6 Outlines Compressive Sensing, an Overview State of the Art VLSI implementations: Limitations and Solutions Proposed CMOS Imager Architecture: Advantages and Improvements MATLAB Analysis of the Performance of our Solution Conclusions ANAFOCUS 2007

7 Compressive Sensing, An Overview Sensing Problem being: Φ Ill-posed: if there are more variables than equations [Candès 2006] Restricted Isometry Property N R M <N M R Φ Φ: can be seen as a projection that maps a higher dimensional space into a lower dimensional space preserving proportions among Euclidean distances of the represented elements. 7

8 Compressive Sensing, An Overview Measurement Matrix Φ The measurement matrix for Image Sensing should be universal, physically realizable and easily implementable. No algorithms to create ad hoc matrices. Universal Strategies: Random Matrices: Incoherent Orthobasis Matrices: Ck M 2 ε ( N / k) 5 log ( ) ( 1) δ ε δ k ε Ck log N M 2 ε log ε k Gaussian Sub-Gaussian Poisson Fourier Cosine Hadamard Ensemble 8

9 Compressive Sensing, An Overview The Importance of Sparseness for the Reconstruction Implemented Reconstruction Method: NESTA [Becker 2009] Sparse Full 9

10 Compressive Sensing, An Overview The Importance of Sparseness for the Reconstruction Implemented Reconstruction Method: NESTA [Becker 2009] Sparse Full 10

11 State of the Art VLSI implementations: Limitations and Solutions Single Pixel Camera, Rice University In a streaming setting each measurement will act on a different snapshot however it can be assumed that through M fast snapshots the image changes very slowly allowing the reconstruction of an almost static image that takes the place of a frame in a video sequence. [Duarte 2009] 11

12 State of the Art VLSI implementations: Limitations and Solutions Single Pixel Camera, Rice University Measurement Matrix must be transmitted 12

13 State of the Art VLSI implementations: Limitations and Solutions Single Pixel Camera, Rice University Measurement Matrix must be transmitted 1 bit per Micromirror per Compressed Sample 13

14 State of the Art VLSI implementations: Limitations and Solutions Single Pixel Camera, Rice University Each Compressed Sample is the sum of M Pixels 14

15 State of the Art VLSI implementations: Limitations and Solutions Single Pixel Camera, Rice University Each Compressed Sample is the sum of M Pixels To maintain the Resolution the ADC needs: 8log 15

16 State of the Art VLSI implementations: Limitations and Solutions Ecole Polytechnique Fédérale de Lausanne CMOS Imager [Majidzadeh 2010] 16

17 State of the Art VLSI implementations: Limitations and Solutions Ecole Polytechnique Fédérale de Lausanne CMOS Imager 8log [Majidzadeh 2010] 17

18 State of the Art VLSI implementations: Limitations and Solutions Center for VLSI and Embedded Systems Technology of Hyderabad Block- Based CMOS Imager Segmentation of an image into a set of sub-images [Kaliannan 2014] 18

19 State of the Art VLSI implementations: Limitations and Solutions Center for VLSI and Embedded Systems Technology of Hyderabad Block- Based CMOS Imager Segmentation of an image into a set of sub-images Diminishes the sparseness of each sub-image [Kaliannan 2014] 19

20 Proposed CMOS Imager Architecture: Advantages and Improvements Measurement Matrix To achieve a bit transmission rate inferior to that of an uncompressed image one must remove the necessity to send the Measurement Matrix along with the samples. 20

21 Proposed CMOS Imager Architecture: Advantages and Improvements Measurement Matrix To achieve a bit transmission rate inferior to that of an uncompressed image one must remove the necessity to send the Measurement Matrix along with the samples. Store the patterns in an on-chip memory Generate the patterns on chip 21

22 Proposed CMOS Imager Architecture: Advantages and Improvements Measurement Matrix To achieve a bit transmission rate inferior to that of an uncompressed image one must remove the necessity to send the Measurement Matrix along with the samples. Store the patterns in an on-chip memory Generate the patterns on chip 22

23 Proposed CMOS Imager Architecture: Advantages and Improvements 1D Cellular Automaton Class 1: Nearly all initial patterns evolve quickly into a stable, homogeneous state. 23

24 Proposed CMOS Imager Architecture: Advantages and Improvements 1D Cellular Automaton Class 1: Nearly all initial patterns evolve quickly into a stable, homogeneous state. Class 2: Nearly all initial patterns evolve quickly into stable or oscillating structures. 24

25 Proposed CMOS Imager Architecture: Advantages and Improvements 1D Cellular Automaton Class 1: Nearly all initial patterns evolve quickly into a stable, homogeneous state. Class 2: Nearly all initial patterns evolve quickly into stable or oscillating structures. Class 3: Nearly all initial patterns evolve in a pseudo-random or chaotic manner. 25

26 Proposed CMOS Imager Architecture: Advantages and Improvements 1D Cellular Automaton Class 1: Nearly all initial patterns evolve quickly into a stable, homogeneous state. Class 2: Nearly all initial patterns evolve quickly into stable or oscillating structures. Class 3: Nearly all initial patterns evolve in a pseudo-random or chaotic manner. Class 4: Nearly all initial patterns evolve into structures that interact in complex and interesting ways 26

27 Proposed CMOS Imager Architecture: Advantages and Improvements 1D Cellular Automaton Class 1: Nearly all initial patterns evolve quickly into a stable, homogeneous state. Class 2: Nearly all initial patterns evolve quickly into stable or oscillating structures. Class 3: Nearly all initial patterns evolve in a pseudo-random or chaotic manner. Class 4: Nearly all initial patterns evolve into structures that interact in complex and interesting ways 27

28 Proposed CMOS Imager Architecture: Advantages and Improvements 1D Cellular Automaton implementing Rule 30 Class 3 Cellular Automaton: Nearly all initial patterns evolve in a pseudo-random or chaotic manner. 28

29 Proposed CMOS Imager Architecture: Advantages and Improvements 1D Cellular Automaton implementing Rule 30 Class 3 Cellular Automaton: Nearly all initial patterns evolve in a pseudo-random or chaotic manner. 29

30 Proposed CMOS Imager Architecture: Advantages and Improvements Bit Resolution To achieve a suitable bit resolution. 30

31 Proposed CMOS Imager Architecture: Advantages and Improvements Bit Resolution To achieve a suitable bit resolution. Classic AD conversion Digital representation of time 31

32 Proposed CMOS Imager Architecture: Advantages and Improvements Bit Resolution To achieve a suitable bit resolution. Classic AD conversion Digital representation of time 32

33 Proposed CMOS Imager Architecture: Advantages and Improvements Readout Logic 33

34 Proposed CMOS Imager Architecture: Advantages and Improvements Readout Logic 34

35 Proposed CMOS Imager Architecture: Advantages and Improvements Readout Logic Pixels, 8 bits each 35

36 Proposed CMOS Imager Architecture: Advantages and Improvements Readout Logic Pixels, 8 bits each 1 Compressed sample of 20 bits 36

37 Proposed CMOS Imager Architecture: Advantages and Improvements Readout Logic Pixels, 8 bits each 1 Compressed sample of 20 bits 30 fps 37

38 Proposed CMOS Imager Architecture: Advantages and Improvements Readout Logic Pixels, 8 bits each 1 Compressed sample of 20 bits 30 fps T !" 38

39 Proposed CMOS Imager Architecture: Advantages and Improvements Readout Logic Pixels, 8 bits each 1 Compressed sample of 20 bits 30 fps T !" 8 bits counter 39

40 Proposed CMOS Imager Architecture: Advantages and Improvements Readout Logic Pixels, 8 bits each 1 Compressed sample of 20 bits 30 fps T !" 8 bits counter T #$%& T 2 ' 40

41 Proposed CMOS Imager Architecture: Advantages and Improvements Readout Logic Pixels, 8 bits each 1 Compressed sample of 20 bits 30 fps T !" 8 bits counter T #$%& T 2 ' F )%* 1 2T #$%& + 24,- 41

42 MATLAB Analysis of the Performance of our Solution Average RMSE of Reconstruction RMSE of reconstruction (%) Number of Samples full frame block based We compare the results achieved with the RMSE of reconstruction of pixels images 1 compressed performing a block based compressive sampling strategy (red bars) and a full frame compressive strategy (blue bars). We devised the block based strategy by dividing each image in 64 sub-images of 8 8 pixels to be treated separately. 1 These images can be found at: 42

43 MATLAB Analysis of the Performance of our Solution Average Time of Reconstruction Time of reconstruction (s) full frame block based Number of Samples The resources needed to retrieve the images on lower compression ratios favour the block based sampling strategy. However, as we diminish the amount of samples, the time of reconstruction reverses its tendency allowing the full frame compressive strategy to outperform its block based counterpart. 43

44 Conclusions Final Remarks We have introduced a new architecture able to collect compressed samples using pseudo-random distributions generated on-chip. The pattern generated by the cellular automaton does not need to be transmitted and can be easily recovered by simply knowing the initial seed. We avoid splitting the sensor array in smaller portions worsening the quality of the samples or introducing asymmetries in the design of the sensor array. The solution applied to digitize the compressed samples improves their dynamic range thus optimizing reconstruction. 44

45 References E. Candès. Compressive sampling. Int. Congress of Mathematics, pp Madrid, Spain, S. Becker, J. Bobin, and E. J. Candès. NESTA: A Fast and Accurate First-Order Method for Sparse Recovery. SIAM Journal on Imaging Sciences, Vol. 4, No. 1, pp. 1-39, Jan M. F. Duarte, M. A. Davenport, D. Takbar, J. N. Laska, T. Sun, K. F. Kelly, and R. G. Baraniuk. Single-pixel imaging via compressive sampling. IEEE signal processing magazine, Vol. 25, No. 2, pp , Mar V. Majidzadeh, L. Jacques, A. Schmid, P. Vandergheynst and Y. Leblebici. A (256x256) Pixel 76.7mW CMOS Imager/Compressor Based on Real-Time In-Pixel Compressive Sensing. Proceedings of 2010 IEEE International Symposium on Circuits and Systems (ISCAS), pp Paris, France. May, 2010 B. Kaliannan, V S. Rao Pasupureddi. A Low Power CMOS Imager Based on Distributed Compressed Sensing. 27th International Conference on VLSI Design and 13th International Conference on Embedded Systems, pp Mumbai, India. Jan ANAFOCUS 2007

46 Acknowledgements This work has been funded by the Spanish Government through project TEC C3-1-R MINECO (ERDF/FEDER), Junta de Andalucía through project TIC CEICE, the Office of Naval Research (USA) through grant N and CONACYT (Mexico) through grant 2016-MZO ANAFOCUS 2007