TIME SYNCHRONIZATION TEST SOLUTION FROM VERYX TECHNOLOGIES

Transcription

1 TIME SYNCHRONIZATION TEST SOLUTION FROM VERYX TECHNOLOGIES

2 CONTENTS Introduction v2 Overview... 1 SyncE overview... 2 VERYX capability v2 Test Coverage... 2 Time Sync Application Test Coverage... 7 I. MOBILE BACKHAUL... 7 II. INDUSTRIAL AUTOMATION... 8 III. ETHERNET AUDIO/VIDEO NETWORKS... 8 Conclusion... 8 Copyright Veryx Technologies Page i

3 This page has been left blank intentionally Copyright Veryx Technologies Page ii

4 Introduction With the transport of all telecommunication services over unified and packet switched platforms, telecommunication networks are evolving into converged packed switched networks. Ethernet is now gaining prominence in the converged network scenario and playing a crucial role in access, aggregation and metro networks. The key pre-requisite for completing this evolution is the ability to distribute frequency and/or timing information which is required by some applications (like mobile back haul, circuit emulation, etc.). Though various technologies have been suggested to augment Ethernet for frequency and time distribution, the two widely deployed methods of synchronization are 1588v2 (Precision Timing Protocol) and SyncE (Ethernet Synchronization Message Channel Protocol). This document provides a brief overview of these synchronization technologies and Veryx capability to verify these implementations covering following application scenarios: Mobile backhaul, Industrial networks and Ethernet Audio/Video networks. 1588v2 Overview IEEE 1588v2 provides a mechanism to synchronize the system clock of distributed nodes in a system using standardized packet based networks. It also allows all the nodes in the network to synchronize system-wide in the sub-microsecond range. The nodes (clocks) in the network are classified based on the synchronization functionality it performs. The various types of clock types that are components of PTP network are: Grand Master Clock Boundary Clock End-to-End Transparent Clock Peer-to-Peer Transparent Clock Ordinary Clock (Client) The operation of PTP relies on a measurement of the communication path delay between the time source, referred to as a master, and the receiver, referred to as a slave. Copyright Veryx Technologies Page 1

5 SyncE overview SyncE is a timing distribution technology over Ethernet physical interfaces specified by ITU-T recommendations G.8262 and G The principle of SyncE is that each node in the network is provided with an Ethernet Equipment Clock (EEC) that synchronizes to the frequency received from one interface (connected to Primary Reference Clock) and uses the same frequency for all outgoing interfaces. The same procedure is used by the nodes in the next hop along the synchronization path until all the nodes are synchronized. In other words, SyncE is a hop-by-hop synchronization protocol. VERYX capability Veryx has extensive knowledge in verifying and validating several 1588v2 and SyncE implementations as a part of test solution offered to its customers. It has developed a comprehensive test library for verifying them. These tests are carried out using Veryx s own as well as third party tool providers such as Symmetricom, Calnex and Meinberg. The range of tests available as a part of test library to ascertain the correct behavior of time synchronization implementation are broadly classified under two different heads 1588v2 Test Coverage and SyncE Test Coverage. 1588v2 Test Coverage v2 Functionality Tests These tests verify time synchronization functionality using IEEE 1588v2 protocol across various clock types Grand Master, Boundary, Transparent, Ordinary (slave). The functionality verification is performed in following four test topologies Chain Topology, Ring Topology, Star Topology and Tree Topology which are depicted below: FIGURE 1 CHAIN TEST TOPOLOGY TO VERIFY 1588V2 FUNCTIONALITY Copyright Veryx Technologies Page 2

6 FIGURE 2 RING TEST TOPOLOGY TO VERIFY 1588V2 FUNCTIONALITY FIGURE 3 STAR TEST TOPOLOGY TO VERIFY 1588V2 FUNCTIONALITY Copyright Veryx Technologies Page 3

7 FIGURE 4 TREE TEST TOPOLOGY TO VERIFY 1588V2 FUNCTIONALITY The following functionality are verified in the above mentioned topologies i. Boundary Clock Functionality ii. End-to-End Transparent Clock Functionality iii. Peer-to-Peer Transparent Clock Functionality iv. BMC (Best Master Clock) Functionality v. Ordinary (Slave) Clock Synchronization with Master v2 Scalability Tests These tests verify the ability of the time synchronization functionality to scale for a larger time synchronization network. This is performed by emulating multiple Master/Ordinary Clocks and verifying the functionality of Master, Boundary, Transparent and Ordinary Clock. These scalability tests which are listed below are performed in all the functional test topologies i. Master Clock Scalability ii. Boundary Clock Scalability iii. Transparent Clock Scalability iv. Synchronization Network Scalability 3. Performance Testing based on G.8261 Traffic Profiles These tests verify the performance of clock recovery when the network (link between Master and Slave) is congested with uni-directional traffic and/or bidirectional traffic. The simulated Copyright Veryx Technologies Page 4

8 congestion conforms to Network Traffic Model defined in G The test cases defined in G.8261 Appendix VI are used to measure the performance of clock recovery. A sample test topology used for Performance Testing is depicted below: FIGURE 5 SAMPLE TEST TOPOLOGY TO MEASURE CLOCK RECOVERY This test topology introduces congestion between two transparent clocks, anywhere between Master clock and Slave Clock and then measures the clock recovery. The congestion is created by generating traffic conforming to G.8261 Traffic Profiles from traffic generator and the packet delay (1588v2 packets) is measured using the Network Emulator. 4. Clock Accuracy/Quality Tests These tests verify the accuracy of clock recovery and the quality of recovered clock. The clock quality and accuracy will be measured using following analysis: i. Wander Generation Analysis ii. Wander Tolerance Analysis iii. Noise Generation Analysis iv. Noise Tolerance Analysis v. Noise Transfer Analysis vi. Transient Response Analysis vii. Holdover Performance Analysis viii. Correction field Accuracy Analysis The sample test topology for measuring the clock accuracy is depicted below: Copyright Veryx Technologies Page 5

9 FIGURE 6 SAMPLE TEST TOPOLOGY TO MEASURE CLOCK RECOVERY The accuracy is measured in a time synchronization network using the Network Emulator which is capable of measuring the Packet Delay Variations. These tests are performed by generating traffic in the time synchronization network and measuring the Packet Delay Variation using the Network Emulator. The clock accuracy is measured under various traffic load conditions v2 Protocol Message Format Verification These tests verify the 1588v2 message format. This is done by snooping the packet exchanged between Master and Slave Clocks and between transparent clock devices. The message format verification is to make sure that the messages are conforming to IEEE standard. SYNCE TEST COVERAGE 1. SyncE Conformance Test based on ITU-T 8262 These tests verify that the implementation is conforming to ITU-T This verification will primarily focus on the ESMC message exchange between EEC devices and the subsequent clock accuracy measurement. The measurements that are carried out are: i. Jitter Generation Measurement ii. Frequency Accuracy Measurement iii. Wander Generation Measurement iv. Wander Tolerance Measurement v. Wander Transfer Measurement vi. Pull-in Ranges Measurement vii. Hold-in Ranges Measurement viii. Pull-out Ranges Measurement ix. Phase Transient Response Measurement x. Jitter Tolerance Measurement The sample test topology for verifying SyncE (G.8262) conformance is depicted below: Copyright Veryx Technologies Page 6

10 FIGURE 7 SAMPLE TEST TOPOLOGY TO MEASURE CLOCK RECOVERY 2. ESMC Protocol Message Format Verification These tests will verify the ESMC message format. This is done by snooping the packet exchanged between EEC emulator and EEC devices. The message format verification is to make sure that the messages are conforming to ITU-T G.8262 standard. Time Sync Application Test Coverage As a part of Time Synchronization Application test, Veryx Test Solution covers following application scenarios: i. Mobile Backhaul ii. Industrial Automation iii. Ethernet Audio/Video Networks The test approach adopted for each application is provided below. I. MOBILE BACKHAUL With mobile backhaul network transforming to Ethernet/IP based network with LTE/4G, the challenge faced by network operators is the timing distribution and synchronization in packet network. These challenges are addressed by industry recognized standards Synchronous Ethernet (ITU-T G.8262) and 1588v2 (IEEE 1588 Version 2). Veryx test solution verifies whether these time synchronization protocols address the challenges faced by network operators. In other words, the test solution will verify whether the SyncE implementation is distributing the reference frequency at physical layer between EEC and 1588v2 implementation is distributing the time and frequency across mobile backhaul networks through Boundary and Transparent Clocks. The test solution is adapted to the deployment scenarios based on the inputs provided by the customer and the adapted test solution is executed for validating the customer implementation. Copyright Veryx Technologies Page 7

11 II. INDUSTRIAL AUTOMATION In traditional industrial automation environment, input sensors, output actuators, and industrial controllers are distributed over a local area network. Since the traditional environment which use scan-based and event-triggered control algorithm experience jitter and delay, time based control methods is preferred. The time based control mechanism need a mechanism for distributing timing information across the entities in the industrial automation environment and it is provided by industry recognized standard IEEE 1588 Version 2. Veryx test solution verifies 1588v2 implementation in the industrial automation network from the perspective of following parameters: Jitter Delays Accuracy Latency This verification will ensure that the time based control mechanism provides the performance alternative to scan-based and event-triggered mechanisms. III. ETHERNET AUDIO/VIDEO NETWORKS With the Ethernet forming the backbone of the emerging Audio/Video networks, it becomes essential to be able to provide reliable audio and video delivery over such networks. Audio/Video Bridging (AVB) Task Group worked on this enhancement to deliver time-synchronized, low-latency audio and video over Ethernet networks. To achieve this, AVB devices periodically exchange timing information to synchronize their time base reference clock very precisely. The protocol used for time synchronization is IEEE 802.1AS which is the constrained subset of IEEE 1588 Version 2. Veryx test solution verifies the delivery of time-synchronized audio/video delivery within AVB network, covering the following two purposes: Allowing synchronization of multiple streams Providing common time base at the source and destination AVB devices Veryx 1588v2 test solution has been adapted to verify the capability of AVB networks. Conclusion Testing for Time synchronization support is a key requirement for the new generation of Ethernet based networks for supporting LTE/4G mobile backhaul, Industrial networks, AVB for Entertainment etc. Veryx has proven capabilities for supporting its customers for verifying their 1588v2 and SyncE implementations used in these applications. Copyright Veryx Technologies Page 8

12 Veryx Technologies ( is an innovative enterprise providing solutions that enhance product quality and testing efficiency. Leading equipment vendors, rely on the ATTEST range of products for testing applications in Access, Carrier Ethernet, Data Center, Edge, Enterprise, Industrial Networking and Security domains for over a decade. Veryx offers flexible, cost-effective products that enhance the Service Assurance capabilities of Ethernet Service Providers. AMERICAS: ASIA: +91 (44) EUROPE: Veryx Technologies. Veryx and Veryx ATTEST are trademarks of Veryx Technologies. v1.1/1/2013 Copyright Veryx Technologies Page 9