Enhanced Ethernet Switching Technology. Time Applications. Rui Santos 17 / 04 / 2009

Size: px

Start display at page:

Download "Enhanced Ethernet Switching Technology. Time Applications. Rui Santos 17 / 04 / 2009"

Lisa Woods
5 years ago
Views:

1 Enhanced Ethernet Switching Technology for Adaptive Hard Real- Time Applications Rui Santos 17 / 04 / 2009

2 Problem 2 Switched Ethernet became common in real-time communications Some interesting properties Large bandwidth Cheap network controllers Micro-segmentation Collisions are eliminated Multiple parallel forwarding paths High availability But there are still limitations FIFO queues Limited number of priorities Memory overflows Input ports Receiving buffers Packet handling - Address lookup - Traffic classification Sw itch Output Queues Scheduler Scheduler Output ports

3 Solutions 3 Commercial Off-The-Shelf Ethernet switches Limiting the generated traffic by the application design Traffic shaping Master-Slave protocols (FTT-SE, ) Customized Ethernet Switches TTEthernet Profinet-IRT FTT-Enabled Switch (HaRTES) - our solution

4 TTEthernet & Profinet-IRT Limitations Require a static pre-defined configuration for the real-time traffic On-line admission control is not generally available Miss on-line adaptation to the communication requirements and quality-of-service policies 4

technique Communication occurs in fixed slots (Elementary Cycles ECs) ECs are organized in RT and NRT windows

5 FTT-E. Switch (HaRTES) Protocol Mechanism Based on Flexible Time-Triggered Paradigm Master-slave transmission control technique Communication occurs in fixed slots (Elementary Cycles ECs) ECs are organized in RT and NRT windows Supports synchronous, asynchronous and non real-time traffic, with strict temporal isolation The ECs start with a Trigger Message (TM) sent by the Master (switch) TM contains the schedule for each EC FTT-SE 5 TM EC time

6 FTT-E. Switch (HaRTES) Properties Traffic scheduling and management Global traffic coordination in a common timeline Master synchronizes all nodes Supports online admission control and dynamic QoS management Allows arbitrary traffic scheduling policies Reduction in the switching latency jitter Traffic classification, confinement and policing Seamless integration of standard non-ftt-compliant nodes without jeopardizing the real-time services Asynchronous traffic is autonomously triggered by the nodes Non-conforming transmissions can be readily identified and blocked at the switch input ports, thus not interfering with the rest of the system 6

7 FTT-E. Switch (HaRTES) Architecture FTT-master SRDB Scheduler EC Schedule Dispatcher Admission control QoS Manager Packet forwarding Validation data Master messages Memory pool NRT Memory Async Async. (Queue) Sync. (Queue) NRT packet (Queue) Invalid Validate FTT packet Packet Classifier Port 1 Input side Up Input ports Port 1 Packet list Syn Asyn NRT Port dispatcher Port N Packet list Syn Asyn NRT Sync Port dispatcher ports Output side Sync. (Queue) Async. (Queue) Invalid Validate FTT packet Packet Classifier Port N Up 7

8 FTT-E. Switch (HaRTES) Architecture Complex Algorithms Admission control Difficult HW Implementation QoS Manager SRDB Code Scheduler Reuse EC Schedule FTT-SE Dispatcher Master Packet forwarding Master messages Memory pool NRT NRT packet (Queue) Validate FTT packet Packet Classifier Invalid Predictability Async. (Queue) Sync. (Queue) Validation data Determinism Async Port 1 Up Input ports Port 1 Packet list Syn Asyn NRT Port dispatcher Port N Packet list Syn Asyn NRT Sync Sync. (Queue) Speed of execution Async. Port (Queue) dispatcher Invalid Validate FTT packet Packet Classifier Port N Up Output ports 8

9 FTT-E. Switch (HaRTES) Implementation Top Level Software Implementation Master Module Hardware Implementation Switching Module 9

10 FTT-E. Switch (HaRTES) Implementation Master Unit Switching Module Master Unit & Switching module integration Utilization of an FPGA embedded processor (Synthetizable or Hardwired) More FPGA resources required Independent CPU communication with the FPGA is carried out by conventional interface (Ethernet, USB PCI, ) More expensive More free space in the FPGA Sharing the FTT-Master between FTT-SE version and FTT-Enabled Switch 10

11 FTT-E. Switch (HaRTES) Implementation Switching module Complete view 11

12 FTT-E. Switch (HaRTES) Submitted traffic 1kB packets, T avg = 250µs Experimental Results Confinement of NRT Traffic ingress TM Offset at the switch egress (relative to the TM) egress time RT Window EC (1ms) NRT Window 12

13 FTT-E. Switch (HaRTES) TM Experimental Results Regularity of the TM TM time Measures: T_TM avg = 1,000ms T_TM max = 1,0003ms T_TM min = 0,99998ms STD_TM = 138ns 13 Jitter purely from the switch

14 FTT-E. Switch (HaRTES) Current Status HaRTES/B Basic switching Capability to separate different traffic classes On-line scheduling HaRTES/S Error detection Traffic policing HaRTES/S Dynamic QoS management capabilities 14

15 FTT-E. Switch (HaRTES) Multiple Switches Problem How to create a network with multiple switches, where the communication is based on the FTT-Enabled Switch (HaRTES)? Solutions Network with one FTT-Enabled Switch and multiple COTS switches Network with multiple FTT-Enabled Switches 15

16 FTT-E. Switch (HaRTES) Multiple Switches Network with one FTT-Enabled Switch and multiple COTS switches Properties Trigger Messages are generated by FTT-Enabled Switch and disseminated by the others switches Advantages and Disadvantages Solution compatible with common networks COTS switches are cheaper COTS switches don t perform traffic policing The Trigger Message latency can generate problems of synchronization TM 16

17 FTT-E. Switch (HaRTES) Multiple Switches 17 Network with multiple FTT-Enabled Switches Properties Each FTT-Enabled Switch creates its own synchronization domain It needs a gateway to interconnect different synchronization domains Gateway can be avoided if FTT-Enabled Switches are slaves to each other Advantages and Disadvantages Whole network is covered by the traffic policing It needs a gateway More expensive TM TM Gateway

18 Server / FTT-E. Switch Another protocol 18 Motivation Synchronous (TT) Real-Time Ethernet protocols have difficulties in efficient handling messages streams that are asynchronous Video streams, Alarms, Sensors, Solution We propose to integrate CPU based server policy in the FTT- Enabled Switch ingress Polling Server, Deferrable Server, Sporadic Server, Providing reconfigurability Server and adaptability Online creation, deletion and adaptation of servers Advantages egress x xx Full control over streams of messages, no matter the arrival patterns Unnecessary to send trigger message to the slaves.

19 Conclusions The growing availability of FPGAs, associated tools and communication IP cores opens the way to build customizable devices with properties that are tuned to specific application domains We propose an enhanced Ethernet switch that brings substantial improvements in timeliness, integrity and operational flexibility: Isolation of traffic classes Integration of standard Ethernet nodes Transmission of the Trigger Message with high precision The proposed hardware/software partition allows reusing the FFT-SE Master with minimal adaptations 19

20 Future Work Finish the propose work on the project Integrate multiple switches Adapt the enhanced switch to allow integration in architectures with multiple synchronization domains Replicate the Master Integrate CPU based server policy 20

Technology for Adaptive Hard. Rui Santos, UA

Technology for Adaptive Hard. Rui Santos, UA HaRTES Meeting Enhanced Ethernet Switching Technology for Adaptive Hard Real-Time Applications Rui Santos, rsantos@ua.pt, UA SUMMARY 2 MOTIVATION Switched Ethernet t became common in real-time communications