1k, 2k, 4k, bit EEPROMs for direct connection to serial ports

Transcription

1 BR900-W / F-W / FV-W / RFV-W / RFVM-W / BR9020-W / F-W / FV-W / k, 2k, 4k, bit EEPROMs for direct connection to serial ports BR900-W / BR900F-W / BR900FV-W / BR900RFV-W / BR900RFVM-W BR9020-W / BR9020F-W / BR9020FV-W / BR9020RFV-W / BR9020RFVM-W BR9040-W / BR9040F-W / BR9040FV-W / BR9040RFV-W / BR9040RFVM-W The BR90XX series are serial EEPROMs that can be connected directly to a serial port and can be erased and written electrically. Writing and reading is perfomed in word units, using four types of operation commands. Communication occurs through,,, and pins, pin control is used to initiate a write disabled state, enabling these EEPROMs to be used as one-time ROMs. During writing operation is checked via the internal status check. Application General-Purpose Features ) BR900-W / F-W / FV-W / RFV-W / RFVM-W (k bit) : 64 words 6bit BR9020-W / F-W / FV-W / RFV-W / RFVM-W (2k bit) : 28words 6bit BR9040-W / F-W / FV-W / RFV-W / RFVM-W (4k bit) : 256words 6bit 2) Single power supply. 3) Serial data I/O. 4) Self-timed programming cycle with auto-erase. 5) ow supply current. Active (5V) : 2mA (max.) Standby (5V) : 3µA (max.) (CMOS INPUT) 6) Noise filter on the pin. Write protection when the supply is low. 7) Write protection by pin. 8) Space Saving P8/SOP8/SSOP-B8/MSOP8pin Packages. 9) 00,000 erase/ write cycles endurance. 0) Provide 0 years of date retention. ) Easy connection to serial port. 2) FFFFh stored in all address on shipped. Rev.A /4

2 BR900-W / F-W / FV-W / RFV-W / RFVM-W / BR9020-W / F-W / FV-W / Block diagram Command decode Control Power supply voltage detector Clock generation Write disable igh voltage generator Command register Address buffer 6bitBR900 7bitBR9020 8bitBR9040 Address decoder 6bitBR900 7bitBR9020 8bitBR9040,024bit BR900 2,048bit BR9020 4,096bit BR9040 EEPROM Data register 6bit R / W amplifier 6bit array Terminal Function Pin No. BR90xx-W/RFV-W/RFVM-W BR90xxF-W/FV-W Pin name Function Chip Select Input Serial Date Clock Input Serial Date Input (Op code, address) 4 6 Serial Date Output 5 7 GND Ground (0V) Write Control Input READY/ BUSY Status Output Power Supply Rev.A 2/4

3 BR900-W / F-W / FV-W / RFV-W / RFVM-W / BR9020-W / F-W / FV-W / Absolute Maximum Ratings (Ta=25 C) Supply Voltage Power dissipation Parameter Symbol imits Unit Storage Temperature Operating Temperature Terminal Voltage BR900-W, BR9020-W, BR9040-W BR900F-W, BR9020F-W, BR9040F-W BR900FV-W, BR900RFV-W, BR9020FV-W, BR9020RFV-W, BR9040FV-W, BR9040RFV-W BR900RFVM-W, BR9020RFVM-W, BR9040RFVM-W Pd Tstg Topr Degradation is done at 8.0mW/ C for operation above Ta=25 C 2 Degradation is done at 4.5mW/ C for operation above Ta=25 C 3 Degradation is done at 3.0mW/ C for operation above Ta=25 C 4 Degradation is done at 3.mW/ C for operation above Ta=25 C P8 SOP8 SSOP-B8 MSOP8 0.3 to +7.0 V mw 65 to +25 C 40 to +85 C 0.3 to +0.3 V Recommended Operating Condition (Ta=25 C) Parameter Symbol Min. Typ. Max. Unit Supply voltage Write V Read V Input voltage VIN 0 V Rev.A 3/4

4 BR900-W / F-W / FV-W / RFV-W / RFVM-W / BR9020-W / F-W / FV-W / Electrical Characteristics Unless otherwise specified ( Ta=40 to +85 C, =2.7V to 5.5V) Parameter Symbol Min. Typ. Max. Unit Conditions Input OW Voltage Input IG Voltage Input OW Voltage 2 Input IG Voltage 2 Output OW Voltage Output IG Voltage Input eakage Current Output eakage Current Operating Current Standby Current Clock Frequency VI VI VI2 VI2 VO VO II IO ICC ICC2 ISB f V V V V V V µa pin pin,, pin,, pin IO=2.mA IO=0.4mA VIN=0V to µa VOUT=0V to, = ma ma µa Mz f=2mz, te / W=0ms (WRITE) f=2mz (READ),,, =,, =OPEN Unless otherwise specified ( Ta=40 to +85 C, =2.7V to 3.3V) Parameter Symbol Min. Typ. Max. Unit Conditions Input OW Voltage Input IG Voltage Input OW Voltage 2 Input IG Voltage 2 Output OW Voltage Output IG Voltage Input eakage Current Output eakage Current Operating Current Standby Current Clock Frequency VI VI VI2 VI2 VO VO II IO ICC ICC2 ISB f V pin V pin V,, pin V,, pin V IO=00µA V IO=00µA µa VIN=0V to µa ma ma µa VOUT=0V to, = f=2mz, te / W=0ms (WRITE) f=2mz (READ),,, =,, =OPEN 2 Mz Rev.A 4/4

5 BR900-W / F-W / FV-W / RFV-W / RFVM-W / BR9020-W / F-W / FV-W / AC Operation Characteristics ( Ta=40 to +85 C, =2.7 to 5.5V) Chip Select Setup Time Chip Select old Time Data In Setup Time Data In old Time Delay to Output igh Delay to Output ow Self-Timed Program Cycle Minimum Chip Select igh Time Parameter Symbol Min. Typ. Max. Unit Data Output Disable Time( From ) Clock igh Time Clock ow Time Write Control Setup Time Write Control old Time Clock igh to Output READY/BUSY Status ts 00 ns t 00 ns ts t tpd tpd0 te / W t to tw tw tw t tsv 00 ns 00 ns 50 ns 50 ns 0 ms 250 ns 0 50 ns 230 ns 230 ns 0 ns 0 ns 50 ns Rev.A 5/4

6 BR900-W / F-W / FV-W / RFV-W / RFVM-W / BR9020-W / F-W / FV-W / I / O Circuit () Input Circuit RESET int. int. int. (2) Output Circuit OE int. R/B Rev.A 6/4

7 BR900-W / F-W / FV-W / RFV-W / RFVM-W / BR9020-W / F-W / FV-W / Operating () Instruction Code READ WRITE Instruction Start Bit Op Code Address Data Write Enable (WEN) Write Disable (WDS) A0 A A2 A3 A4 A5 (A6) 2 (A7) A0 A A2 A3 A4 A5 (A6) 2 (A7) Address and data must be transferred from SB. Means either VI or VI BR9020-W/F-W/FV-W/RFV-W/RFVM-W = "0" BR900-W/F-W/FV-W/RFV-W/RFVM-W, 2= "0" D0 DD4 D5 (READ DATA) D0 DD4 D5 (WRITE DATA) Synchronous Data Input Output Timing t ts tw t t tw ts tpd tpd to Fig. Input Data is clocked into the pin on the rising edge of the clock Output data is clocked out on the falling edge of the clock. The pin does not have any affect on the READ, WEN and WDS operations. Between instructions, must be brought igh for greater than the minimum of t. If is maintained ow, the next instruction isn't detected. Rev.A 7/4

8 BR900-W / F-W / FV-W / RFV-W / RFVM-W / BR9020-W / F-W / FV-W / (2) WRITE Enable / Disable ENABE = SABE = igh-z IG or OW Fig.2 ) When power is first applied, the device has been held in a reset status, with respect to the write enable, in the same way the write disable (WDS) instruction is executed. Before the write instruction is executed, the device must be received the write enable (WEN) instruction. Once the device is done, the device remains programmable until the write disable (WDS) instruction is executed or the supply is removed from the device. 2) It is unnecessary to add the clock after 6th clock. If the device is recieved the clock, the device ignores the clock. 3) As both of the enable and disable instructions don t depend on the status of the pin, the state of isn t cared during the instruction. 4) The instruction is recognized after the rising edge of 8 th clock for the address following 8 clocks for the opcode, but the specified address isn t cared during the instructions. Rev.A 8/4

9 BR900-W / F-W / FV-W / RFV-W / RFVM-W / BR9020-W / F-W / FV-W / (3) Read Cycle IG-Z A0 A5 0 0 D0 D5 D0 D5 t STANDBY IG-Z to Read Data (n) Read Data (n+) IG or OW Fig.3 BR900-W / F--W / FV-W / RFV-W / RFVM-W IG-Z IG or OW A0 A6 0 D0 D5 Read Data (n) D0 D5 t STANDBY Read Data (n+) IG-Z to Fig.4 BR9020-W / F-W / FV-W / RFV-W / RFVM-W t A0 A6 A7 STANDBY IG-Z D0 D5 D0 D5 IG-Z to Read Data (n) Read Data (n+) IG or OW Fig.5 BR9040-W / F-W / FV-W / RFV-W / RFVM-W ) On the falling edge of 6 th clock, the data stored in the specified address (n) is clocked out of the pin. The Output is toggled after the internal propagation tp or tpd on the falling edge of. During tpd0 or tpd, the data is the previous data or unstable, and to take in the data, tpd is needed. (Refer to Fig. Synchronous data input output timing.) 2) The data stored in the next address is clocked out of the device on the falling edge of 32nd clock. The data stored in the upper address every 6 clocks is output sequentially by the continual input. Also the read operation is reset by igh. Rev.A 9/4

10 BR900-W / F-W / FV-W / RFV-W / RFVM-W / BR9020-W / F-W / FV-W / (4) Write Cycle t A0 A5 0 0 D0 D5 igh-z igh-z tsv te/w tw t Fig.6 BR900-W / F-W / FV-W / RFV-W / RFVM-W t A0 A6 0 D0 D5 igh-z igh-z tsv te/w tw t Fig.7 BR9020-W / F-W / FV-W / RFV-W / RFVM-W t A0 A6 A7 D0 D5 igh-z igh-z tsv te/w tw t Fig.8 BR9040-W / F-W / FV-W / RFV-W / RFVM-W Rev.A 0/4

11 BR900-W / F-W / FV-W / RFV-W / RFVM-W / BR9020-W / F-W / FV-W / ) During the write instruction, must be brought ow. owever once the write operation started, may be either igh or ow. But in the case of connecting the pin to the pin. and must be brought ow during programming cycle.(if the pin is brought igh during the write cycle, the write operation is halted. In that case, the data of the specified address is not guaranteed. It is necessary to rewrite it.) 2) After the pin changed Busy to Ready, once is brought igh, then keep ow,which means the status of being able to accept an instruction. The device can take in the input from and, but in the case of keeping ow without being brought igh once, the input is canceled until being igh once. 3) At the rising edge of 32 nd clock, the pin will be driven ow after the specified time delay (tsv). 4) During programming, is tied to ow by the device (On the rising edge of taken in the last data (D5), internal timer starts and automatically finished after the data of memory cell is written spending te / W. could be either igh or ow at the time. 5) After input write instruction, also the pin will be able to show the status of, in the case that is falling from igh to ow while is tied to ow. (Refer to READY / BUSY STATUS in the next page.) (5) READY / BUSY STATUS (on the pin, the pin) )The pin outputs the READY / BUSY status of the internal part, which shows whether the device is ready to receive the next instruction or not. (igh or ow) After the write instruction is completed, if is brought from high to low while is ow, the pin outputs the internal status. (The pin may be no connection. 2) When written to the memory cell, status is output after tsv spent from the rising edge of 32 th clock on. =ow : under writing After spending te / W operating the internal timer, the device automatically finishes writing. During te / W, the memory array is accessed and any instruction is not received. =igh : ready Auto programming has been completed. The device is ready to receive the next Instruction. COCK WRITE INSTRUCTION IG-Z tpd BUSY READY to IG-Z READY BUSY READY Fig.9 Status Output Timing Rev.A /4

12 BR900-W / F-W / FV-W / RFV-W / RFVM-W / BR9020-W / F-W / FV-W / (6) About the direct connection between the and pins The device can be used with the pin connected to the pin directly. But when the READY / BUSY status is output, be careful about the bus conflict on the port of the controller. Attention to Use () Power ON / OFF ) The is brought igh during power up and power down. 2) This device is in active state while is ow. 3) The extraordinary function or data collapse may occur in that condition because of noise etc, if power up and power down is done with brought ow. In order to prevent above errors from happening, keep igh during power-up and power-down. (Good example) is brought igh during power up and power-down. Please take more than 0ms between power up and power-off, or the internal circuit is not always reset. (Bad example) is brought ow during power up and power-down. The pin is always ow in this case, the noise may force the device to make malfunction or inadvertent write. It sometimes occurs in the case that the pin is i-z. GND GND Good Bad Fig.0 (2) Noise Rejection ) NOISE If line has a lot of noise for rising time of, the device may recognize the noise as a clock and then clock will be shifted. 2) NOISE If line has noise during write cycle (te / W), there may be a chance to deny the programming. 3) NOISE It recommended that capacitor is put between and GND to prevent these case, since it is possible to occur malfunction by the effect of noise or surge on power line. Rev.A 2/4

13 BR900-W / F-W / FV-W / RFV-W / RFVM-W / BR9020-W / F-W / FV-W / (3) Instruction Mode Cancel ) Read instruction 32 clocks START BIT OPCODE ADDRESS 4 bit 4 bit 8 bit 6 bit DATA D5 It is possible to be canceled for any timing. IG or OW ow to cancel : is brought igh. Fig. 2) Write instruction 32 clocks START BIT OPECODE ADDRESS DATA D5 4 bit 4 bit 8 bit 6 bit te / W a b c d Fig.2 ow to cancel a: is brought igh to cancel the instruction, and may be either igh or ow. b:in case that is brought igh for a moment, or is brought igh, the write instruction is canceled, the data of the specified address is not changed. c:when is brought igh, or the device is powered down (But the latter way is not recommended), the instruction is canceled but the specified data is not guaranteed. Send the instruction again. d:when is brought igh during R/B igh, the device is reset and ready to receive a next instruction. NOTE : The document may be strategic technical data subject to COCOM regulations. Rev.A 3/4

14 BR900-W / F-W / FV-W / RFV-W / RFVM-W / BR9020-W / F-W / FV-W / External dimensions (Unit : mm) BR900-W, BR9020-W, BR9040-W BR900FV-W, BR900RFV-W BR9020FV-W, BR9020RFV-W BR9040FV-W, BR9040RFV-W 9.3± ± ± ± ± Min. 3.2± ± Min ±0. 0 ~ 5 0.3±0..5±0. 0. (0.52) ± ±0. P8 SSOP-B8 BR900F-W, BR9020F-W, BR9040F-W BR900RFVM-W, BR9020RFVM-W, BR9040RFVM-W 2.9±0. 6.2± ±0.2.5± ± ±0. 0.3Min. 0.5± ± ± Max. 0.75± ± S 0.29± ± M SOP8 MSOP8 Rev.A 4/4

15 Appendix Notes No technical content pages of this document may be reproduced in any form or transmitted by any means without prior permission of ROM CO.,TD. The contents described herein are subject to change without notice. The specifications for the product described in this document are for reference only. Upon actual use, therefore, please request that specifications to be separately delivered. Application circuit diagrams and circuit constants contained herein are shown as examples of standard use and operation. Please pay careful attention to the peripheral conditions when designing circuits and deciding upon circuit constants in the set. Any data, including, but not limited to application circuit diagrams information, described herein are intended only as illustrations of such devices and not as the specifications for such devices. ROM CO.,TD. disclaims any warranty that any use of such devices shall be free from infringement of any third party's intellectual property rights or other proprietary rights, and further, assumes no liability of whatsoever nature in the event of any such infringement, or arising from or connected with or related to the use of such devices. Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or otherwise dispose of the same, no express or implied right or license to practice or commercially exploit any intellectual property rights or other proprietary rights owned or controlled by ROM CO., TD. is granted to any such buyer. Products listed in this document are no antiradiation design. The products listed in this document are designed to be used with ordinary electronic equipment or devices (such as audio visual equipment, office-automation equipment, communications devices, electrical appliances and electronic toys). Should you intend to use these products with equipment or devices which require an extremely high level of reliability and the malfunction of with would directly endanger human life (such as medical instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers and other safety devices), please be sure to consult with our sales representative in advance. About Export Control Order in Japan Products described herein are the objects of controlled goods in Annex (Item 6) of Export Trade Control Order in Japan. In case of export from Japan, please confirm if it applies to "objective" criteria or an "informed" (by MITI clause) on the basis of "catch all controls for Non-Proliferation of Weapons of Mass Destruction. Appendix-Rev.