ADSP-BF506F EZ-KIT Lite Evaluation System Manual

Transcription

1 ADSP-BF506F EZ-KIT Lite Evaluation System Manual Revision., July 0 Part Number Analog Devices, Inc. One Technology Way Norwood, Mass a

2 Copyright Information 0 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent from Analog Devices, Inc. Printed in the USA. Disclaimer Analog Devices, Inc. reserves the right to change this product without prior notice. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc. Trademark and Service Mark Notice The Analog Devices logo, Blackfin, CrossCore, EngineerZone, EZ-Extender, EZ-KIT Lite, and VisualDSP++ are registered trademarks of Analog Devices, Inc. All other brand and product names are trademarks or service marks of their respective owners.

3 Regulatory Compliance The ADSP-BF506F EZ-KIT Lite is designed to be used solely in a laboratory environment. The board is not intended for use as a consumer end product or as a portion of a consumer end product. The board is an open system design which does not include a shielded enclosure and therefore may cause interference to other electrical devices in close proximity. This board should not be used in or near any medical equipment or RF devices. The ADSP-BF506F EZ-KIT Lite has been certified to comply with the essential requirements of the European EMC directive 00/08/EC and therefore carries the CE mark. The ADSP-BF506F EZ-KIT Lite has been appended to Analog Devices, Inc. EMC Technical File (EMC TF) referenced DSPTOOLS, issue dated June, 008 and was declared CE compliant by an appointed Notified Body (No.067) as listed below. Notified Body Statement of Compliance: Z600ANA.08 dated June 00. Issued by: Technology International (Europe) Limited 56 Shrivenham Hundred Business Park Shrivenham, Swindon, SN6 8TY, UK The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-KIT Lite boards in the protective shipping package.

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5 CONTENTS PREFACE Product Overview... xi Purpose of This Manual... xiii Intended Audience... xiii Manual Contents... xiv What s New in This Manual... xiv Technical Support... xv Supported Processors... xvi Product Information... xvi Analog Devices Web Site... xvi EngineerZone... xvii Related Documents... xviii Notation Conventions... xviii ADSP-BF506F EZ-KIT Lite Evaluation System Manual v

6 Contents USING ADSP-BF506F EZ-KIT LITE Package Contents... - Default Configuration... - CCES Install and Session Startup... - Session Startup VisualDSP++ Install and Session Startup Session Startup CCES Evaluation License VisualDSP++ Evaluation License... - Memory Map... - Internal Flash Memory Interface... - SPI Flash Memory Interface... - Power-On-Self Test... - LEDs and Push Buttons... - JTAG Interface Expansion Interface II VDDINT Programmable Regulator Power Measurements Example Programs Board Design Database vi ADSP-BF506F EZ-KIT Lite Evaluation System Manual

7 Contents ADSP-BF506F EZ-KIT LITE HARDWARE REFERENCE System Architecture... - Programmable Flags... - Push Buttons and Switches UART Setup Switch (SW) Boot Mode Select Switch (SW) Push Button Enable Switch (SW) ADC Enable Switch (SW) CAN Enable Switch (SW5) Reset Push Button (SW6) Programmable Flag Push Buttons (SW7 8) ADC Loopback Switches (SW9 0) Jumpers... - SPI FLASH CS Enable Jumper (JP)... - Voltage Reference Select Jumper (JP)... - VDDEXT Power Jumper (JP)... - VDDINT Power Jumper (JP)... - VDDFLASH Power Jumper (JP5)... - ADC Voltage Reference (JP6)... - LEDs... - Reset LED (LED) GPIO LEDs (LED ) Power LED (LED5) ADSP-BF506F EZ-KIT Lite Evaluation System Manual vii

8 Contents Connectors RS- Connector (J) CAN Connector (J) SD Connector (J) JTAG Connector (P) Expansion Interface II Connectors (P and P) Expansion Interface II Connector (P) DMAX Land Grid Array Connectors (P5 6) ADC Input Connector (P7) Power Connector (P9) ADSP-BF506F EZ-KIT LITE BILL OF MATERIALS ADSP-BF506F EZ-KIT LITE SCHEMATIC INDEX viii ADSP-BF506F EZ-KIT Lite Evaluation System Manual

9 PREFACE Thank you for purchasing the ADSP-BF506F EZ-KIT Lite, Analog Devices, Inc. evaluation system for the ADSP-BF50/BF506F Blackfin processors. Blackfin processors embody a type of embedded processor designed specifically to meet the computational demands and power constraints of today s embedded audio, video, and communications applications. They deliver breakthrough signal-processing performance and power efficiency within a reduced instruction set computing (RISC) programming model. Blackfin processors support a media instruction set computing (MISC) architecture. This architecture is the natural merging of RISC, media functions, and digital signal processing (DSP) characteristics. Blackfin processors deliver signal-processing performance in a microprocessor-like environment. Based on the Micro Signal Architecture (MSA), Blackfin processors combine a -bit RISC instruction set, dual 6-bit multiply accumulate (MAC) DSP functionality, and eight-bit video processing performance that had previously been the exclusive domain of very-long instruction word (VLIW) media processors. ADSP-BF506F EZ-KIT Lite Evaluation System Manual ix

10 The evaluation board is designed to be used in conjunction with the CrossCore Embedded Studio (CCES) and VisualDSP++ development environments to test capabilities of the ADSP-BF50/BF506F Blackfin processors. The development environment aids advanced application code development and debug, such as: Create, compile, assemble, and link application programs written in C++, C, and ADSP-BF506F assembly Load, run, step, halt, and set breakpoints in application programs Read and write data and program memory Read and write core and peripheral registers Plot memory Access to the processor from a personal computer (PC) is achieved through a USB port or an external JTAG emulator. The USB interface provides unrestricted access to the ADSP-BF506F processor and evaluation board peripherals. Analog Devices JTAG emulators offer faster communication between the host PC and target hardware. Analog Devices carries a wide range of in-circuit emulation products. To learn more about Analog Devices emulators and processor development tools, go to The ADSP-BF506F EZ-KIT Lite provides example programs to demonstrate the evaluation board capabilities. x ADSP-BF506F EZ-KIT Lite Evaluation System Manual

11 Preface Product Overview The board features: Analog Devices ADSP-BF506F Blackfin processor Core performance up to 00 MHz External bus performance up to 80 MHz 0-pin LQFP package 5 MHz crystal Programmable VDDINT core power Analog Devices AD558 TWI digital potentiometer Analog Devices ADP75 low dropout linear regulator Internal parallel flash memory Numonyx M58WT0 MB (M x 6 bits) SPI flash memory Numonyx M5P6 6 Mb Internal ADC Analog Devices AD766 MSPS, -bit, -channel SAR analog-to-digital converter Twelve single-ended inputs Six differential inputs ADSP-BF506F EZ-KIT Lite Evaluation System Manual xi

12 Product Overview Universal asynchronous receiver/transmitter (UART) LEDs ADM0 RS- line driver/receiver DB9 female connector Five LEDs: one board reset (red), three general-purpose (amber), and one power (green) Push buttons Three push buttons: one reset and two programmable flags with debounce logic Expansion interface II Provides access to most of the processor signals Land grid array Easy probing of all port pins Other features JTAG ICE -pin header Processor power measurement jumpers For information about the hardware components of the EZ-KIT Lite, refer to Chapter, ADSP-BF506F EZ-KIT Lite Hardware Reference. xii ADSP-BF506F EZ-KIT Lite Evaluation System Manual

13 Preface Purpose of This Manual The ADSP-BF506F EZ-KIT Lite Evaluation System Manual provides instructions for installing the product hardware (board). The text describes operation and configuration of the board components and provides guidelines for running your own code on the ADSP-BF506F EZ-KIT Lite. Finally, a schematic and a bill of materials are provided for reference. Intended Audience The primary audience for this manual is a programmer who is familiar with Analog Devices processors. This manual assumes that the audience has a working knowledge of the appropriate processor architecture and instruction set. Programmers who are unfamiliar with Analog Devices processors can use this manual but should supplement it with other texts that describe your target architecture. For the locations of these documents, see Related Documents. Programmers who are unfamiliar with CCES or VisualDSP++ should refer to the online help and user s manuals. ADSP-BF506F EZ-KIT Lite Evaluation System Manual xiii

14 Manual Contents Manual Contents The manual consists of: Chapter, Using ADSP-BF506F EZ-KIT Lite on page -. Describes EZ-KIT Lite functionality from a programmer s perspective and provides an easy-to-access memory map. Chapter, ADSP-BF506F EZ-KIT Lite Hardware Reference on page -. Provides information on the EZ-KIT Lite hardware components. Appendix A, ADSP-BF506F EZ-KIT Lite Bill Of Materials on page A-. Provides a list of components used to manufacture the EZ-KIT Lite board. Appendix B, ADSP-BF506F EZ-KIT Lite Schematic on page B-. Provides the resources to allow board-level debugging or to use as a reference guide. Appendix B is part of the online help. What s New in This Manual This is revision. of the ADSP-BF506F EZ-KIT Lite Evaluation System Manual. The manual has been updated to include CCES information. In addition, modifications and corrections based on errata reports against the previous manual revision have been made. For the latest version of this manual, please refer to the Analog Devices Web site. xiv ADSP-BF506F EZ-KIT Lite Evaluation System Manual

15 Preface Technical Support You can reach Analog Devices processors and DSP technical support in the following ways: Post your questions in the processors and DSP support community at EngineerZone : Submit your questions to technical support directly at: your questions about processors, DSPs, and tools development software from CrossCore Embedded Studio or VisualDSP++: Choose Help > Support. This creates an to processor.tools.support@analog.com and automatically attaches your CrossCore Embedded Studio or VisualDSP++ version information and license.dat file. your questions about processors and processor applications to: processor.support@analog.com or processor.china@analog.com (Greater China support) In the USA only, call -800-ANALOGD ( ) Contact your Analog Devices sales office or authorized distributor. Locate one at: ADSP-BF506F EZ-KIT Lite Evaluation System Manual xv

16 Supported Processors Send questions by mail to: Processors and DSP Technical Support Analog Devices, Inc. Three Technology Way P.O. Box 906 Norwood, MA USA Supported Processors This evaluation system supports Analog Devices ADSP-BF50, ADSP-BF50F, and ADSP-BF506F Blackfin embedded processors. Product Information Product information can be obtained from the Analog Devices Web site and the online help system. Analog Devices Web Site The Analog Devices Web site, provides information about a broad range of products analog integrated circuits, amplifiers, converters, and digital signal processors. To access a complete technical library for each processor family, go to The manuals selection opens a list of current manuals related to the product as well as a link to the previous revisions of the manuals. When locating your manual title, note a possible errata check mark next to the title that leads to the current correction report against the manual. Also note, myanalog is a free feature of the Analog Devices Web site that allows customization of a Web page to display only the latest information xvi ADSP-BF506F EZ-KIT Lite Evaluation System Manual

17 Preface about products you are interested in. You can choose to receive weekly notifications containing updates to the Web pages that meet your interests, including documentation errata against all manuals. myanalog provides access to books, application notes, data sheets, code examples, and more. Visit myanalog (found on the Analog Devices home page) to sign up. If you are a registered user, just log on. Your user name is your address. EngineerZone EngineerZone is a technical support forum from Analog Devices. It allows you direct access to ADI technical support engineers. You can search FAQs and technical information to get quick answers to your embedded processing and DSP design questions. Use EngineerZone to connect with other DSP developers who face similar design challenges. You can also use this open forum to share knowledge and collaborate with the ADI support team and your peers. Visit to sign up. ADSP-BF506F EZ-KIT Lite Evaluation System Manual xvii

18 Related Documents Related Documents For additional information about the product, refer to the following publications. Table. Related Processor Publications Title ADSP-BF50/BF50F/BF506F Blackfin Embedded Processor Data Sheet ADSP-BF50x Blackfin Processor Hardware Reference Blackfin Processor Programming Reference Description General functional description, pinout, and timing of the processor Description of the internal processor architecture and all register functions Description of all allowed processor assembly instructions Notation Conventions Text conventions used in this manual are identified and described as follows. Example Close command (File menu) {this that} [this that] [this, ] Description Titles in reference sections indicate the location of an item within the development environment s menu system (for example, the Close command appears on the File menu). Alternative required items in syntax descriptions appear within curly brackets and separated by vertical bars; read the example as this or that. One or the other is required. Optional items in syntax descriptions appear within brackets and separated by vertical bars; read the example as an optional this or that. Optional item lists in syntax descriptions appear within brackets delimited by commas and terminated with an ellipse; read the example as an optional comma-separated list of this. xviii ADSP-BF506F EZ-KIT Lite Evaluation System Manual

19 Preface Example.SECTION filename Description Commands, directives, keywords, and feature names are in text with letter gothic font. Non-keyword placeholders appear in text with italic style format. Note: For correct operation,... A Note provides supplementary information on a related topic. In the online version of this book, the word Note appears instead of this symbol. Caution: Incorrect device operation may result if... Caution: Device damage may result if... A Caution identifies conditions or inappropriate usage of the product that could lead to undesirable results or product damage. In the online version of this book, the word Caution appears instead of this symbol. Warning: Injury to device users may result if... A Warning identifies conditions or inappropriate usage of the product that could lead to conditions that are potentially hazardous for the devices users. In the online version of this book, the word Warning appears instead of this symbol. ADSP-BF506F EZ-KIT Lite Evaluation System Manual xix

20 Notation Conventions xx ADSP-BF506F EZ-KIT Lite Evaluation System Manual

21 USING ADSP-BF506F EZ-KIT LITE This chapter provides specific information to assist you with development of programs for the ADSP-BF506F EZ-KIT Lite evaluation system. The following topics are covered. Package Contents on page - Default Configuration on page - CCES Install and Session Startup on page - VisualDSP++ Install and Session Startup on page -8 CCES Evaluation License on page -0 VisualDSP++ Evaluation License on page - Memory Map on page - Internal Flash Memory Interface on page - SPI Flash Memory Interface on page - Power-On-Self Test on page - LEDs and Push Buttons on page - JTAG Interface on page -5 Expansion Interface II on page -5 VDDINT Programmable Regulator on page -6 ADSP-BF506F EZ-KIT Lite Evaluation System Manual -

22 Package Contents Power Measurements on page -7 Example Programs on page -8 Board Design Database on page -8 For information about the graphical user interface, including the boot loading, target options, and other facilities of the EZ-KIT Lite system, refer to the online help. For more detailed information about the ADSP-BF506F Blackfin processor, see documents referred to at Related Documents. Package Contents Your ADSP-BF506F EZ-KIT Lite evaluation system package contains the following items. ADSP-BF506F EZ-KIT Lite board USB cable If any item is missing, contact the vendor where you purchased your EZ-KIT Lite or contact Analog Devices, Inc. - ADSP-BF506F EZ-KIT Lite Evaluation System Manual

23 Using ADSP-BF506F EZ-KIT Lite Default Configuration The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-KIT Lite boards in the protective shipping package. The ADSP-BF506F EZ-KIT Lite board is designed to run outside your personal computer as a standalone unit. When removing the EZ-KIT Lite board from the package, handle the board carefully to avoid the discharge of static electricity, which can damage some components. Figure - shows the default jumper settings, switches, connector locations, and LEDs used in installation. Confirm that your board is in the default configuration before using the board. CCES Install and Session Startup For information about CCES and to download the software, go to A link for the ADSP-BF506F EZ-KIT Lite Board Support Package (BSP) for CCES can be found at Follow these instructions to ensure correct operation of the product software and hardware. Step : Connect the EZ-KIT Lite board to a personal computer (PC) running CCES using one of two options: an Analog Devices emulator or via the debug agent. ADSP-BF506F EZ-KIT Lite Evaluation System Manual -

24 CCES Install and Session Startup Figure -. EZ-KIT Lite Hardware Setup Using an Emulator:. Plug one side of the USB cable into the USB connector of the emulator. Plug the other side into a USB port of the PC running CCES.. Attach the emulator to the header connector P (labeled JTAG) on the EZ-KIT Lite board. - ADSP-BF506F EZ-KIT Lite Evaluation System Manual

25 Using ADSP-BF506F EZ-KIT Lite Using the on-board Debug Agent:. Plug one side of the USB cable into the USB connector of the debug agent ZP (labeled USB).. Plug the other side of the cable into a USB port of the PC running CCES. Step : Attach the provided cord and appropriate plug to the 5V power adaptor.. Plug the jack-end of the power adaptor into the power connector P9 (labeled 5V) on the EZ-KIT Lite board.. Plug the other side of the power adaptor into a power outlet. The power LED (labeled LED5) is lit green when power is applied to the board.. Power the emulator (if used). Plug the jack-end of the assembled power adaptor into the emulator and plug the other side of the power adaptor into a power outlet. The enable/power is lit green when power is applied. Step (if connected through the debug agent): Verify that the yellow USB monitor LED (labeled ZLED) and the green power LED (labeled ZLED) on the debug agent are both on. This signifies that the board is communicating properly with the host PC and ready to run CCES. ADSP-BF506F EZ-KIT Lite Evaluation System Manual -5

26 CCES Install and Session Startup Session Startup It is assumed that the CrossCore Embedded Studio software is installed and running on your PC. Note: If you connect the board or emulator first (before installing CCES) to the PC, the Windows driver wizard may not find the board drivers.. Navigate to the CCES environment via the Start menu. Note that CCES is not connected to the target board.. Use the system configuration utility to connect to the EZ-KIT Lite board. If a debug configuration exists already, select the appropriate configuration and click Apply and Debug or Debug. Go to step 8. To create a debug configuration, do one of the following: Click the down arrow next to the little bug icon, select Debug Configurations Choose Run > Debug Configurations. The Debug Configuration dialog box appears.. Select CrossCore Embedded Studio Application and click (New launch configuration). The Select Processor page of the Session Wizard appears.. Ensure Blackfin is selected in Processor family. In Processor type, select ADSP-BF506F. Click Next. The Select Connection Type page of the Session Wizard appears. -6 ADSP-BF506F EZ-KIT Lite Evaluation System Manual

27 Using ADSP-BF506F EZ-KIT Lite 5. Select one of the following: For standalone debug agent connections, EZ-KIT Lite and click Next. For emulator connections, Emulator and click Next. The Select Platform page of the Session Wizard appears. 6. Do one of the following: For standalone debug agent connections, ensure that the selected platform is ADSP-BF506F EZ-KIT Lite via Debug Agent. For emulator connections, choose the type of emulator that is connected to the board. 7. Click Finish to close the wizard. The new debug configuration is created and added to the program(s) to load list. 8. In the Program(s) to load section, choose the program to load when connecting to the board. If not loading any program upon connection to the target, do not make any changes. Note that while connected to the target, there is no way to choose a program to download. To load a program once connected, terminate the session. To delete a configuration, go to the Debug Configurations dialog box and select the configuration to delete. Click and choose Yes when asked if you wish to delete the selected launch configuration. Then Close the dialog box. ADSP-BF506F EZ-KIT Lite Evaluation System Manual -7

28 VisualDSP++ Install and Session Startup To disconnect from the target board, click the terminate button (red box) or choose Run > Terminate. To delete a session, choose Target > Session > Session List. Select the session name from the list and click Delete. Click OK. VisualDSP++ Install and Session Startup For information about VisualDSP++ and to download the software, go to There are two options to connect the EZ-KIT Lite hardware to a personal computer (PC) running VisualDSP++: via an Analog Devices emulator or va a standalone debug module. The standalone debug agent allows a debug agent to interface to the ADSP-BF506F EZ-KIT Lite. The standalone debug agent is shipped with the kit. To connect the EZ-KIT Lite to a PC via an emulator:. Plug the 5V adaptor into connector P9 (labeled 5V) or plug the USB cable into ZP (labeled USB).. Attach the emulator to the header connector P (labeled JTAG) on the EZ-KIT Lite. To connect the EZ-KIT Lite to a PC via the debug agent:. Plug one side of the provided USB cable into the USB connector of the debug agent ZP (labeled USB). Plug the other side of the cable into a USB port of the PC running VisualDSP++.. Verify that the yellow USB monitor LED on the debug agent, ZLED, is lit. This signifies that the board is communicating properly with the host PC and ready to run VisualDSP ADSP-BF506F EZ-KIT Lite Evaluation System Manual

29 Using ADSP-BF506F EZ-KIT Lite Session Startup. If you are running VisualDSP++ for the first time, navigate to the VisualDSP++ environment via the Start > Programs menu. The main window appears. Note that VisualDSP++ does not connect to any session. Skip the rest of this step to step. If you have run VisualDSP++ previously, the last opened session appears on the screen. You can override the default behavior and force VisualDSP++ to start a new session by pressing and holding down the Ctrl key while starting VisualDSP++. Do not release the Ctrl key until the Session Wizard appears on the screen. Go to step.. To connect to a new EZ-KIT Lite session, start Session Wizard by selecting one of the following. From the Session menu, New Session. From the Session menu, Session List. Then click New Session from the Session List dialog box. From the Session menu, Connect to Target.. The Select Processor page of the wizard appears on the screen. Ensure Blackfin is selected in Processor family. In Choose a target processor, select ADSP-BF506F. Click Next.. The Select Connection Type page of the wizard appears on the screen. Select EZ-KIT Lite and click Next. 5. The Select Platform page of the wizard appears on the screen. For standalone debug agent connections, ensure that the selected platform is ADSP-BF506F EZ-KIT Lite via Debug Agent. For emulator connections, choose the type of emulator that is connected. Specify your own Session name for your session or accept the default name. ADSP-BF506F EZ-KIT Lite Evaluation System Manual -9

30 CCES Evaluation License To The session name can be a string of any length; although, the box displays approximately characters. The session name can include space characters. If you do not specify a session name, VisualDSP++ creates a session name by combining the name of the selected platform with the selected processor. The only way to change a session name later is to delete the session and open a new session. Click Next. 6. The Finish page of the wizard appears on the screen. The page displays your selections. Check the selections. If you are not satisfied, click Back to make changes; otherwise, click Finish. VisualDSP++ creates the new session and connects to the EZ-KIT Lite. Once connected, the main window s title is changed to include the session name set in step 5. disconnect from a session, click the disconnect button or select Session > Disconnect from Target. To delete a session, select Session > Session List. Select the session name from the list and click Delete. Click OK. CCES Evaluation License The ADSP-BF506F EZ-KIT Lite software is part of the Board Support Package (BSP) for the Blackfin ADSP-BF50x family. The EZ-KIT Lite is a licensed product that offers an unrestricted evaluation license for 90 days after activation. Once the evaluation period ends, the evaluation license becomes permanently disabled. If the evaluation license is installed but not activated, it allows 0 days of unrestricted use and then becomes disabled. The license can be re-enabled by activation. -0 ADSP-BF506F EZ-KIT Lite Evaluation System Manual

31 Using ADSP-BF506F EZ-KIT Lite An evaluation license can be upgraded to a full license. Licenses can be purchased from: The Analog Devices directly. Call (800) or or go to: Analog Devices, Inc. local sales office or authorized distributor. To locate one, go to: EZ-KIT Lite hardware must be connected and powered up to use CCES with a valid evaluation or full license. VisualDSP++ Evaluation License The ADSP-BF506F EZ-KIT Lite installation is part of the VisualDSP++ installation. The EZ-KIT Lite is a licensed product that offers an unrestricted evaluation license for the first 90 days. Once the initial unrestricted 90-day evaluation license expires: To VisualDSP++ restricts a connection to the ADSP-BF506F EZ-KIT Lite via the USB debug agent interface only. Connections to simulators and emulation products are no longer allowed. The linker restricts a user program to ¼ of memory (6K bytes), which is K bytes for code space with no restrictions for data space. avoid errors when opening VisualDSP++, the EZ-KIT Lite hardware must be connected and powered up. This is true for using VisualDSP++ with a valid evaluation or full license. ADSP-BF506F EZ-KIT Lite Evaluation System Manual -

32 Memory Map Memory Map The ADSP-BF506F processor has internal static random access memory (SRAM) used for instruction or data storage. See Table -. The internal memory details can be found in the ADSP-BF50x Blackfin Processor Hardware Reference. The ADSP-BF506F EZ-KIT Lite board includes external serial peripheral interconnect (SPI) flash and internal flash memories. See Table -; see also the following Internal Flash Memory Interface and SPI Flash Memory Interface. Table -. EZ-KIT Lite Internal Memory Map Start Address 0xFFE xFFC xFFB xFFB xFFA 000 0xFFA xFFA xFFA xFF xFF xFF xEF Content CORE MEMORY MAPPED REGISTERS SYSTEM MEMORY MAPPED REGISTERS Reserved INTERNAL SCRATCHPAD RAM (K BYTES) Reserved Reserved L INSTRUCTION SRAM/CACHE (6K BYTES) L INSTRUCTION BANK A SRAM (6K BYTES) Reserved L DATA BANK A SRAM/CACHE (6K BYTES) L DATA BANK A SRAM (6K BYTES) Reserved - ADSP-BF506F EZ-KIT Lite Evaluation System Manual

33 Using ADSP-BF506F EZ-KIT Lite Table -. EZ-KIT Lite External (Interface-Accessible) Memory Map Start Address 0xEF x x x Content BOOT ROM (K BYTES) Reserved SYNC FLASH (M BITS) Reserved Internal Flash Memory Interface Internal parallel flash memory of the ADSP-BF506F EZ-KIT Lite is a MB (M x 6 bits) Numonyx M58WT0 device, which is internal to the processor. The address range for flash memory is 0x to 0x0F FFFF. By default, the EZ-KIT Lite boots from SPI flash memory. The processor boots from internal parallel flash memory if the boot mode select switch (SW) is set to position or ; see Boot Mode Select Switch (SW) on page -8. Flash memory code can be modified. For instructions, refer to the online help and example program included in the EZ-KIT Lite installation directory. SPI Flash Memory Interface SPI flash memory of the ADSP-BF506F EZ-KIT Lite is a 6 Mb Numonyx M5P6 device. The device is selected via SPI0_SEL. SPI flash memory is pre-loaded with boot code for the power-on-self test (POST) program. For more information, refer to Power-On-Self Test on page -. ADSP-BF506F EZ-KIT Lite Evaluation System Manual -

34 Power-On-Self Test Power-On-Self Test The power-on-self-test program (POST) tests all EZ-KIT Lite peripherals and validates functionality as well as connectivity to the processor. Once assembled, each EZ-KIT Lite if fully tested for an extended period of time with a POST. All EZ-KIT Lite boards are shipped with a POST pre-loaded into one of their on-board flash memories. The POST is executed by resetting the board and pressing the proper push button(s). The POST also can be used for reference for a custom software design or hardware troubleshooting. Note that the source code for the POST program is included in the installation directory along with the readme file, which describes how the board is configured to run a POST. The POST program is only available when using VisualDSP++. LEDs and Push Buttons The EZ-KIT Lite provides two push buttons and three LEDs for general-purpose I/O. The three LEDs, labeled LED through LED, are accessed via the PF0 GPIO ports of the processor. For information on how to program the flag pins, refer to the ADSP-BF50x Blackfin Processor Hardware Reference Manual. The two general-purpose push buttons are labeled PB0 and PB. The status of each individual button can be read through programmable flag inputs PF and PF. The flag reads a when a corresponding switch is being pressed. When the switch is released, the flag reads a 0. A connection between the push buttons and processor inputs is established through a DIP switch, SW. The switch should be turned off when another source is driving the signals. An example program is included in the ADSP-BF506F installation directory to demonstrate functionality of the LEDs and push buttons. - ADSP-BF506F EZ-KIT Lite Evaluation System Manual

35 Using ADSP-BF506F EZ-KIT Lite The LED and push button signals also are connected to the expansion interface II; see Expansion Interface II Connectors (P and P) on page -8 and Expansion Interface II Connector (P) on page -8. JTAG Interface The board contains an on-board debug agent that operates via a USB port. The ADSP-BF506F EZ-KIT Lite receives all of its power via USB; therefore, no power supply is required. For debugging, the JTAG connector (P) allows an external emulator (USB-ICE or HPUSB-ICE) to connect to the board, instead of the on-board debug agent. For more information about emulators, contact Analog Devices or go to: Expansion Interface II The expansion interface II allows an Analog Devices EZ-Extender or a custom-design daughter board to be tested across various hardware platforms that have the same expansion interface. The expansion interface II implemented on the ADSP-BF506F EZ-KIT Lite consists of three connectors, which are 0. in. shrouded headers (P ). The connectors contain a majority of the ADSP-BF506F processor s signals. For pinout information, go to ADSP-BF506F EZ-KIT Lite Schematic on page B-. The mechanical dimensions of the expansion connectors can be obtained by contacting Technical Support. For more information about daughter boards, visit the Analog Devices Web site at: ADSP-BF506F EZ-KIT Lite Evaluation System Manual -5

36 VDDINT Programmable Regulator Limits to current and interface speed must be taken into consideration when using the expansion interface. Current for the expansion interface II is sourced from the EZ-KIT Lite; therefore, the current should be limited to A for 5V and 500 ma for the.v planes. If more current is required, then a separate power connector and a regulator must be designed on a daughter card. Additional circuitry can add extra loading to signals, decreasing their maximum effective speed. Analog Devices does not support and is not responsible for the effects of additional circuitry. VDDINT Programmable Regulator By default, the EZ-KIT Lite runs at.v. The board contains a programmable regulator that supplies the processor s core with a voltage between. and.. The voltage is adjusted by writing to the AD558 digital potentiometer via the -wire interface (TWI) signals.table - shows the appropriate step and corresponding voltage values. For an example of writing to the AD558 potentiometer, refer to the POST example. For more information on the acceptable voltage/frequency values, refer to the ADSP-BF50/BF50F/BF506F Blackfin Embedded Processor Data Sheet and ADSP-BF50x Blackfin Processor Hardware Reference manual. For more information about the digital potentiometer, refer to the AD558 data sheet. -6 ADSP-BF506F EZ-KIT Lite Evaluation System Manual

37 Using ADSP-BF506F EZ-KIT Lite Table -. Voltage Values Step Value Voltage (V) Power Measurements Several locations are provided for measuring the current draw from various power planes. Precision 0. ohm shunt resistors are available on the VDDINT, VDDEXT, and VDDFLASH voltage domains. For current draw, the jumper is removed, voltage across the resistor can be measured using an oscilloscope, and the value of the resistor can be measured using a precision multi-meter. Once the voltage and resistance are measured, the current can be calculated by dividing the voltage by the resistance. For the highest accuracy, a differential probe should be used for measuring the voltage across the resistor. ADSP-BF506F EZ-KIT Lite Evaluation System Manual -7

38 Example Programs Example Programs Example programs are provided with the ADSP-BF506F EZ-KIT Lite to demonstrate various capabilities of the product. The programs are included in the product installation kit and can be found in the Examples folder of the installation. Refer to a readme file provided with each example for more information. CCES users are encouraged to use the example browser to find examples included with the EZ-KIT Lite Board Support Package. Board Design Database A.zip file containing all of the electronic information required for the design, layout, fabrication and assembly of the product is available for download from the Analog Devices board design database at: -8 ADSP-BF506F EZ-KIT Lite Evaluation System Manual

39 ADSP-BF506F EZ-KIT LITE HARDWARE REFERENCE This chapter describes the hardware design of the ADSP-BF506F EZ-KIT Lite board. The following topics are covered. System Architecture on page - Describes the board s configuration and explains how the board components interface with the processor. Programmable Flags on page - Shows the locations and describes the programming flags (PFs). Push Buttons and Switches on page -7 Shows the locations and describes the push buttons and switches. Jumpers on page - Shows the locations and describes the configuration jumpers. LEDs on page - Shows the locations and describes the LEDs. Connectors on page -6 Shows the locations and provides part numbers for the on-board connectors. In addition, the manufacturer and part number information is provided for the mating parts. ADSP-BF506F EZ-KIT Lite Evaluation System Manual -

40 System Architecture System Architecture This section describes the processor s configuration on the EZ-KIT Lite board (Figure -). Figure -. System Architecture The EZ-KIT Lite is designed to demonstrate the ADSP-BF506F Blackfin processor capabilities. The processor has an I/O voltage of.v. The core voltage of the processor is controlled by an Analog Devices ADP75 low dropout regulator (LDO) and an Analog Devices AD558 digipot, which is configurable over the -wire interface (TWI) signals. Refer to the - ADSP-BF506F EZ-KIT Lite Evaluation System Manual

41 ADSP-BF506F EZ-KIT Lite Hardware Reference power-on-self test (POST) example in the ADSP-BF506F installation directory for information on how to set up the TWI interface. The core voltage and clock rate can be set up on the fly by the processor. The input clock is 5 MHz. The default boot mode for the processor is SPI flash boot. See Boot Mode Select Switch (SW) for information on how to change the default boot mode. Programmable Flags The processor has 5 general-purpose input/output (GPIO) signals spread across three ports (PF, PG, and PH). The pins are multi-functional and depend on the ADSP-BF506F processor setup. The following tables show how the programmable flag pins are used on the EZ-KIT Lite. PF programmable flag pins Table - PG programmable flag pins Table - PH programmable flag pins Table - Table -. Port F Programmable Flag Connections Processor Pin Other Processor Function EZ-KIT Lite Function PF0 PF PF PF PF TSCLK0/UA0_RX_ALT/TMR6/ CUD0 RSCLK0/UA0_TX_ALT/TMR5/ CDG0 DT0PRI/PWM0_BH/PPI_D8/ CZM0 TFS0/PWM0_BL/PPI_D9/ CDG0 RFS0/PWM0_CH/PPI_D0/ TACLK0 Default: LED0 Land grid array, expansion interface II Default: LED Land grid array, expansion interface II Default: LED Land grid array, expansion interface II Default: PB0 Land grid array, expansion interface II Default: PB Land grid array, expansion interface II ADSP-BF506F EZ-KIT Lite Evaluation System Manual -

42 Programmable Flags Table -. Port F Programmable Flag Connections (Cont d) Processor Pin Other Processor Function EZ-KIT Lite Function PF5 PF6 PF7 RFS0/PWM0_CH/PPI_D0/ TACLK0 UA_TX/PWM0_TRIP/ PPI_D UA_RX/PWM0_SYNC/ PPI_D/TACI Default: not used Land grid array, expansion interface II Default: not used Land grid array, expansion interface II Default: not used Land grid array, expansion interface II PF8 UA_RTS/DT0SEC/PPI_D7 Default: not used Land grid array, expansion interface II PF9 UA_CTS/DR0SEC/PPI_D6/ CZM0 Default: not used Land grid array, expansion interface II PF0 SPI0_SCK/TMR/PPI_D5 Default: SPI0_SCK Land grid array, expansion interface II PF PF PF PF PF5 SPI0_MISO/PWM0_TRIP/ PPI_D/TACLK SPI0_MOSI/PWM0_SYNC/ PPI_D SPI0_SEL/TMR/PPI_D/ SPI0_SS SPI0_SEL/PWM0_AH/ PPI_D SPI0_SEL/PWM0_AL/ PPI_D0 Default: SPI0_MISO Land grid array, expansion interface II Default: SPI0_MOSI Land grid array, expansion interface II Default: SPI0_SEL Land grid array, expansion interface II Default: not used Land grid array, expansion interface II Default: not used Land grid array, expansion interface II Table -. Port G Programmable Flag Connections Processor Pin Other Processor Function EZ-KIT Lite Function PG0 PG SPI_SEL/TMRCLK/ PPI_CLK/ UA_RX_ALT/ TACI SPI_SEL/PPI_FS/ CAN_RX/ TACI5 Default: CAN_ERR Land grid array, expansion interface II Default: CAN_RX Land grid array, expansion interface II - ADSP-BF506F EZ-KIT Lite Evaluation System Manual

43 ADSP-BF506F EZ-KIT Lite Hardware Reference Table -. Port G Programmable Flag Connections (Cont d) Processor Pin Other Processor Function EZ-KIT Lite Function PG PG PG PG5 PG6 SPI_SEL/TMR/CAN_TX/ SPI_SS HWAIT/SPI_SCK/DTSEC/ UA_TX_ALT SPI_MOSI/DRSEC_ALT/ PWM_SYNC/TACLK6 SPI_MISO/TMR7/ PWM_TRIP PG6 ACM_SGLDIFF/SD_D/ PWM_AH Default: CAN_TX Land grid array, expansion interface II Default: not used Land grid array, expansion interface II Default: SD_WP Land grid array, expansion interface II Default: SD_CD Land grid array, expansion interface II Default: ACM_SGLDIFF SD_D, land grid array, expansion interface II PG7 ACM_RANGE/SD_D/PWM_AL Default: ACM_RANGE SD_D, land grid array, expansion interface II PG8 DRSEC/SD_D/PWM_BH Default: ADC_DOUTB SD_D, land grid array, expansion interface II PG9 DRPRI/SD_D0/PWM_BL Default: ADC_DOUTA SD_D0, land grid array, expansion interface II PG0 PG PG PG PG PG5 RFS/SD_CMD/PWM_CH/ TACI6 RSCLK/SD_CLK/PWM_CL/ TACLK7 UA0_RX/SD_D/PPI_D5/ TACI UA0_TX/SD_D5/PPI_D/ CZM /UA0_RTS/SD_D6/TMR0/ PPI_FS/CUD /UA0_CTS/SD_D7/TMR/ PPI_FS/CDG Default: ADC_CS SD_CMD, land grid array, expansion interface II Default: ADC_SCLK SD_CLK, land grid array, expansion interface II Default: UART0_RX DS_D, land grid array, expansion interface II Default: UART0_TX DS_D5, land grid array, expansion interface II Default: UART0_RTS DS_D5, land grid array, expansion interface II Default: UART0_CTS DS_D7, land grid array, expansion interface II ADSP-BF506F EZ-KIT Lite Evaluation System Manual -5

44 Programmable Flags Table -. Port H Programmable Flag Connections Processor Pin Other Processor Function EZ-KIT Lite Function PH0 PH PH ACM_A/DTPRI/SPI0_SEL /WAKEUP ACM_A/TFS/ SPI_SEL_ALT/TACLK ACM_A0/TSCLK/ SPI_SEL_ALT/TACI7 Default: ACM_A Land grid array, expansion interface II Default: ACM_A Land grid array, expansion interface II Default: ACM_A0 Land grid array, expansion interface II -6 ADSP-BF506F EZ-KIT Lite Evaluation System Manual

45 ADSP-BF506F EZ-KIT Lite Hardware Reference Push Buttons and Switches This section describes operation of the push buttons and switches. The push button and switch locations are shown in Figure -. Figure -. Push Button and Switch Locations ADSP-BF506F EZ-KIT Lite Evaluation System Manual -7

46 Push Buttons and Switches UART Setup Switch (SW) The UART setup switch (SW) configures the UART0 signals between the DCE connector (J) and processor. Table - shows the switch settings. Table -. UART Setup Switch (SW) SW Position Function and Enable flow control Disconnects the UART_RX signal from the processor; the UART_RX signal can be used for another function Connects the RTS and CTS signals together 5 Allows the host to reset the EZ-KIT Lite via the CTS signal 6 and 7 Selects the source for the CTS signal 8 Loops the TX and RX signals together for testing Boot Mode Select Switch (SW) The boot mode select switch (SW) determines the boot mode of the processor. Table -5 shows the available boot mode settings. By default, the ADSP-BF506F processor boots from SPI flash memory. Table -5. Boot Mode Select Switch (SW) SW Position Processor Boot Mode 0 Idle no boot Boots from stacked parallel flash in asynchronous mode Boots from stacked parallel flash in synchronous mode Boots through SPI0 master from SPI memory Boots through SPI0 slave from host device 5 Boots through PPI from host -8 ADSP-BF506F EZ-KIT Lite Evaluation System Manual

47 ADSP-BF506F EZ-KIT Lite Hardware Reference Table -5. Boot Mode Select Switch (SW) (Cont d) SW Position Processor Boot Mode 6 Reserved 7 Boots through UART0 slave from host device Push Button Enable Switch (SW) The push button enable switch (SW) disconnects the associated push button circuit from the general-purpose I/O (GPIO) pins of the processor and allows the signals to be used on the expansion interface. ADC Enable Switch (SW) The ADC enable switch (SW) disconnects the ADC from the SPORT interface of the processor and allows the ADC signals to be used on the SD connector or the expansion interface. CAN Enable Switch (SW5) The CAN enable switch (SW5) disconnects the CAN transceiver from the processor and allows the CAN signals to be used on the expansion interface. Reset Push Button (SW6) The reset push button (SW6) resets the processor via a hardware reset. The reset push button does not reset the on-board debug agent. The only way to reset the debug agent is to cycle power. Programmable Flag Push Buttons (SW7 8) Two momentary push buttons (SW7 and SW8) are provided for general-purpose user input. The buttons are connected to the PF GPIO pins of the ADSP-BF506F EZ-KIT Lite Evaluation System Manual -9

48 Push Buttons and Switches processor. The push buttons are active high and, when pressed, send a high () to the processor. The GPIO enable switch (SW) disconnects the push buttons from the associated push button signals (refer to Push Button Enable Switch (SW) on page -9 for more information). ADC Loopback Switches (SW9 0) The ADC loopback switches (SW9 and SW0) are used for testing only. The switches connect a test signal to the ADC inputs. -0 ADSP-BF506F EZ-KIT Lite Evaluation System Manual

49 ADSP-BF506F EZ-KIT Lite Hardware Reference Jumpers This section describes functionality of the configuration jumpers. Figure - shows the jumper locations. Figure -. Configuration Jumper Locations SPI FLASH CS Enable Jumper (JP) The SPI flash CS enable jumper (JP) connects the SPI0_SEL signal to SPI flash memory. By default, JP is installed, and SPI flash is connected. ADSP-BF506F EZ-KIT Lite Evaluation System Manual -

50 Jumpers Voltage Reference Select Jumper (JP) The voltage reference select jumper (JP) selects between a.5v on-chip reference and an external voltage reference. When the jumper is installed on positions and, the on-chip.5v reference is used. When the jumper is installed on positions and, an external reference can be connected to the ADC through the DCAPA and DCAPB signals (see ADC Voltage Reference (JP6) on page -). By default, JP is installed on positions and. VDDEXT Power Jumper (JP) The VDDEXT power jumper (JP) is used to measure the processor s I/O voltage and current. By default, JP is ON, and the current flows through the two-pin IDC header. To measure power, remove the jumper on JP and measure the voltage across the precision resistor and resistance value. For more information, refer to Power Measurements on page -7. VDDINT Power Jumper (JP) The VDDINT power jumper (JP) is used to measure the processor s core voltage and current. By default, JP is ON, and the current flows through the two-pin IDC header. To measure power, remove the jumper on JP and measure the voltage across the precision resistor and resistance value. For more information, refer to Power Measurements on page -7. VDDFLASH Power Jumper (JP5) The VDDFLASH power jumper (JP5) is used to measure the internal parallel flash voltage and current. By default, JP5 is ON, and the current flows through the two-pin IDC header. To measure power, remove the jumper on JP5 and measure the voltage across the precision resistor and resistance value. For more information, refer to Power Measurements on page ADSP-BF506F EZ-KIT Lite Evaluation System Manual

51 ADSP-BF506F EZ-KIT Lite Hardware Reference ADC Voltage Reference (JP6) The ADC voltage reference jumper (JP6) is used to supply a reference voltage to the ADC. In order to use an external voltage reference, a jumper must be placed on positions and of JP. To use the on-board AD780 precision voltage reference, install a jumpers at position, and,. To supply your own voltage reference, remove all jumpers from JP6 and connect your voltage reference to pins and. By default, no jumpers are installed on JP6. ADSP-BF506F EZ-KIT Lite Evaluation System Manual -

52 LEDs LEDs This section describes the on-board LEDs. Figure - shows the LED locations. Figure -. LED Locations - ADSP-BF506F EZ-KIT Lite Evaluation System Manual

53 ADSP-BF506F EZ-KIT Lite Hardware Reference Reset LED (LED) When LED is lit, it indicates that the master reset of all the major ICs is active. The reset signal is controlled by the Analog Devices ADM708 supervisory reset circuit. GPIO LEDs (LED ) Three LEDs connect to the three general-purpose I/O pins of the processor (see Table -6). The LEDs are active high and lit by writing a to the correct programmable flag signal. Table -6. GPIO LEDs LED Reference Designator LED LED LED Processor Programmable Flag Pin PF0 PF PF Power LED (LED5) When LED5 is lit solid, it indicates that power is being properly supplied to the board. ADSP-BF506F EZ-KIT Lite Evaluation System Manual -5

54 Connectors Connectors This section describes connector functionality and provides information about mating connectors. The connector locations are shown in Figure -5. Figure -5. Connector Locations -6 ADSP-BF506F EZ-KIT Lite Evaluation System Manual