Number of Characters 20 characters x 4Lines - Module dimension 98.0 x 60.0 x 13.6(MAX) mm. View area 77.0 x 25.2 mm. Active area 70.4 x 20.

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1 2.Precautions in use of LCD Modules (1)Avoid applying excessive shocks to the module or making any alterations or modifications to it. (2)Don t make extra holes on the printed circuit board, modify its shape or change the components of LCD module. (3)Don t disassemble the LCM. (4)Don t operate it above the absolute maximum rating. (5)Don t drop, bend or twist LCM. (6)Soldering: only to the I/O terminals. (7)Storage: please storage in anti-static electricity container and clean environment. 3.General Specification Item Dimension Unit Number of Characters 2 characters x 4Lines - Module dimension 98. x 6. x 13.6(MAX) mm View area 77. x 25.2 mm Active area 7.4 x 2.8 mm Dot size.55 x.55 mm Dot pitch.6 x.6 mm Character size 2.95 x 4.75 mm Character pitch 3.55 x 5.35 mm LCD type STN, Negative, Transmissive, Blue Duty 1/16 View direction Backlight Type 6 o clock LED,White 第 5 頁, 共 28 頁

2 4.Absolute Maximum Ratings Item Symbol Min Typ Max Unit Operating Temperature T OP -2-7 Storage Temperature T ST -3-8 Input Voltage V I V SS - V DD V Supply Voltage For Logic VDD-V SS V Supply Voltage For LCD V DD -V V 5.Electrical Characteristics Item Symbol Condition Min Typ Max Unit Supply Voltage For Logic V DD -V SS V Supply Voltage For LCD V DD -V Ta=-2 Ta=25 Ta= V V V Input High Volt. V IH -.7 V DD - V DD V Input Low Volt. V IL - V SS -.6 V Output High Volt. V OH V Output Low Volt. V OL V Supply Current I DD V DD =5.V ma 第 6 頁, 共 28 頁

3 6.Optical Characteristics Item Symbol Condition Min Typ Max Unit View Angle (V)θ CR deg (H)φ CR deg Contrast Ratio CR Response Time T rise ms T fall ms Definition of Operation Voltage (Vop) Definition of Response Time ( Tr, Tf ) Intensity Selected Wave Non-selected Conition Selected Conition Non-selected Conition 1% Non-selected Wave Intensity 1% Cr Max Cr = Lon / Loff 1% 9% Vop Driving Voltage(V) Tr Tf [positive type] [positive type] Conditions : Operating Voltage : Vop Viewing Angle(θ,φ) :, Frame Frequency : 64 HZ Driving Waveform : 1/N duty, 1/a bias Definition of viewing angle(cr 2) θf θl θb θr φ= 18 φ= 27 φ= 9 φ= 第 7 頁, 共 28 頁

4 7.Interface Pin Function Pin No. Symbol Level Description 1 V SS V Ground 2 V DD 5.V Supply Voltage for logic 3 VO (Variable) Operating voltage for LCD 4 H/L H: DATA, L: Instruction code 5 R/W H/L H: Read(MPU Module) L: Write(MPU Module) 6 E H,H L Chip enable signal 7 DB H/L Data bus line 8 DB1 H/L Data bus line 9 DB2 H/L Data bus line 1 DB3 H/L Data bus line 11 DB4 H/L Data bus line 12 DB5 H/L Data bus line 13 DB6 H/L Data bus line 14 DB7 H/L Data bus line 15 A - Power supply for B/L(+)/Negative Voltage output 16 K - Power supply for B/L(-) 第 8 頁, 共 28 頁

5 8.Contour Drawing &Block Diagram (VA) (AA) (VA) 7.4(AA) P2.5415= PTH PTH 4-5. PAD 13.6 MAX MAX Vss 2 Vdd 3 Vo 4 5 R/W 6 E 7 DB 8 DB1 9 DB2 1 DB3 11 DB4 12 DB5 13 DB6 14 DB7 15 A 16 K LED B/L EL or NO B/L The non-specified tolerance of dimension is.3mm DOT SIZE MPU 8 series or 68 series R/W E DB~DB7 Controller/Com Driver HD4478 or Equivalent Com1~16 Com17~32 2X4 LCD VR 1K~2K Vdd Vo Vss Vee External contrast adjustment. N.V. Bias and Generator Power Circuit Optional Seg1~4 D M CL1 CL2 Vdd,Vss,V1~V5 Seg41~12 Seg Driver Seg12~2 Seg Driver Character located DD address DD address DD address DD address A B C D E F A 4B 4C 4D 4E 4F A 1B 1C 1D 1E 1F A 5B 5C 5D 5E 5F 第 9 頁, 共 28 頁

6 9.Function Description The LCD display Module is built in a LSI controller, the controller has two 8-bit registers, an instruction register (IR) and a data register (DR). The IR stores instruction codes, such as display clear and cursor shift, and address information for display data (DD) and character generator (). The IR can only be written from the MPU. The DR temporarily stores data to be written or read from DD or. When address information is written into the IR, then data is stored into the DR from DD or. By the register selector () signal, these two registers can be selected. R/W Operation IR write as an internal operation (display clear, etc.) 1 Read busy flag (DB7) and address counter (DB to DB7) 1 Write data to DD or (DR to DD or ) 1 1 Read data from DD or (DD or to DR) Busy Flag (BF) When the busy flag is 1, the controller LSI is in the internal operation mode, and the next instruction will not be accepted. When = and R/W=1, the busy flag is output to DB7. The next instruction must be written after ensuring that the busy flag is. Address Counter (AC) The address counter (AC) assigns addresses to both DD and Display Data (DD) This DD is used to store the display data represented in 8-bit character codes. Its extended capacity is 8 8 bits or 8 characters. Below figure is the relationships between DD addresses and positions on the liquid crystal display. High bits Low bits Example: DD addresses 4E AC (hexadecimal) AC6 AC5 AC4 AC3 AC2 AC1 AC 第 1 頁, 共 28 頁

7 Display position DD address A B C D E F A 4B 4C 4D 4E 4F A 1B 1C 1D 1E 1F A 5B 5C 5D 5E 5F Line by 2-Character Display Character Generator ROM (ROM) The ROM generate 5 8 dot or 5 1 dot character patterns from 8-bit character codes. See Table 2. Character Generator () In, the user can rewrite character by program. For 5 8 dots, eight character patterns can be written, and for 5 1 dots, four character patterns can be written. Write into DD the character code at the addresses shown as the left column of table 1. To show the character patterns stored in. 第 11 頁, 共 28 頁

8 Relationship between Addresses, Character Codes (DD) and Character patterns Table 1. For 5 8 dot character patterns Character Codes ( DD data ) Address Character Patterns ( data ) H igh L ow H igh L ow H igh L ow Character pattern( 1 ) Cursor pattern Character pattern( 2 ) Cursor pattern For 5 1 dot character patterns Character Codes ( DD data ) Address Character Patterns ( data ) H igh L ow H igh L ow H igh L ow Character pattern Cursor pattern : " H igh " 第 12 頁, 共 28 頁

9 1.Character Generator ROM Pattern Table.2 Upper 4 bit Lower 4 bit LLLL LLLH LLHL LLHH LHLL LHLH LHHL LHHH HLLL HLLH HLHL HLHH HHLL HHLH HHHL HHHH LLLL LLLH LLHL LLHH LHLL LHLH LHHL LHHH HLLL HLLH HLHL HLHH HHLL HHLH HHHL HHHH ( 1 ) ( 2 ) ( 3 ) ( 4 ) ( 5 ) ( 6 ) ( 7 ) ( 8 ) ( 1 ) ( 2 ) ( 3 ) ( 4 ) ( 5 ) ( 6 ) ( 7 ) ( 8 ) 第 13 頁, 共 28 頁

10 11.Instruction Table Instruction Instruction Code R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB Description Execution time (fosc=27khz) Clear Display 1 Return Home 1 - Write H to DD and set DD address to H from AC Set DD address to H from AC and return cursor to its original position if shifted. The contents of DD are not changed. 1.53ms 1.53ms Entry Mode Set 1 I/D SH Assign cursor moving direction and enable the shift of entire display. 39μs Display ON/OFF Control 1 D C B Set display (D), cursor (C), and blinking of cursor (B) on/off control bit. 39μs Cursor or Display Shift 1 S/C R/L - - Set cursor moving and display shift control bit, and the direction, without changing of DD data. 39μs Set interface data length Function Set 1 DL N F - - (DL:8-bit/4-bit), numbers of display line (N:2-line/1-line)and, display font type (F:5 11 dots/5 8 dots) 39μs Set Address Set DD Address 1 AC5 AC4 AC3 AC2 AC1 AC Set address in address counter. 39μs 1 AC6 AC5 AC4 AC3 AC2 AC1 AC Set DD address in address counter. 39μs Read Busy Flag and Address 1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC Whether during internal operation or not can be known by reading BF. The contents of address counter can also be read. μs Write Data to 1 D7 D6 D5 D4 D3 D2 D1 D Write data into internal (DD/). 43μs Read Data from 1 1 D7 D6 D5 D4 D3 D2 D1 D Read data from internal (DD/). 43μs - :don t care 第 14 頁, 共 28 頁

11 12.Timing Characteristics 12.1 Write Operation Ta=25, VDD=5.V Item Symbol Min Typ Max Unit Enable cycle time T C ns Enable pulse width T PW ns Enable rise/fall time T R,T F ns Address set-up time (, R/W to E) t AS - - ns Address hold time t AH ns Data set-up time t DSW ns Data hold time t H ns 第 15 頁, 共 28 頁

12 12.2 Read Operation Ta=25, VDD=5V Item Symbol Min Typ Max Unit Enable cycle time T C ns Enable pulse width (high level) T PW ns Enable rise/fall time T R,T F ns Address set-up time (, R/W to E) t AS - - ns Address hold time t AH ns Data delay time t DDR ns Data hold time t H ns 第 16 頁, 共 28 頁

13 13.Initializing of LCM Power on Wait for more than 4 ms after VDD rises to 4.5 V R/W DB7 DB6 DB5 DB4 DB3 1 1 DB2 DB1 DB BF can not be checked before this instruction. Function set R/W Wait for more than 39us DB7 DB6 N F DB5 DB4 DB3 DB2 DB1 DB 1 BF can not be checked before this instruction. Function set Wait for more than 39 µs R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB BF can not be checked before this instruction. 1 N F Function set Wait for more than 37us R/W DB7 1 DB6 D DB5 C DB4 B DB3 DB2 DB1 DB Display ON/OFF control Wait for more than 37 µs R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB 1 Display Clear Wait for more than 1.53ms R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB 1 I/D SH Entry Mode Set Initialization ends 4-Bit Ineterface 第 17 頁, 共 28 頁

14 Power on Wait for more than 4 ms after VDD rises to 4.5 V R/WDB7 DB6 DB5 DB4 DB3 DB2 DB1 DB 1 1 N F BF can not be checked before this instruction. Function set Wait for more than 39us R/WDB7 DB6 DB5 1 DB4 DB3 DB2 DB1 DB 1 N F BF can not be checked before this instruction. Function set Wait for more than 37us R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB 1 B C D Display ON/OFF control Wait for more than 37 µs R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB 1 Display Clear Wait for more than 1.53ms R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB 1 I/D S Entry Mode Set Initialization ends 8-Bit Ineterface 第 18 頁, 共 28 頁

15 14.Reliability Content of Reliability Test (wide temperature, -2 ~7 ) Environmental Test Test Item Content of Test Test Condition Note High Temperature Endurance test applying the high storage 8 storage temperature for a long time. 2hrs 2 Low Temperature Endurance test applying the high storage -3 storage temperature for a long time. 2hrs 1,2 Endurance test applying the electric stress High Temperature 7 (Voltage & Current) and the thermal stress to the Operation 2hrs element for a long time. Low Temperature Operation High Temperature/ Humidity Operation Thermal shock resistance Vibration test Static electricity test Endurance test applying the electric stress under low temperature for a long time. The module should be allowed to stand at 6,9%RH max For 96hrs under no-load condition excluding the polarizer, Then taking it out and drying it at normal temperature. The sample should be allowed stand the following 1 cycles of operation min 5min 3min 1 cycle Endurance test applying the vibration during transportation and using. Endurance test applying the electric stress to the terminal. -2 2hrs 6,9%RH 96hrs -2 /7 1 cycles Total fixed amplitude : 1.5mm Vibration Frequency : 1~55Hz One cycle 6 seconds to 3 directions of X,Y,Z for Each 15 minutes VS=8V,=1.5k Ω CS=1pF 1 time Note1: No dew condensation to be observed. Note2: The function test shall be conducted after 4 hours storage at the normal Temperature and humidity after remove from the test chamber. Note3: Vibration test will be conducted to the product itself without putting it in a container. 1 1,2 3 第 19 頁, 共 28 頁

16 15.Backlight Information Specification PAETER SYMBOL MIN TYP MAX UNIT TEST CONDITION Supply Current ILED ma V=3.5V Supply Voltage V V - Reverse Voltage VR V - Luminous Intensity IV CD/M 2 ILED=48mA Life Time - - nm ILED=48mA Color White Note: The LED of B/L is drive by current only, drive voltage is for reference only. drive voltage can make driving current under safety area (current between minimum and maximum). 2.Drive from pin15,pin16 R R A K B/L LCM ill never get Vee output from pin15) 第 2 頁, 共 28 頁

Item Dimension Unit Number of Characters 16 characters x 2 Lines -

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