8M-BIT AND 16M-BIT SERIAL FLASH MEMORY WITH 2-PIN NXS INTERFACE

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1 NXF00A M-BIT AND M-BIT SERIAL FLASH MEMORY WITH -PIN NXS INTERFACE FEATURES PRELIMINARY MAY Tailored for Portable and Mobile Media-Storage Ideal for portable/mobile applications that transfer and store data, audio, or images Removable Serial Flash Module package option NexFlash Non-volatile Memory Technology Patented Single-Transistor EEPROM Cell High-density, cost-effective, low-voltage/power K/0K endurance, ten years data retention Flash Memory for Battery-Operation Single V or V supply for Read, Erase/Write Icc ma active with µa standby power ms Erase/Write times for efficient battery use Description The NexFlash NXF00A and Serial Flash Memories are tailored for portable/mobile media-storage applications that transfer and store data, audio and images. Manufactured using NexFlash s patented single transistor EEPROM memory cell, the NXF00A and provide a high-density, low-voltage, low-power, and cost effective solution for battery-operated nonvolatile data storage requirements. The NXF00A and can operate with a single V or V supply for Read, Write, and Erase. Power consumption is very low due to µa standby current and fast Erase/Write performance (as fast as ms per sector) that minimizes power-on time, resulting in a highly efficient energy-per-transfer ratio. The NXF00A M-bits or M-bits of NexFlash Serial Memory,0 or,0 sectors of bytes each Simple commands: Reset, Read, Write, Ready/Busy No pre-erase required, auto-erases before write Two-pin NXS Serial Interface Saves Microcontroller-pins, simplifies PCB layout, low switching noise compared to parallel Flash Supports clock operation as fast as MHz Multi-device cascading, up to devices Development Tools and Accessories NX-SFK-NXS Serial Flash Development Kit and offer M-bits and M-bits of Flash memory organized in sectors of bytes each. Each sector is individually addressable through basic commands or control functions such as Reset, Read, Erase/Write, and Ready/Busy. The NXS (NexFlash Serial) -wire serial interface is ideal for use with microcontrollers since it only requires two pins. This leaves pins normally used for parallel Flash free for other uses. The NXS interface supports clock rates as fast as MHz and allows for multi-device cascading of up to devices. It also simplifies PC-board layout and generates less transient noise than parallel devices. Development is supported with the NexFlash Serial Flash Development Kit. This document contains PRELIMINARY INFORMATION. NexFlash reserves the right to make changes to its product at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. Copyright, NexFlash Technologies, Inc. NexFlash Technologies, Inc.

2 Pin Descriptions Package Types The NXF00A and is available in a /-pin TSOP (Type II) package (Figure and Table ) or a removable Serial Flash Module (see NXMxxx/NXMxxx Serial Flash Module data sheet for further information). Power Supply Pins (Vcc and GND) The NXF00A and support single power supply Read, Erase, and Write operations available in V and V Vcc versions. Active power requirements are as low as ma for V versions with standby current in the µa range. A0 Vcc N/C NXS Serial Interface Pins ( and ) The -wire NXS (NexFlash Serial) interface includes a Clock Input pin () and a single bidirectional I/O pin for data (). All data to or from the pin is clocked relative to the rising edge of. The -wire NXS serial interface makes the NXF00A and an ideal solution for removable non-volatile storage. A simple edge connector or cable/connector with four contacts (,, Vcc, and GND) can support communications with space efficiency and reliability. The NXS interface can operate at clock rates up to MHz for V versions. A A A GND 0 Device Address Pins (A0, A, A, A) There is no active chip select on the NXF00A and. Instead, four static device address pins (A0, A, A, and A) are provided for decoding from one to possible devices (Figure ). This allows up to MB (using an NXF00A device) or MB (using an device) to be addressed via a single -wire NXS interface. The static address pins (A0-A) must be tied high or low to match the device address field (DA-DA0) in the sector Read and Erase/Write instruction sequences. No Connect Pins (N/C) The NXF00A and uses only a few signal pins. As a result, the TSOP package has numerous no connects () that have no electrical contact to the die. Figure. NXF00A and Pin Assignments Table. Pin Descriptions A0, A, A, A Device Address Serial Clock Serial Data I/O Vcc Power Supply GND Ground No Connect NexFlash Technologies, Inc.

3 U0 U U U MICROCONTROLLER / MICROPROCESSOR DSP or ASIC 0 A0 0 A 0 A 0 A0 0 A A A0 0 A 0 A A0 0 A A 0 A0 A 0 A 0 A0 A A A0 A 0 A A0 A A U U U U Figure. Used in a Multi-device Configuration with up to -Devices on the -wire NSX FUTIONAL OVERVIEW The NexFlash NXF00A and provide up to M-bits or M-bits of non-volatile memory organized as,0 or,0 small sectors of bytes (, bits) each (Figure ). Each sector is individually addressable using basic instruction sequences and control functions communicated through the devices -wire NXS interface. Read and Erase/Write Instruction Sequences The NXF00A and have two basic instruction sequences: Read and Erase/Write. Unlike some other Flash technologies, the erase and write operations of the NXF00A and are performed together in one single operation (as fast as ms per sector). Thus, pre-erase of the memory is not necessary. Both Read and Erase/Write instructions are made up of a series of serial bit fields that include command, sector address, device address, and sector data. The Read instruction sequence also allows the device to be polled for Ready/Busy status. Sector 0 (0000H) Bits ( Bytes) Per Sector Sector (000H) Sector (000H) Sectors -0/0 (000-0FD/0FFDH) Sector 0/0 (0FE/0FFEH) Sector 0/0 (0FF/0FFFH) Figure. NexFlash s NXF00A and Array NexFlash Technologies, Inc.

4 The instruction sequence format, flow charts, and clocking diagrams for Read and Erase/Write operations are shown in Figures and, Figures and, and Figures and, respectively. All data within an instruction sequence is clocked on the rising edge. All instruction sequence fields are ordered by most significant bit first (MSB). Data is erased and written to the and NXF00A memory array a full sector ( bytes) at a time. If all bytes of a given sector are not fully clocked into the device, the remaining byte locations will be overwritten with indeterminate values. To ensure the highest level of data integrity write operations should be verified and rewritten, if needed, (see High Data Integrity Applications). Reset and Idle Upon power-up and between Read and Erase/Write instruction sequences, the device s internal control logic will be reset. This is accomplished by asserting the pin low (to VIL) for greater than treset.- µs. Once reset, the device enters standby operation and will not wake-up until the next rising edge of. After an initial rising occurs, the device becomes ready for a new instruction sequence. Full active power consumption starts after the correct device address is decoded during a Read or Write instruction sequence. To idle an instruction sequence between clocks, must be kept high (at VIH) for as long as needed. Note that power will be in the active state when is held high. Device Initialization After power-up it is recommended that the device information sector be read to electronically identify the device. The device information format contains a device ID that identifies the manufacturer, part number (memory size), and operating range. It also contains a list of any restricted sectors (see Sector Tag/Sync bytes). For a further description of the NXF00A and device information format, see the Serial Flash Device Information Sector Application Note SFAN-0. As shown in Figure, the address for the device information sector address is at 000H for both the NXF00A and. The device information sector is a read-only sector. This assures that all device specific information, such as the restricted sector list, is maintained and never written over inadvertently. For compatibility with applications that used the original NXF00 (non A), which does not have a separate device information sector, a copy of the device information sector is also provided in the last two sectors of the NXF00A (0FFH and 0FEH) and (0FFFH and 0FFEH). Contact NexFlash s Serial Flash applications department if you require compatibility with the NXF00 (non A). Ready/Busy Status After an Erase/Write instruction sequence has been executed, the device will become Busy while it erases and writes the addressed sector s memory. This period of time will not exceed twp (~ to 0 ms based on the specified power supply operating voltage). During this time the device can be tested for a Ready/Busy condition via a -bit status value obtained in the Read instruction sequence. The Busy status condition (H) indicates that the device has not yet completed its write operation and will not accept read or write instructions. The Ready status condition (H) indicates that the device is available for further read or write operations. Note that a delay time of trp (~0 µs to 0 µs depending on the voltage version being used) is required after the first low to high clock transition of the Ready/Busy status read. Sector Tag/Sync Bytes The first byte of each sector is pre-programmed during manufacturing with a Tag/Sync value of CH. Although the first byte of each sector can be changed, it is recommended that Tag/Sync value be maintained and incorporated as part of the application s sector formatting. The Tag/Sync values serve two purposes. First, they provide a sync-detect that can help verify if the instruction sequence was clocked into the device properly. Secondly, they serve as a tag to identify a fully functional (valid) sector. This is especially important if restricted sector devices are used. Restricted sector devices provide a more cost effective alternative to devices with 0% valid sectors. Restricted sector devices have a limited number of sectors ( maximum. for the NXF00A and ) that do not meet manufacturing programming criteria over the specified operating range. When such a sector is detected, the first byte is tagged with a pattern other than CH. In addition to individual sector tagging, all restricted sectors for a given device are listed in the device information format (see Device Initialization). High Data Integrity Applications Data storage applications that use Flash memory or other non-volatile media must take into consideration the possibility of noise or other adverse system conditions that may affect data integrity. For those applications that require higher levels of data integrity it is a recommended practice to use Error Correcting Code (ECC) techniques. The NexFlash Serial Flash Development Kit provides a software routine for a -bit ECC that can detect up to two bit errors and correct one. The ECC not only minimizes problems caused by system noise but can also extend Flash memory endurance. For those systems without the processing power to handle ECC algorithms, a simple verification after write is recommended. The NexFlash Serial Flash Development Kit software includes a simple Write/Verify routine that will compare data written to a given sector and rewrite the sector if the compare is not correct. NexFlash Technologies, Inc.

5 INITIAL CLOCK To wake device from standby (Data is "Don't Care") COMMAND TYPE H = Read MAIN SECTOR ADDRESS 000H-FFH for NXF00A 000H-FFFH for DEVICE ADDRESS A0-A pins = 0H-FH AUXILARY SECTOR ADDRESS 0H = To address main sector address 0-FFF H = Device information sector RESERVED Use H for NXF00A and INPUT STATUS BYTES H = Ready, H = Busy Note: Delay is required during status byte read, see trp in AC Characteristics INPUT SECTOR DATA BITS ( Bytes) Command Address Reserved Status Data C-C0 SA-0 DA-0 SA- R-R0 S-S0 D D Figure. Sector Read Instruction - Sequence and Bit Instruction NexFlash Technologies, Inc.

6 Command Address Reserved Data Control INITIAL CLOCK To wake device from standby (Data is "Don't Care") C-C0 A-SA0 DA-0 A- R-R0 D D X-X0 COMMAND TYPE H = Write MAIN SECTOR ADDRESS 000H-FFH for NXF00A 000H-FFFH for DEVICE ADDRESS A0-A pins = 0H-FH AUXILARY SECTOR ADDRESS 0H = main sector address 0-FFF RESERVED Use H for NXF00A and SECTOR DATA BITS 0- ( Bytes) EXTRA CLOCKS (Data is "Don't Care") Figure. Sector Erase/Write Instruction - Sequence and Bit Format NexFlash Technologies, Inc.

7 Start Sector Read Routine Output clock (low to high) to wake device from standby Output Command Sequence: -Read command C-C0 (000B) -Main Sector Address A-A0 (000-FFFH) -Device Address DA-DA0 (per state of A, A, A, A0 pins) -Auxilary Address A-A 0H for main array H device information sector -Four reserved bytes R-R0 ( H) Input Ready/Busy Status S-S0. Note trp delay time is required during status read (See AC Timing and Figure ) Ready? ( H) Yes Input first byte of data (Tag/Sync) from sector Valid Sector? (CH) Yes Return to write routine? No Input remaining bytes of sector data (0 bits) Return *Set Flag and process accordingly upon return Assert CLK low for treset to reset device and invoke standby No* No* Yes* Figure. Sector Read Operation Flow Chart Start Sector Erase/Write Routine Call Read Sector Routine to check Ready/Busy and Tag Device Ready and Sector Tag valid Yes Output one clock to wake device from stand-by Output Command Sequence: -Read command C-C0 (000B) -Main Sector Address A-A0 (000-FFFH) -Device Address DA-DA0 (per state of A, A, A, A0 pins) -Auxilary Address A-A 0H for main array -Four reserved bytes R-R0 ( H) Output (Rewrite )st byte of sector with CH Tag/Sync bite Output remaining bytes (0 bits) of sector data Output two bytes of zeros (00 00H) for the ISF0 Assert CLK low for treset to invoke Erase/Write Operation and then standby operation Return () No* *Set Flag and process accordingly upon return Figure. Sector Erase/Write Operation Flow Chart Note:. To ensure higher data integrity verify each sector write with a sector read. See High Data Integrity Applications on Page. NexFlash Technologies, Inc.

8 Device leaves standby mode at this edge A A A A A A A A A A A A0 DA DA DA DA0 A A A A Read Command -Bit Sector Address Device Address Aux. Address MSB LSB Four Reserved Bytes (Use H) trp Status Word (S-S0): Ready: H or Busy:H Device Drives Line Float so data direction can change from device input to output 0 Clocks Clocks treset Bytes 0 to Bytes 0 to Device Releases Line Figure. Read Instruction Sequence Clocking NexFlash Technologies, Inc.

9 Device leaves standby mode at this edge A A A A A A A A A A A A0 DA DA DA DA Write Command -Bit Sector Address Device Address 0H MSB LSB Clocks Four reserved bytes (use H) Clocks Clocks Byte Byte 0 Bytes to Device enters standby mode after twp Clocks Clocks Extra Clocks treset twp Byte Byte Don't Care Figure. Erase/Write Instruction Sequence Clocking NexFlash Technologies, Inc.

10 ABSOLUTE MAXIMUM RATINGS () Symbol Parameter Conditions Range Unit Vcc Supply Voltage 0 to.0 V VIN, VOUT Voltage Applied to Any Pin Relative to Ground 0. to Vcc + 0. V TSTG Storage Temperature to +0 C TLEAD Lead Temperature Soldering, Ten Seconds +00 C Note:. This device has been designed and tested for the specified operation ranges. Proper operation outside of these levels is not guaranteed. Exposure beyond absolute maximum ratings (listed above) may cause permanent damage OPERATING RANGES Symbol Parameter Conditions Min Max Unit Vcc Supply Voltage F00A-T-R M00A-T-R.. V F00A-T-R M00A-T-R.. V F0-T-R M0-T-R.. V F0-T-RS M0-T-R.0. V F0-T-R.. V TA Ambient Temperature, Commercial 0 +0 C Operating Extended () +0 C Industrial () 0 + C Note:. Contact NexFlash for availability of extended or industrial grade devices. DC ELECTRICAL CHARACTERISTICS Symbol Parameter Conditions Min Typ Max Unit VIL Input Low Voltage 0. Vcc x 0. V VIH Input High Voltage Vcc x 0. Vcc + 0. V VOL Output Low Voltage IOL = ma, VCC =.V 0. V VOH Output High Voltage IOH = 00 µa, VCC =.V. V VOLC Output Low Voltage CMOS () V CC = Min, IOL = µa 0. V VOHC Output High Voltage CMOS () V CC = Min, IOH = µa VCC 0. V I LI Input Leakage 0 < VIN < Vcc + µa IOL I/O Leakage 0 < VIN < Vcc, Output Disabled + µa I CC (active) Active Power Supply Current () f CLK MHz (/tcp) V CC =.V to.v 0 ma VCC =.V to.v (NXF00A) VCC =.V to.v () 0 I CCSB (standby) Standby Power Supply Current = 0V or VCC, < µa = 0V C IN Input Capacitance () T A = C, VCC = V or V pf Frequency = MHz COUT Output Capacitance () T A = C, VCC = V or V pf Frequency = MHz Notes:. Tested on a sample basis or specified via design or characterization data.. The device leaves standby power consumption after the clock transitions from low-to-high. Full active power consumption starts after the correct device address has been decoded during a sector read or write sequence. NexFlash Technologies, Inc.

11 AC ELECTRICAL CHARACTERISTICS V ( MHz) V ( MHz) Symbol Description Min Typ Max Min Typ Max Unit tcp Serial Clock Period ns tcl, tch Serial Clock High or Low Time ns tcr Serial Clock Rise Time () ns tcf Serial Clock Fall Time () ns tds Setup Time to Rising Edge 0 0 ns tdh Hold Time From Rising Edge 0 0 ns tdv Valid after () 0 ns treset Low Duration for. µs Valid Reset or Standby (See Figures & ) trp Read Pre-data Delay (See Figure ) 0 0 µs twp Erase/Write Program Time () NXF00A ms (See Figure ). Notes:. Test points are % and 0% points for rise/fall times. All other timings are measured at the 0% point.. With 0 pf ( MHz) or 0 pf ( MHz) load to GND.. The NXF00A and are designed for Erase/Write endurances of K cycles. Endurance in the range of 0K cycles can be obtained using ECC software methods like those provided in the SFK Serial Flash Development Kit. CLOCK AND DATA TIMING tcp tch tcl tcf tcr tdv tdv tds tdh Read Write NexFlash Technologies, Inc.

12 PACKAGE INFORMATION Plastic TSOP - /-pins Package Code: T (Type II) N N/+ E N/ D SEATING PLANE A H e B A L α C Plastic TSOP (T Type II) Millimeters Inches Symbol Min Max Min Max Ref. Std. No. Leads / A A B C D E H e. BSC 0.00 BSC L α 0 0 Notes:. Controlling dimension: millimeters, unless otherwise specified.. BSC = Basic lead spacing between centers.. Dimensions D and E do not include mold flash protrusions and should be measured from the bottom of the package.. Formed leads shall be planar with respect to one another within 0.00 inches at the seating plane. NexFlash Technologies, Inc.

13 ORDERING INFORMATION Size Order Part No. Package/Description () M-bit NXF00A-T-R () NXS, -pin, TSOP (Type II) RS, V Low Voltage M-bit NXF00A-T-R () NXS, -pin, TSOP (Type II) RS, V Standard Voltage M-bit -T-R NXS, -pin, TSOP (Type II) RS,.V-.V Low Voltage M-bit -T-RS NXS -pin, TSOP (Type II) RS.0V-.V Low Voltage M-bit -T-R () NXS, -pin, TSOP (Type II) RS, V Standard Voltage Notes:. Add E (Extended) or I (Industrial) after package designator (T) for alternative temperature grades.. See Mxxx data sheet for Serial Flash Module package. PRELIMINARY DESIGNATION The Preliminary designation on an NexFlash data sheet indicates that the product is not fully characterized. The specifications are subject to change and are not guaranteed. NexFlash or an authorized sales representative should be consulted for current information before using this product. IMPORTANT NOTICE NexFlash reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. NexFlash assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained herein reflect representative operating parameters, and may vary depending upon a user s specific application. While the information in this publication has been carefully checked, NexFlash shall not be liable for any damages arising as a result of any error or omission. LIFE SUPPORT POLICY NexFlash does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure in the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless NexFlash receives written assurances, to its satisfaction, that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; and (c) potential liability of NexFlash is adequately protected under the circumstances. Trademarks: NexFlash TM is a trademark of NexFlash Technologies, Inc. All other marks are the property of their respective owners. NexFlash Technologies, Inc.

ISSI Preliminary Information January 2006

ISSI Preliminary Information January 2006 2K-BIT/4K-BIT SPI SERIAL ELECTRICALLY ERASABLE PROM January 2006 FEATURES Serial Peripheral Interface (SPI) Compatible Supports SPI Modes 0 (0,0) and 3 (1,1) Low-voltage Operation Vcc = 1.8V to 5.5V Low