ETK Bit Emulator Probe Data Sheet

Transcription

1 ETK Bit Emulator Probe Data Sheet

2 Copyright The data in this document may not be altered or amended without special notification from ETAS GmbH. ETAS GmbH undertakes no further obligation in relation to this document. The software described in it can only be used if the customer is in possession of a general license agreement or single license. Using and copying is only allowed in concurrence with the specifications stipulated in the contract. Under no circumstances may any part of this document be copied, reproduced, transmitted, stored in a retrieval system or translated into another language without the express written permission of ETAS GmbH. Copyright 2011 ETAS GmbH, Stuttgart The names and designations used in this document are trademarks or brands belonging to the respective owners. R1.0.3 EN 2

3 Contents 1 General Information Basic Safety Instructions Correct Use Labeling of Safety Instructions Demands made re the Technical State of the Product Taking the Product Back and Recycling About This Manual Structure Using this Manual Introduction Applications Features Hardware Description Architecture ECU Interface Emulation Memory Data Preservation in Emulation Memory Flash Memory Measured Data Memory Contents 3

4 3.5.1 Triggering of Measured Data Capture Power Supply The Serial ETK Interface Static Program RAM Status LEDs ETK Configuration Overview ETK Configuration Tool ETK Configuration Technical Data Environmental Conditions System Requirements Software Support Supported ETAS Hardware Not supported ETAS Hardware Microcontroller Interface Power Supply Testcharacteristics Electrical Characteristics - Input / Output Pins AC Operating Conditions - Microcontroller Modes ECU Interface Connector pinout Signal Description Mechanical Dimensions and Mounting ETK7.1 Dimensions ETK7.1 Case ETK7.1 Mounting Possibilities Cables and Accessories Mounting Interface Cables Mounting Power Supply Cables Ordering Information ETK Cables Interface Cables Power Supply Cables Contents

5 8 Revision History ETAS Contact Addresses Index Contents 5

6 6 Contents

7 1 General Information This introductory chapter provides you with information on basic safety instructions, returning the product and recycling, how to use this manual, and provides you with an overview of the system requirements for operating the ETK7.1, the delivery scope and other details. 1.1 Basic Safety Instructions Please adhere to the Product Liability Disclaimer (ETAS Disclaimer) and the following safety instructions to avoid injury to yourself and others as well as damage to the device. General Information 7

8 1.1.1 Correct Use ETAS GmbH cannot be made liable for damage which is caused by incorrect use and not adhering to the safety instructions Labeling of Safety Instructions The safety instructions contained in this manual are shown with the standard danger symbol shown below: The following safety instructions are used. They provide extremely important information. Please read this information carefully. WARNING! indicates a possible medium-risk danger which could lead to serious or even fatal injuries if not avoided. CAUTION! indicates a low-risk danger which could result in minor or less serious injury or damage if not avoided Demands made re the Technical State of the Product The following requirements are made to ensure safe operation of the module: Ensure you observe the notes on environmental conditions (see section 5.1 on page 29). Ensure you adhere to the port and setting values (see section on page 93 and section on page 92). CAUTION! The ETK can be damaged or destroyed! Some components of the ETK board may be damaged or destroyed by electrostatic discharges. Please keep the ETK in its storage package until it is installed. The board should only be taken from its package, configured, and installed at a work place that is protected against static discharge. 8 General Information

9 CAUTION! Risk of short circuiting the internal signals of the ETK! When you mount the ETK to the ECU, you must ensure that the screws and washers used will not penetrate the ETK printed circuit board. CAUTION! Potential equalization in the vehicle over the shield of the Ethernet connecting cables of modules may occur! Mount the modules only to components with the same electrical potential or insulate the modules from the components. 1.2 Taking the Product Back and Recycling The European Union has passed a directive called Waste Electrical and Electronic Equipment, or WEEE for short, to ensure that systems are setup throughout the EU for the collection, treating and recycling of electronic waste. This ensures that the devices are recycled in a resource-saving way representing no danger to health or the environment. Fig. 1-1 WEEE-Symbol The WEEE symbol (see Fig. 1-1 on page 9) on the product or its packaging shows that the product must not be disposed of as residual garbage. The user is obliged to collect the old devices separately and return them to the WEEE take-back system for recycling. The WEEE directive concerns all ETAS devices but not external cables or batteries. For more information on the ETAS GmbH Recycling software, contact the ETAS sales and service locations (see chapter 9 on page 57). General Information 9

10 1.3 About This Manual Structure This manual describes the startup and technical data of the ETK7.1 module. This manual consists of nine chapters and an index. Chapter 1: General Information The General Information (this chapter) provides you with information on the basic safety instructions, returning the product and recycling, and how to use this manual. Chapter 2: "Introduction" The chapter "Introduction" contains information about the basic features and applications of the ETK7.1 Interface Board (ETK = Emulator Test Probe). Chapter 3: Hardware Description In the "Hardware Description" chapter the function blocks and the interfaces of the ETK7.1 are explained in detail. Chapter 4: Installation The Installation chapter describes the hardware installation of the ETK7.1. Chapter 5: ETK Configuration The ETK Configuration chapter includes a description of important ETK7.1 configuration parameters. Chapter 6: Technical Data The Technical Data chapter contains a summary of all technical data, pin assignments and hints to system requirements for operating the ETK7.1. Chapter 7: Cables and Accessories The Cables and Accessories chapter contains an overview of the available cables and accessories. Chapter 8: Ordering Information The Ordering Information chapter contains the ordering information on the available cables and accessories. Chapter 9: Version History The Version History chapter contains a summary of the changes in this document version. 10 General Information

11 The final chapter, ETAS Contacts, gives you information on ETAS international sales and service locations Using this Manual Representation of Information All activities to be executed by the user are presented in what is referred to as a Use-Case format. I.e. the aim is defined in brief as a title and the relevant steps necessary to achieve this aim are then listed. The information is displayed as follows: Target definition: Any introductory information... Step 1 Possibly an explanation of step 1... Step 2 Possibly an explanation of step 2... Step 3 Possibly an explanation of step 3... Any concluding remarks... Typographic Conventions The following typographic conventions are used: Click OK. Press <ENTER>. The Open File dialog box appears. Bold Italics Buttons are shown in boldface. Keyboard commands are shown in angled brackets in block capitals. Names of software windows, dialog boxes, fields etc. are shown in quotation marks. Device labels Crucial text Important notes for the user are shown as follows: Note Important note for the user. General Information 11

12 12 General Information

13 2 Introduction This chapter contains information about the basic features and applications of the ETK7.1 Interface Board (ETK = Emulator Test Probe). 2.1 Applications 2.2 Features The ETK7.1 is a 16-bit emulator probe for 3.3 V or 5 V systems. It is compatible with the ETK7 and earlier ETKs through the calibration and development system interface. Therefore, earlier calibration and development systems such as MAC or INCA-VME can still be used. In the future, new developments in the INCA-VME (VPSI-3 card) field will provide a massive increase in capability regarding transfer rates and application fields. The ETK7.1 is set up for this expansion. Comprehensive configuration options enable the use of the ETK7.1 in connection with other 16-bit or 8-bit processors. applicable for 16-bit and 8-bit microcontroller bus supports 16- and 8-bit access supports 3.3 V and 5 V bus interfaces configurable for various microcontroller types emulation memory access time: ca. 50 ns two pages available, each with 128 kbyte DPR emulation memory emulation memory configurable in 32 kbyte steps 64 kbyte measured data memory, configurable in 32 kbyte steps permanent storage of emulation data in FLASH memory 1 MByte static program RAM for processing program code serial interface with 8/100 MBit/s for calibration and development system permanent storage of configuration in E²PROM updates (programming of logic devices EPLD and FPGA) through software; removal of ETK or ECU unnecessary. high flexibility mounting possibilities in or on ECU power supply: 4.3 to 18 V DC temperature range: ºC dimensions: 85 x 50x 10 mm Introduction 13

14 14 Introduction

15 3 Hardware Description In this chapter the function blocks and the interfaces of the ETK7.1 are explained in detail. 3.1 Architecture The ETK7.1 can emulate data areas of an ECU program memory through Dual Port RAMs (DPRs). Fig. 3-1 "ETK7.1 Architecture" shows the block-diagram which illustrates the ETK7.1 function blocks. The ETK7.1 is connected to the bus of the ECU via the ECU-interface. To make this connection, an adapter is needed. A 50-pin connector contains all bus- and control signals. Interface to ECU Microcontroller 50-pin ERNI Connector Configuration EEPROM ECU Interface RAM 1 MB (Program) DPRAM 128 KB (Data Ref erence Page) DPRAM 128 KB (Data Working Page) DPRAM 64 KB (Measurement & RP Mailbox) Sense ECU Power Supply ECU Reset FLASH 1 MB (Data and Program) RAM 4 KB Syst em Fu nct io ns Standby Power Supply ECU Reset & Pow er Cont rol Tool Interface Trigger Unit Cont rol Unit Automatic Page Initialization Pow er Su p p l y Monitoring Pow er Supply V St an d b y Pow er Supply V Et hernet Phy Et hernet Traf f ic Detection Automatic Pow er-on ETK Interface 8/100 MBit/s U-Batt Fig. 3-1 ETK7.1 Architecture The ECU-interface can be configured for a wide variety of applications and processors. A configuration is created using the "ETK Configuration Tool" software package. The configuration is stored in the configuration E²PROM, to set up the ETK for a specific ECU project. While the ECU processor accesses the program data of the DPRs, the content of the DPRs can simultaneously be modified through the serial ETK-interface of the calibration and development system. This process makes adjustments of parameters, characteristic lines and maps through the calibration and development system possible. Using an additional DPR, the ECU processor can send data to the calibration and development system which receives, buffers and Hardware Description 15

16 processes these measured data. The ECU processor can process its program code directly from the static program RAM. A Flash memory is used for permanent storage of the adjusted parameters and the programm code. The 8/100 MBit/s serial interface provides communication with the calibration and development system. Power supply for the ETK is provided by two switching power supply to minimize power dissipation. Power dissipation can occur while battery voltage is converted into the voltage required by the ETK. 3.2 ECU Interface An ETK adapter in combination with a 50-pin connector on the ETK, provides connection of the ETK to the ECU. All bus signals (address-, data- and control bus) from the ECU are connected to the ETK7.1. A detailed description of the connector assignment can be found in chapter 5.6 on page 39. The ECU interface can be flexibly configured for various applications: 16-bit /8-bit bus, separately adjustable for read and write access multiplexed or non-multiplexed access configurable configuration of write signals At this point, a description of all configuration options with corresponding timing parameters would be too complex. Therefore, a configuration program ("ETK Configuration Tool") supports the user through a graphical interface. For a detailed description, see section 4 on page Emulation Memory The ECU program consists of program code and program data. The ECU program code can be stored and executed out of the ETK7.1 program memory. The program data ranges are stored and emulated in a Dual Port Ram (DPR) in order to enable data modification during normal ECU operation. A 1 MByte Flash memory is available for permanent storage of program code and emulation data. The ETK7.1 has configuration options for allocating emulation memory according to specific requirements. The complete emulation memory consists of Dual Port RAMs which are divided into two 128 kbyte pages (4 blocks, each 32 kbyte, per page). Fig. 3-2 "Emulation Memory Configuration: 4 x 32 kbyte Blocks" illustrates the DPR memory configuration. 16 Hardware Description

17 Reference data can be stored on one page ("Reference page") while the data on the other page ("Work page") can be modified. It is possible to switch between the two pages during operation through the application software. ECU Read Access Page switching Page 1 Page 2 32 kbyte 32 kbyte 1MByte address-space 32 kbyte 32 kbyte 32 kbyte 32 kbyte 32 kbyte 32 kbyte Fig. 3-2 Emulation Memory Configuration: 4 x 32 kbyte Blocks The 32 kbyte blocks can be relocated in a 1 MByte (maximum) address space at 32 kbyte limits. Typically, the DPR blocks must cover the complete program data of an ECU. As the allocation depends on the software version of the ECU, a project-specific configuration of the ETK is necessary (see section 4.3 on page 26) Data Preservation in Emulation Memory The emulation memory physically consists of static Dual Port RAMs (DPRs) and is permanently supplied with power from the vehicle battery to guarantee that data is preserved even when the ignition is switched off. If the ECU with ETK is Hardware Description 17

18 isolated from the battery, the data will be lost. For brief power interruptions, e.g. during a cold start procedure, buffering through capacitors is guaranteed for several milliseconds (see section 5.5 on page 31). 3.4 Flash Memory Flash memory is provided on the ETK7.1 for permanent storage of emulation data and program code. Users can copy the contents of emulation memory and of the program RAM into the flash memory with the aid of the operating software. It is recommended that an updated data set is always stored in the flash memory. The ETK7.1 has a circuit which recognizes and stores power failures. If it determines that a longer power failure has occurred and therefore, the consistency of the data can no longer be guaranteed, the ETK controller initiates a copying procedure Flash memory DPR and Flash memory program RAM upon restart. The emulation data is copied to both emulation pages. 18 Hardware Description

19 3.5 Measured Data Memory The measured data memory is a static Dual Port RAM. Its size is 64 kbyte (2 x 32 kbyte blocks). The 32 kbyte blocks can be relocated independently of each other in an address space of 1 MByte at 32 kbyte limits. (Fig. 3-3 "Measured Data Memory: 2 x 32 kbyte Blocks"). 1 MByte address space 32 kbyte 32 kbyte Fig. 3-3 Measured Data Memory: 2 x 32 kbyte Blocks Typically, the measured data DPR is laid over the external RAM of the ECU like a "shadow memory". The write-access of the ECU controller reaches the external RAM and the measured data DPR at the same time. The measured data stored here can be transferred to the calibration and development system via the serial ETK interface Triggering of Measured Data Capture The exact procedure for capturing measured data is explained in the documentation on Display Tables 12 and 13; only the hardware-specific features are mentioned here. The ETK7.1 contains a programmable trigger comparator which selects a segment of 64 Byte out of the 1 MByte address space. The segment can be at a 64 Byte limit within the 1 MByte address space. This limit Hardware Description 19

20 is known as the trigger segment address. Fig. 3-4 "64 Byte Trigger Segment in the 1 MByte Address Space" shows the configuration of the 64 Byte trigger segment. trigger segment 64 Byte 1 MByte address space Fig Byte Trigger Segment in the 1 MByte Address Space 20 Hardware Description

21 The trigger segment address must be located in the same area as the measured data DPR (in one of the two 32 kbyte blocks). Fig. 3-5 "Division of the 64 Byte Trigger Segment" shows the address map of the 16 triggers in the 64 Byte trigger segment. 3Eh 3Ch 3Ah 38h 36h 34h 32h 30h 2Eh 2Ch 2Ah 28h 26h 24h 22h 20h trigger 15 trigger 14 trigger 13 trigger 12 trigger 11 trigger 10 trigger 9 trigger 8 trigger 7 trigger 6 trigger 5 trigger 4 trigger 3 trigger 2 trigger 1 trigger 0 trigger B trigger A RESERVED Fig. 3-5 Division of the 64 Byte Trigger Segment Normally, there are only two trigger addresses available: trigger B and trigger A. The new ES1231 card for ES1000 will support several triggers. To achieve downward compatibility, odd-numbered triggers have been put into group trigger B and the even-numbered triggers into group trigger A. In total, 16 hardware triggers will be available. Note The unused areas are reserved for future applications and must not be used for other purposes. Hardware Description 21

22 3.6 Power Supply CON3 CON2 Fig. 3-6 Power Supply Connector The ETK7.1 is powered directly from the vehicle battery (permanent supply, connector CON2 or CON3 in Fig. 3-6 "Power Supply Connector"). CON2 is a 2 pole connector (U Batt1 =Pin1; GND=Pin2) whereas CON3 is only a solder pad to connect an additional power supply (U Batt2 ). The power supply on CON3 must use the GND-signal from CON2. Both inputs are decoupled from each other through diodes. The input voltage can vary between 4.3 V and 18 V (see "Power Supply" on page 31). In case of higher input voltages to the ETK, an additional voltage converter is required. The necessary voltage is created through a switching power supply which minimizes heat build-up. The power supply of the ECU is not affected by the ETK7.1. An automatic switch ensures that the power supply of the ETK7.1 is automatically switched on and off. The ECU voltage (USG) is monitored by the ETK to recognize whether the ECU is switched on or off. 22 Hardware Description

23 3.7 The Serial ETK Interface ser. Interface 8/100 Mbit/s Fig. 3-7 Serial Interface to the Calibration and Development System The new serial ETK interface (see Fig. 3-7 "Serial Interface to the Calibration and Development System") utilizes a 100BASE-TX transmission to achieve an outstanding transmission performance of 100 MBit/sec. The ETK interface is also able to handle the 8 MBit/sec interface of "old" calibration and development systems. The new interface requires a new double-shielded twisted-pair cable (maximum length: 30 m). It is not possible to use the old interface cable (for 8 MBit/sec) with the new interface in the 100 MBit/sec mode. If necessary, the new interface cable can be used with the old interface. 3.8 Static Program RAM The ECU program code can be processed either from the internal ECU memory or from the program RAM. If the program code has been stored in the program RAM, it can be stored permanently in the Flash memory through the application software. Hardware Description 23

24 3.9 Status LEDs There are three LEDs on the ETK7.1 (ETK On: Red; Flash Data: Green; 100 MBit/ s: Yellow), displaying the operating conditions of the ETK7.1. LED red LED green LED yellow The red LED goes on when the ETK7.1 is supplied with power and either the ECU and/or the calibration and development system (MAC or INCA-VME) is connected and ready to communicate with the ETK7.1. If data preservation of the RAMs is no longer ensured because of a power supply decline under 4 V, the green LED goes on. As soon as the ETK7.1 switches on again, the content of the Flash will be copied into the RAMs. For continuous visibility of possible loss of data, the green LED stays on until the calibration and development system copies new data into the RAMs. The yellow LED indicates that the ETK7.1 is using the 100 MBit/s protocol. This LED is not visible when using the ETK7.1 case. 24 Hardware Description

25 4 ETK Configuration The ETK Configuration chapter includes a description of important ETK7.1 configuration parameters. 4.1 Overview As mentioned in previous chapters, many project-specific adjustments are necessary. Configuration data is stored permanently in a serial E²PROM. 4.2 ETK Configuration Tool Generating a valid configuration data set is supported by the "ETK Configuration Tool". The "ETK Configuration Tool" contains information on all available ETKs. The user is supported through a graphical interface. The configuration is done in two steps: 1. Generation of the special address offset for the emulation and measured data memory. The position of data and code areas, measured data output areas, trigger segment addresses etc. are familiar to the ECU software developer, or can be generated automatically. If an ECU description database (ASAP, DAMOS...) with the corresponding input exists, these inputs can be downloaded from this database. If necessary, a plausibility check is performed. 2. Connection of the ETK to the ECU. The ECU hardware developer defines the connection of the ETK to the ECU. The corresponding signals usually have to be adjusted for each processor. All inputs are checked for plausibility, to make sure that a valid configuration is generated. Note The details of which address lines are connected to the ETK are important. It is not sufficient to connect unused address lines to GND. Adjustment in the "ETK Configuration Tool" is essential. The "ETK Configuration Tool" can create the following output: 1. Direct ETK configuration 2. Storage of the configuration in a data file 3. The corresponding ASAP or DAMOS input ETK Configuration 25

26 The most important outputs are the entries for the ASAP or DAMOS file. The parameter ETK_CFG is created and contains the complete ETK configuration of the ECU interface in hex code. If this parameter is entered correctly in the corresponding ECU description file, it guarantees that every time the calibration and development system is started, the ETK is checked for the appropriate configuration. If necessary, the ETK will be configured appropriately for the corresponding project. 4.3 ETK Configuration In this chapter, the configuration parameters of the ETK7.1 will be described. The configuration is possible through the ETK Configuration Tool. Not all combinations of parameters make sense. The Configuration Tool provides support concerning the configuration parameters. The following is a list with configuration parameters: Format (Intel/Siemens/Motorola) The selection of the processor type defines, which bit of the data or address lines is the most significant bit (MSB) respectively the least significant bit (LSB). This definition determines how the connection of the address and data lines has to be made. Read Bus Width (8 Bit, 16 Bit) Data Bus width during read access using the /SGCS Chip Select Signal. Read Bus Mode (Multiplex, Non Multiplex) During multiplexed operation, the address and data information on the data Bus SGD[] are transmitted one after the other. The address information in the ETK7.1 are latched by using the SGALE signal. Write Bus Width (8Bit, 16 Bit) Data Bus Width during write access using the /SGWCS Chip Select Signal Write Bus Mode (Multiplex, Non Multiplex) During multiplexed operation, the address and data information on the data Bus SGD[] are transmitted one after the other. The address information in the ETK7.1 are latched by using the SGALE signal. Write Signal Configuration (One Write Signal, /UB /LB Write Only, /UB / LB Read/Write) This configuration parameter determines the connection of the write strobe signal. A write signal has to be connected to /SGRW at the first configuration possibility. Either a writing or a reading/writing signal has to be connected to SGSIZ and SGALE during the other two possibilities. 26 ETK Configuration

27 Write /CS (Without /SGWCS, with /SGWCS) This parameter determines, if a write access happens with or without writing Chip Select (/SGWCS). For internal timing reasons, a write access with Chip Select is to be preferred.. Memory (1 (linear) Memory, 2 Memories) By using this parameter, the code memory can be divided into two areas of 512 kbyte each. These two areas have to be addressed through two Chip Selects. Normally, the code memory is addressed as an area of 1 MByte through the /SGCS Chip Select. Code/Data Memory (Write Protected, Write Enabled) Write protection for the code and data emulation memory (/SGCS) DPR Access (Normal, Ignore A16.. A19) If using the normal configuration, all address lines are decoded during a write access to the measured data memory. Otherwise the lines SGA[16..19] will be ignored. ETK Configuration 27

28 28 ETK Configuration

29 5 Technical Data 5.1 Environmental Conditions Item Temperature range Characteristics - 40 C to +110 C - 40 F to +230 F 5.2 System Requirements This section tells you which hardware and software are needed to operate your ETK7.1. Note Carefully check the software version numbers and cable names. Wrong software versions and cables could impair the proper functionality of your ETK7.1, damage the ETK7.1 and the connected devices Software Support You need following software versions to support the ETK7.1: Software HSP (Firmware) INCA ASCET-RP INTECRIO Needed Version (or higher) Supported ETAS Hardware Following ETAS hardware with ETK interface supports the ETK7.1: Item VME Hardware Compact Hardware Compact Rapid Prototyping Module Characteristics ES1000.2/ES with ES1232 ES590, ES591, ES690 ES910.2 (ETK interface) Note See also chapter "Software Support" on page 29. Technical Data 29

30 5.2.3 Not supported ETAS Hardware Following ETAS hardware with ETK interface not supports the ETK7.1: Item VME Hardware Compact Hardware Characteristics ES with ES1111 and ES1200/ ES1201; ES1000.2/ES with ES1120 and ES1200/ES1201, ES1000.2/ES with ES1120 and ES1231 MAC2 5.3 Microcontroller Interface Item Supported microcontrollers Characteristics 30 Technical Data

31 5.4 Power Supply Parameter Permanent Power Supply from car battery Permanent Power Supply from car battery (Standby) Symbol Condition Min Type Max Unit UBatt V UBatt V Standby Current ISTBY U Batt1 = 12 V; ECU off; t = 20 C Supply Current IBatt1 U Batt1 = 12 V; ECU on; t = 20 C Power Supply from ECU (sense) USG >3.83 ECU on; <3.50 ECU off 10 ma 200 ma 5 V Note Connector: CON2 (Pin1=U Batt1, Pin2=GND) or CON3 (Fig. 3-6 "Power Supply Connector") 5.5 Testcharacteristics Parameter Symbol Condition Min Max Unit Reset delay 1 t Reset1 U Batt1 =12 V USG= 0 V 5 V without transferring Flash ms Reset delay 2 t Reset2 U Batt1 =12 V USG= 0 V 5 V with transferring Flash Reset delay 3 t Reset3 U Batt1 =0 V 12 V transfer FPGA and Flash ms ms Data Retention t Buff U Batt1 =12 V 0 V ms Technical Data 31

32 Note t Reset1 : Delay of ECU reset through ETK without transferring the Flash (U Batt1 present, USG will be switched on) t Reset2 : Delay of ECU reset through ETK with transferring the Flash (U Batt1 present, transfer active, USG will be switched on) t Reset3 : max. delay of ECU reset through ETK (U Batt1 and USG will be switched on) t Buff : Data retention at loss of power supply Electrical Characteristics - Input / Output Pins Type Parameter Conditions Min Max Input V IH 2.0 V V IL I I control signals have additionally a 10k pull-up resistor to USG 0.8 V 11 μa Output V OH I OH = -24 ma 3.76 V V OL I OL = 24 ma 0.44 V Note /SGRES: opendrain FET; I Dmax = 0.2 A Parameter Conditions Typ. C IO SGD[0..15] 36 pf C I SGA[0..19] 14 pf C I SGSIZ, /SGCS, /SGRD, /SGWCS, /SGRW 8 pf C I SGALE 20 pf 32 Technical Data

33 5.5.2 AC Operating Conditions - Microcontroller Modes The write mode timings are graphically displayed in the ETK Configuration Tool to facilitate the configuration of an ETK. The write mode matching the used microcontroller can be selected from a diagram. In this way the correct read mode is used automatically. The following diagrams show all modes the ETK7.1 can process, including the applicable timing parameter. Parameter Description Min Max Unit t 1 Address-Latch Pulse Width 8 ns t 2 Address-Latch Setup Time 6 ns t 3 Address-Latch Hold Time 5 ns t 4 Access Cycle Time 55 ns t 5 Size Signal Valid to Data Valid 40 ns t 6 Chip Select Valid to Data Valid 40 ns t 7 Address to Read Delay Time 9 ns t 8 Read Signal Recovery Time 9 ns t 9 Address Valid to Data Valid 55 ns t 10 Read Low to Data Valid 28 ns t 11 Read Low Z-Time 0 ns t 12 Read High Z-Time 20 ns t 13 Read High to Data Invalid 3 ns t 14 Size Signal Setup Time 8 ns t 15 Size Signal Hold Time 10 ns t 16 Chip Select Setup Time 8 ns t 17 Chip Select Hold Time 10 ns t 18 Write Strobe Setup Time 8 ns t 19 Write Strobe Width 20 ns t 20 Write Strobe Hold Time 10 ns t 21 Address Valid to End of Write 30 ns t 22 Data Setup Time 15 ns t 23 Data Hold Time 10 ns t 24 Read/Write Setup Time 8 ns t 25 Read/Write Hold Time 10 ns Technical Data 33

34 Parameter Description Min Max Unit t 26 Data Strobe Setup Time 8 ns t 27 Data Strobe Width 20 ns t 28 Data Strobe Hold Time 10 ns t 31 Byte Enables Setup Time 8 ns t 32 Byte Enables Width 20 ns t 33 Byte Enables Hold Time 10 ns t 34 Address Hold after Read Low 10 ns t 35 Chip Select High Z Time 20 ns t 36 Chip Select to Data Valid 3 ns Write Mode 1 incl. corresponding Read Timing (multiplexed access) Write mode 1 can be used multiplexed (see timing diagram in this section) or non-multiplexed (see timing diagrams in next sections). The bus range is determined by bus size signals, whereas a write enable strobe signal serves as write impulse. 0ns 20ns 40ns 60ns 80ns 100ns SGALE t 1 (t wale ) t 2 (t suale ) t 3 (t hale ) SGA[19:16] SGSIZ SGWCS t 4 SGA[] t 14 t 15 t 16 t 17 t 18 t 19 t 20 SGRW SGD[15:0] t 2 (t suale ) t 3 (t hale ) SGA[] t 21 t 22 t 23 SGD[] Fig. 5-1 Write Cycle (multiplexed access) 34 Technical Data

35 . 0ns 20ns 40ns 60ns 80ns 100ns 1 t 1 (t wale ) SGALE t 4 SGA[19:16] SGA[] t 5 SGSIZ t 6 SGCS SGRD t 7 t 34 (t SA_SGRD ) t 8 t 9 t 36 t 10 t 35 SGD[15:0] t 2 (t suale ) t 3 (t hale ) SGA[] t 11 t 12 SGD[] t 13 Fig. 5-2 Read Cycle (multiplexed access) Read Timing: non-multiplexed The non-multiplexed read timing is always used when one of the non-multiplexd write modes (see below) was selected. 0ns 20ns 40ns 60ns 80ns 100ns 1 t 4 SGA[19:0] SGA[] t 5 SGSIZ t 6 SGCS t 34 (t SA_SGRD ) t 7 t 8 SGRD t 9 t 36 t 10 t 35 t 11 t 12 t 13 SGD[15:0] SGD[] Fig. 5-3 Read Cycle (non-multiplexed access) Technical Data 35

36 Write Mode 1: with Bus Size Signals and Write Enable Signal as Strobe In mode 1, the bus range is determined by bus size signals, whereas a write enable strobe signal serves as write impulse. This mode can be used with a multiplexed timing too (see page before). SGALE 0ns 20ns 40ns 60ns 80ns 100ns 1 t 1 (t wale ) t 2 (t suale ) t 3 (t hale ) t 4 SGA[19:16] SGSIZ SGWCS SGA[] t 14 t 15 t 16 t 17 t 18 t 19 t 20 t 21 SGRW SGD[15:0] t 2 (t suale ) t 3 (t hale ) SGA[] t 22 t 23 SGD[] Fig. 5-4 Write Cycle with Bus Size and Write Enable Signals as Strobe 36 Technical Data

37 Write Mode 2: with Bus Size Signals, Read/Write and Data Strobe Mode 2 interprets a read/write signal additionally because the used write impulse is a data strobe signal. The bus range is evaluated through the bus size signals again. 0ns 20ns 40ns 60ns 80ns 100ns 1 t 4 t 21 SGA[19:0] SGA[] t 14 t 15 SGSIZ t 16 t 17 SGWCS t 34 (t SA_DS ) t 24 t 25 SGRW DS t 26 t 27 t 28 t 22 t 23 SGD[15:0] Fig. 5-5 SGD[] Write Cycle with Bus Size Signals, Read/Write and Data Strobe Technical Data 37

38 Write Mode 3: with Read/Write Signal and Byte Enables as Strobes Mode 3 uses the byte enables as data strobe signals and and a read/write signal to differentiate between a read and a write access. 0ns 20ns 40ns 60ns 80ns 100ns 1 t 4 t 21 t 34 (t SA_SGRW ) SGA[19:0] SGA[] t 16 t 17 SGWCS t 24 t 25 SGRW t 31 t 32 t 33 UB/LB inactive active inactive t 22 t 23 SGD[15:0] SGD[] Fig. 5-6 Write Cycle with Read/Write Signal and Byte Enables as Strobes Write Mode 5: with Byte Write Enables as Strobes In mode 5, the write signals are only generated through byte write enable strobe signals. 0ns 20ns 40ns 60ns 80ns 100ns t 4 t 21 SGA[19:0] SGA[] t 16 t 17 SGWCS t 34 t 18 t 19 t 20 UB/LB inactive active inactive t 22 t 23 SGD[15:0] Fig. 5-7 SGD[] Write Cycle with Byte Write Enables as Strobes 38 Technical Data

39 5.6 ECU Interface Connector pinout CON2 CON4 CON1 Fig. 5-8 ECU Interface Connector Pin Signal Pin Signal 1 GND 2 SGD0 3 SGD1 4 SGD2 5 SGD3 6 SGD4 7 SGD5 8 SGD6 9 SGD7 10 SGD8 11 SGD9 12 SGD10 13 SGD11 14 SGD12 15 SGD13 16 SGD14 17 SGD15 18 GND 19 SGA0 20 SGA1 21 SGA2 22 SGA3 23 SGA4 24 SGA5 25 SGA6 26 SGA7 27 SGA8 28 SGA9 29 SGA10 30 SGA11 31 SGA12 32 SGA13 33 SGA14 34 SGA15 35 SGA16 36 SGA17 37 SGA18 38 SGA19 39 SGSIZ 40 /SGCS 41 /SGRD 42 GND Technical Data 39

40 Pin Signal Pin Signal 43 /SGWCS 44 GND 45 /SGRES 46 USG 47 /SGRW 48 USG 49 SGALE 50 GND Signal Description The direction for each signal is indicated using the following abbreviations: I Input Pin; O Output Pin; I/O Bidirectional Pin. Signal Description Dir Pins GND Ground 1, 18, 42, 44, 50 USG Power Supply 5 V from ECU (sense) I 46, 48 SGD [0.. 15] Data Bus: 16-bit data bus I/O 2-16 SGA [0.. 19] Address Bus: 20-bit address bus I SGSIZ Transfer Size: together with SGA0 specifies I 39 the data transfer size (8- or 16-bit access) and the selected byte (8-bit access) for the access /SGCS Chip Select Read: Read Emulation DPR and I 40 Program Code RAM /SGRD Read: When asserted, indicates a read cycle. Controls output enable of ETK data bus drivers I 41 /SGWCS Chip Select: Write Data Acquisition DPR I 43 /SGRES Reset: Controls ECU System Reset O 45 /SGRW Write or Write Strobe: When asserted, indicates I 47 a write cycle SGALE This pin has three different functions: - Address Latch Enable: used for multiplexed access - Data Strobe: /DS for Motorola C - Upper/Lower Byte: Specifies together with SGSIZ the selected byte (8-bit access) for the transaction I Technical Data

41 5.7 Mechanical Dimensions and Mounting The reference measure for all drawings is millimeter. All measures without connectors ETK7.1 Dimensions Dimensions Millimeters Inches Length Width Thickness of PCB Height of component (upper side) Height of component (lower side) Fig. 5-9 Mechanical Dimensions Side View Dim Millimeters Inches A B C Technical Data 41

42 Fig Mechanical Dimensions Top View Dim Millimeters Inches A B C D E F G H Technical Data

43 5.7.2 ETK7.1 Case Fig ETK7.1 Case Technical Data 43

44 5.7.3 ETK7.1 Mounting Possibilities ETK7.1 Mounted on ECU Case ETK7.1 into case ECU cover Fig Measurement Drawing - ETK Mounted on the ECU Case Dim Millimeters Inches Dim Millimeters Inches A D B E C F Technical Data

45 ETK7.1 Mounted into ECU Case 2* mounting panels Fig ETK7.1 into case 2 mounting panels ECU cover Measurement Drawing - ETK Mounted Partially Inside the ECU Case Dim Mill In Dim Mill In Dim Mill In A E J B F K C G L D H Technical Data 45

46 ETK7.1 Mounted into ECU Case ETK7.1 4 spacer bolts ECU cover Fig Measurement Drawing - ETK Mounted Inside the ECU Case Dim Mill In A B C D Technical Data

47 6 Cables and Accessories Mounting Interface Cables Interface Cable KA41 for Insert Socket, Proposal 1 Fig. 6-1 Measurement Drawing - Interface Cable KA41, Prop. 1 Dim Millimeters Inches Dim Millimeters Inches A D B E C Note Shield not connected to ECU housing. Cables and Accessories 47

48 Interface Cable KA41 for Insert Socket, Proposal 2 Fig. 6-2 Measurement Drawing - Interface Cable KA41, Prop. 2 Dim Millimeters Inches Dim Millimeters Inches A D B E C Note Shield connected to ECU housing. Insulating disc must be removed. 48 Cables and Accessories

49 Interface Cable KA54 with PG-screwing, Proposal 1 Fig. 6-3 Measurement Drawing - Interface Cable KA54, Prop. 1 Dim Millimeters Inches Dim Millimeters Inches A C B D Note Shield connected to ECU housing. SKINDICHT compact screwing; Manufacturer: Lapp; Description: SH7; Order-No.: Nut for compact screwing; Manufacturer: Lapp; Description: SM7; Order-No.: Cables and Accessories 49

50 Interface Cable KA54 with PG-screwing, Proposal 2 Fig. 6-4 Measurement Drawing - Interface Cable KA54, Prop. 2 (long thread) Fig. 6-5 Measurement Drawing - Interface Cable KA54, Prop. 2 (short thread) Dim Millimeters Inches Dim Millimeters Inches A E B FLon g C F Short D G Cables and Accessories

51 Note Shield connected to ECU housing. SKINTOP compact screwing; Manufacturer: Lapp; Description: MS-SC 11 ; Order-No.: (long thread) or (short thread) Nut for compact screwing; Manufacturer: Lapp; Description: SM-PE 11 ; Order-No.: Interface Cable KA55 Fig. 6-6 Measurement Drawing - Interface Cable KA55 Dim Millimeters Inches A B C Note Strain relief on ECU cover necessary. Shield not connected to ECU housing Mounting Power Supply Cables Cable ETV Fig. 6-7 Power Supply Cable ETV Dim Millimeters Inches A Cables and Accessories 51

52 Cable with Filtercoil ETV2 Fig. 6-8 Power Supply Cable with Filtercoil ETV2 Dim Millimeters Inches A B Cable Adapter KA43 Fig. 6-9 Cable Adapter KA43 Dim Millimeters Inches A B C D Cables and Accessories

53 Cable Adapter with Filtercoil KA50 Fig Cable Adapter with Filtercoil KA50 Dim Millimeters Inches A B C D E Cables and Accessories 53

54 54 Cables and Accessories

55 7 Ordering Information 7.1 ETK7.1 Type Order-No. Note ETK7.1 F 00K ETK7.1 Case (ETK7.1_GM) F 00K Mounting Panels Y 261 A Aluminum Sticker F 00K Cables Interface Cables Type Order-No. Note KA41, Prop. 1 / Prop. 2 Y 261 A KA54, Prop. 1 / Prop. 2 F 00K Delivery without PG-screwing KA55 F 00K Power Supply Cables Type Order-No. Note ETV Y 261 A ETV2 F 00K KA43 Y 261 A KA50 F 00K Ordering Information 55

56 8 Revision History Revision Date Changes Version 0.01 Graphics and technical data added Graphics and technical data added Mounting data added Supply Current added Table V OH, V OL corrected Capter Capacitance added Timing corrected 56 Revision History

57 9 ETAS Contact Addresses ETAS HQ ETAS GmbH Borsigstraße 14 Phone: Stuttgart Fax: Germany WWW: ETAS Subsidiaries and Technical Support For details of your local sales office as well as your local technical support team and product hotlines, take a look at the ETAS website: ETAS subsidiaries WWW: ETAS technical support WWW: ETAS Contact Addresses 57

58 58 ETAS Contact Addresses

59 Index A Applications 13 Architecture 15 B Block diagram 15 C Cables 47, 55 Cables and Accessories 47 Calibration software 29 Case 43 Characteristics Electrical 32 Configuration 25, 26 Connector pinout 39 D DAMC4 see ETK interface Dimensions Mechanical 41 E ECU Interface 16, 39 Electrical Characteristics 32 Emulation Memory 16 ETAS Contact Addresses 57 ETK interface 29 F Features 13 Flash Memory 18 H Hardware Description 15 I Interface Cables 47 ETK 23 Interface Cables 55 Introduction 13 Index 59

60 L LED 24 M Measured Data Memory 19 Mechanical Dimensions 41 Memory Emulation 16 Flash 18 Measured Data 19 Static Program RAM 23 Microcontroller Interface 30 Microcontroller Modes 33 Mode 33 Mounting 41 Possibilities 44 O Operating Conditions 33 Operation conventions 11 Use-Case 11 Ordering Information 55 Supported ETAS Hardware 29 System Requirements 29 System requirements see Requirements T Testcharacteristic 31 Timing 33 Triggering 19 U Use, correct 8 W Waste Electrical and Electronic Equipment 9 WEEE 9 WEEE take-back system 9 P PC interface 29 Power Supply 22, 31 Power Supply Cables 55 Product Back 9 Product liability disclaimer 7 R Recycling 9 Representation of information 11 Requirements calibration software 29 ETK interface 29 PC interface 29 S Safety instructions, basic 7 Safety instructions, labeling 8 Serial Interface 23 Signal Description 40 Software Support 29 Structure Index