7600 Router Clock Distribution

Transcription

1 7600 Router Clock Distribution Document ID: Contents Introduction Prerequisites Requirements Components Used Conventions Background Information Router Clock Synchronization Interface Clock Source Options Backplane Clock Source Options Configure the Clock Distribution Clock Recovery from SyncE Port Clock Recovery from External (BITS) Line to External (Wander Cleanup1 with SyncE Derived Clock) System to External Clock Source Input Verification Related Information Introduction This document describes the Cisco 7600 router clock distribution and clock sources. The Cisco 7600 router supports a range of serial, channelized, or interfaces, which require reference clocks for transmitting the data. Prerequisites Requirements There are no specific requirements for this document. Components Used The information in this document is based on the Cisco 7600 series router with Cisco IOS Software Release 12.2(33)SRB (or later). The information in this document was created from the devices in a specific lab environment. All of the devices used in this document started with a cleared (default) configuration. If your network is live, make sure that you understand the potential impact of any command. Conventions Refer to the Cisco Technical Tips Conventions for more information on document conventions.

2 Background Information Traditionally, the Cisco 7600 series router has used either the incoming line clock or the local oscillator as the reference for transmitting the data. Beginning with the 12.2(33) SRB release, Cisco 7600 series routers can take input from various clock sources and distribute it throughout the box using the traces on the backplane. The clock from the backplane can then be used as a reference clock on 7600 SIP 400 and 7600 SIP 200 based interfaces to transmit data. Router Clock Synchronization The clock can be sourced from these sources: Interface Clock Source Options Back Plane Clock Source Options Interface Clock Source Options Here are the interface clock source options: LineUse the clock input from the physical line (looptiming). Internal Back PlaneUse the clock from the backplane. Internal LocalUse the clock input from the oscillator on the port adapter or line card. Use this command in order to configure the interface clock sources: line Backplane Clock Source Options Here are the backplane clock source options: ControllerMap the clock from the controller to the backplane. Circuit emulation over packet (CEoP) shared port adapters (SPA) can input building integrated timing supply (BITS) clocking. ModuleMap the clock from the Stratum 3 chip resident on SIP 200, SIP 400 to the backplane. InterfaceMap the clock from an interface (such as Ethernet, SONET, serial, or BITS) to the backplane. Use this command in order to configure the backplane clock sources: network clock input source priority {interface interface_name slot/card/port {external sl Configure the Clock Distribution You can configure up to six different clock input sources and map them to the backplane. If the highest priority clock fails or if its quality degrades beyond the acceptable accuracy, then the router maps the next highest priority clock to the backplane. These clock sources can come in from the line or from internal oscillators. A clock source that comes in from the line can be BITS clock input into one of the physical ports on the CEoP SPA, channelized, serial, or supported on 7600 SIP 400 and 7600 SIP 200. For the internal oscillators, either the sytem clock or the oscillators on the 7600 SIP 400 and 7600 SIP 200 can be used. In case of supervisor failure, the backup supervisor takes over and maintains the same clock source priority.

3 Here are four types of clock recovery methods: Clock Recovery from SyncE Port Clock Recovery from External (BITS) Line to External (Wander Cleanup1 with SyncE Derived Clock) System to External Clock Recovery from SyncE Port The system clock is derived from the selected SyncE port and used to clock other SyncE and/or ATM/CEoP interfaces. For example, you can configure core facing GigE as the timing source and transfer timing to the downstream SyncE or SONET/PDH links as shown in this image and sample code: interface GigabitEthernet 5/1! Recover clock from GE line. clock source line network clock synchronization automatic! Map GE clock to primary BP clock. network clock input source 1 GigabitEthernet 5/1! Map GE clock to secondary BP clock (config not shown). network clock input source 2 GigabitEthernet 6/1 interface ATM 4/0/0 interface GigabitEthernet 3/1 Clock Recovery from External (BITS) The system clock is derived from an external BITS source or synchronization supply unit (SSU) that is slaved to another network timing source (not from 7600). For example, you can configure core facing GigE as the timing source and transfer timing to the downstream SyncE or SONET/PDH links as shown in this image and sample code:

4 interface GigabitEthernet 5/1 interface GigabitEthernet 3/1 interface ATM 4/0/0 atm clock internal! Automatic mode configures ES+ TX clocking to take system clock. network clock synchronization automatic! Non intuitive port ref alert.! BITS port is always x/0/0 (where x is the slot number). network clock input source 1 external 5/0/0 t1 sf Line to External (Wander Cleanup1 with SyncE Derived Clock) The clock received from an Ethernet Services Plus (ES+) port is forwarded via BITS output to an external SSU for wander cleanup. SSU returns the stabilized signal back to 7600 via BITS input, and this clock is applied as the system clock to other SyncE and/or ATM/CEoP interfaces. For example, you can configure core facing GigE as the timing source and transfer timing to the downstream SyncE or SONET/PDH links as shown in this image and sample code: interface GigabitEthernet 5/1! Recover clock from GE line. clock source line

5 interface GigabitEthernet 3/0 interface ATM 4/0/0 atm clock internal network clock synchronization automatic! Map GE5/1 line clock to BITS output. network clock output source line 1 GigabitEthernet 5/1 external 5/0/0 t1 sf! Map BITS input to system clock.! System clock used for all ES+ TX I/Fs. network clock input source 1 external 5/0/0 t1 sf System to External The system clock from the backplane is used to drive the BITS output. The system clock can be derived from another line card (for example, SIP400 or ATM/CEoPs SPA). This mode can be used to drive other external synchronous equipment in the Central Office. For example, you can configure core facing GigE as the timing source and transfer timing to the downstream SyncE or SONET/PDH links as illustrated in this image and sample code: interface GigabitEthernet 5/1 interface GigabitEthernet 3/1 interface ATM 4/0/0! Source of system clock. atm clock internal! ES+ uses system clock for TX when clock selection algorithm is enabled. network clock synchronization automatic! Output system clock to BITS port for cleanup at SSU. network clock output source system 1 external 5/0/0 t1 sf

6 The clock derived from the incoming pseudo wire can be distributed to other controllers within the SPA, but cannot be mapped to the backplane clock traces. The clock distribution function is supported on all current Cisco 7600 chassis (including 7604, 7606, 7609, 7613). In addition, the clock distribution function is supported on all supervisor engines and Route Switch Processors (RSPs) (including Sup 720 3B/XL,Sup32 3B,RSP 720 3C/XL). With respect to line cards, the 7600 SIP 400 and 7600 SIP 200 have the hardware traces to both feed and take the clock from the backplane. Clock Source Input This diagram shows the various methods for clock source input and selection for transmission of data. The red lines show the mapping of backplane clock traces. The blue lines show the clock used for data transmission. Table 1: Clock Source for Data Transmission This table lists various clock sources and the ability of the corresponding line cards to use the clock. Clock Source Input for Data Transmission Local Line Backplane Enhanced Flex WAN 7600 SIP SIP SIP 600 Yes Yes Yes Yes Yes Yes Yes Yes No Yes Yes No Table 2: Various Clock Input Resources (Quality and Hardware Support) This table lists the various reference clock sources (including local, line, or BITS). In addition, this table lists the quality of the clock and the interfaces that can be used as input. Reference Clock Input Data for Data Transmission Local Quality of Clock Stratum 3 Enhanced Flexwan 7600 SIP SIP SIP 400

7 Line BITS input Depends on the remote end Depends on the source input No SPA 8XCHT1/E1 SPA 24CHT1 CE ATM No All ssupported Table 3: Clock Source for Mapping to Backplane The following table lists the various internal and external clock sources that can be mapped to the backplane. Clock Source Internal Oscillator Interface Controller Line Card 7600 SIP 200 (Stratum 3) 7600 SIP 400 (Stratum 3) 7600 SIP SIP SIP 200 SPA Not Applicable Not Applicable SPA 1XCH SPA 2XOC3 POS, SPA 4XOC3 POS SPA 2XOC3 ATM, SPA 4XOC3 ATM SPA 1CHOC3 CE ATM SPA 2XOC3 POS, SPA 4XOC3 POS SPA 1XOC12 POS SPA 1XOC48 POS SPA 2XOC3 ATM, SPA 4XOC3 ATM SPA 1XOC12 ATM SPA 1XOC48 ATM SPA 8XCHT1/E1 SPA 2XT3/E3, SPA 4XT3/E3 Clock Derived From Not Applicable Not Applicable T1/E1 Cannot provide clock to the Transmit Data Encoder backplane SPA 2XCT3/DS0, SPA 4XCT3/DS0 Cannot provide clock to Transmit Data Encoder

8 backplane 7600 SIP 400 SPA 24CHT1 CE ATM T1/E1 Table 4: Interfaces that use the Backplane Clock to Transmit Data This table lists the line cards, interfaces, and the channelization levels that can use the clock from the backplane. Line Card 7600 SIP 200 SPA SPA 8XCHT1/E1 SPA 2XT3/E3, SPA 4XT3/E3 SPA 2XCT3/DS0, SPA 4XCT3/DS0 SPA 1XCH SPA 2XOC3 POS, SPA 4XOC3 POS SPA 2XOC3 ATM, SPA 4XOC3 ATM Minimum Interface Level to be used for Clock Source Input Cannot take clock from the backplane Cannot take clock from the backplane Cannot take clock from the backplane 7600 SIP 400 SPA 24CHT1 CE ATM T1/E1 Verification SPA 1CHOC3 CE ATM SPA 2XOC3 POS, SPA 4XOC3 POS SPA 1XOC12 POS SPA 1XOC48 POS SPA 2XOC3 ATM, SPA 4XOC3 ATM SPA 1XOC12 ATM SPA 1XOC48 ATM STM4/OC12 STM16/OC48 STM4/OC12 STM16/OC48 Mapping the clock to backplane: 7600#show run include network clock network clock select 1 controller E1 1/0/0 (Priority 1) network clock select 2 interface POS1/3/0 (Priority 2)

9 Display the state of clock source: 7600#show network clocks Active source = E1 1/0/0 Active source backplane reference line = Primary Backplane Clock Standby source = POS1/3/0 Standby source backplane reference line = Secondary Backplane Clock Current operating mode is Revertive All Network Clock Configuration Priority Clock Source State 1 E1 1/0/0 Valid 2 POS1/3/0 Valid There are no slots disabled from participating in network clocking Related Information Cisco 7600 Routers Technical Support & Documentation Cisco Systems Contacts & Feedback Help Site Map Cisco Systems, Inc. All rights reserved. Terms & Conditions Privacy Statement Cookie Policy Trademarks of Cisco Systems, Inc. Updated: Jan 28, 2010 Document ID: