An Exascale Programming, Multi objective Optimisation and Resilience Management Environment Based on Nested Recursive Parallelism.

Size: px
Start display at page:

Download "An Exascale Programming, Multi objective Optimisation and Resilience Management Environment Based on Nested Recursive Parallelism."

Transcription

1 This project has received funding from the European Union s Horizon 2020 research and innovation programme under grant agreement No An Exascale Programming, ulti objective Optimisation and Resilience anagement Environment Based on Nested Recursive Parallelism AllScale Enable developers to be productive and to port their applications to any scale of system Thomas Fahringer University of Innsbruck, Austria Ireland European Exascale Applications Workshop anchester, Oct 11 12, 2016

2 Parallel Architectures ulticore: Accelerators: lusters: emory G OpenP/ilk OpenL/UDA PI/PGAS

3 Real World Architectures G G G G emory G OpenL/UDA PI/PGAS OpenP/ilk

4 Hybrid odes Issues: hard coded problem decomposition lack of coordination among runtime systems No built in support for: portability, auto tuning, load balancing, monitoring, or resilience G G G G 4

5 5 AllScale Vision emory G G G G G Application Unified Parallel Programming odel Toolchain Parallel Algorithm Portability, Tuning, and Resilience ulticore Accelerators lusters Heterogeneous lusters

6 onventional Flat Parallelism How to map flat parallelism to a hierarchical parallel architecture? omplex handling of errors global operations A t=n time time parallelism A t=0 A t=n linear parallel growth parallelism A t=0 A t=n time parallelism A t=0 global barrier

7 Recursively Nested Parallelism time A t=n A t=n/2 A t=0 space Global Synchronisation Local Synchronisation Exponential parallel growth Recursive call

8 Recursive Parallelism recursive task 8

9 Recursive Parallelism Adaptable Task Granularity recursive task 9

10 Recursive Parallelism recursive task fine grained dependencies 10

11 Recursive Parallelism Node Socket Accelerator recursive task aps naturally to multiple levels of HW parallelism 11

12 Recursive Parallelism task versions ultiversioning allows adaption to hardware & system state 12

13 Recursive Parallelism Hardware Entity 1 Hardware Entity 2 Hardware Entity 3 Dynamic load balancing and data migration 13

14 Recursive Parallelism isolated restart failed computation Automatic resilience management 14

15 Objectives Objective 1 Single Source to Any Scale substantial improvement in productivity Objective 2 Exploit Recursive Parallelism foundation of scalability Objective 3 ulti Objective Optimization time, energy, resource usage 16

16 Objectives Objective 4 Unified Runtime System one to rule them all (objects and resources) Objective 5 itigating Hardware Failures let system manage recovery Objective 6 Integrated onitoring runtime system supported online/offline profiling 17

17 omponents Generic Parallel Primitives (++ Template API) Applications User Level API ore API Pilot Applications Single Source User Interface Generic APIs for abstract Algorithm Descriptions Identify & Express Parallelism Standard ++ Toolchain Desktop Hardware API aware highlevel ompiler Unified Runtime System Scheduler Online onitoring and Analysis Small to Extreme Scale Parallel Architectures Resilience anagement ode Generation for Accelerators and Distributed emory Universal Abstract achine odel Dynamic Load, Data and Resource anagement Parallel Hardware Decomposition & Restructuring omputation & Data anagement Development Tuning & Deployment 18

18 Interfaces Generic Parallel Primitives (++ Template API) Applications User Level API ore API Pilot Applications Single Source User Interface Generic APIs for abstract Algorithm Descriptions Identify & Express Parallelism Standard ++ Toolchain Desktop Hardware API aware highlevel ompiler Unified Runtime System Scheduler Online onitoring and Analysis Small to Extreme Scale Parallel Architectures Resilience anagement ode Generation for Accelerators and Distributed emory Universal Abstract achine odel Dynamic Load, Data and Resource anagement Parallel Hardware Decomposition & Restructuring omputation & Data anagement Development Tuning & Deployment 19

19 API Application Groups Applications User Level API Hardware Oblivious ode Abstract Domain Specific Primitives ompiler Group ore API ompiler ompiler Supported Primitives Realization of Primitives 21

20 API Based on ++ templates Widely used industry standard Two Layers: User Level API High level abstractions (e.g. grids, meshes, stencils, channels) Familiar interfaces (e.g. parallel for loops, map reduce) implemented based on ore API Generic function template for recursive parallelism Set of recursive data structure templates Synchronization, control and data flow primitives

21 ompiler ompiler Group ore API ompiler ompiler Supported Primitives Frontend, Analysis and Backend ods Insieme ompiler Toolbox Runtime Groups Runtime Abstract achine odel 26

22 ompiler Analyzesrec primitive usage anddata accesses Generates multiple code versions for each step Sequential Shared memory parallel Distributed memory parallel Accelerator Reports potential issuesto programmer Data dependencies, race conditions, Provides additional information to runtime E.g. type of recursion and data dependencies Improves dynamic optimization potential

23 ompilation AllScale ompiler ode User API ore API Input odes High Level parallel IR High Level parallel IR ++ AST ++ Frontend Template unfolding Semantic Frontend Unified Parallel Representation Analysis Data Requirement Analysis odular Backend Shared emory Shared emory Distributed Distributed emory emory Accelerators Accelerators Resilience /++ 5 Versioning Report ulti Versioned Target ode 6 29

24 Runtime ompiler Group Insieme Runtime Target ode Generation Abstract achine odel Runtime Groups HPX Hardware Execution Infrastructure Execution 30

25 Runtime System Provides an abstract parallel machine as target for compiler generated code anages distributed resources Data locality ommunication & synchronization Accelerators Dynamic load balancing Selects from compiler generated code versions Depending on hardware and execution context Prof. Dietmar Fau Dr. Konstantinos Katrinis Ireland

26 Execution Optimisation Objectives Input ode Actuators 5 Task Handling 4 Steering mds Data Handling Resource Handling 2 ulti Objective Dynamic Optimiser and Scheduler ontinuous Steering Process Distributed Work & Data Entities processed by Resources Processing Architecture ( utilised via: PI / Infiniband / OpenL / UDA / ) 3 6 Sensors Resilience Instructions 1 Events &Data onitoring Sensors 7 Program Events Resilience anager 8 AllScale Runtime System 35

27 AllScale Products AllScale API Parallel ++ Data Structures and Algorithms <implemented by> AllScale Toolchain AllScale Environment ompiler and Runtime System providing Portability, Tuning, and Resilience 36

28 Pilot Applications ipi3d Implicit particle in-cell code for space weather applications KTH AmDaDos Adaptive meshing, data assimilation for dispersion of oils spills IB Research Fine/Open Large Industrial unsteady FD simulations NUEA 39

29 Summary hallenge Explore recursive task parallelism for extreme scale HP AllScale single programming model based on ++ templates main source of parallelism: recursive parallelism single compiler/single runtime system auto tuning, code versioning, fault tolerance, on line monitoring First prototype release by arch 2017 ore information 41

30 AllScale onsortium Ireland

Programming Models for Largescale

Programming Models for Largescale Programming odels for Largescale Parallelism Peter Thoman University of Innsbruck Outline Origin Story State of the Art Well-established APIs and their issues The AllScale Approach What we are working

More information

AllScale Pilots Applications AmDaDos Adaptive Meshing and Data Assimilation for the Deepwater Horizon Oil Spill

AllScale Pilots Applications AmDaDos Adaptive Meshing and Data Assimilation for the Deepwater Horizon Oil Spill This project has received funding from the European Union s Horizon 2020 research and innovation programme under grant agreement No. 671603 An Exascale Programming, Multi-objective Optimisation and Resilience

More information

D4.7 Multi-Objective Dynamic Optimizer (b)

D4.7 Multi-Objective Dynamic Optimizer (b) H2020 FETHPC-1-2014 An Exascale Programming, Multi-objective Optimisation and Resilience Management Environment Based on Nested Recursive Parallelism Project Number 671603 D4.7 Multi-Objective Dynamic

More information

D6.1 AllScale Computing Infrastructure

D6.1 AllScale Computing Infrastructure H2020 FETHPC-1-2014 An Exascale Programming, Multi-objective Optimisation and Resilience Management Environment Based on Nested Recursive Parallelism Project Number 671603 D6.1 AllScale Computing Infrastructure

More information

Energy Efficiency Tuning: READEX. Madhura Kumaraswamy Technische Universität München

Energy Efficiency Tuning: READEX. Madhura Kumaraswamy Technische Universität München Energy Efficiency Tuning: READEX Madhura Kumaraswamy Technische Universität München Project Overview READEX Starting date: 1. September 2015 Duration: 3 years Runtime Exploitation of Application Dynamism

More information

Center Extreme Scale CS Research

Center Extreme Scale CS Research Center Extreme Scale CS Research Center for Compressible Multiphase Turbulence University of Florida Sanjay Ranka Herman Lam Outline 10 6 10 7 10 8 10 9 cores Parallelization and UQ of Rocfun and CMT-Nek

More information

What is DARMA? DARMA is a C++ abstraction layer for asynchronous many-task (AMT) runtimes.

What is DARMA? DARMA is a C++ abstraction layer for asynchronous many-task (AMT) runtimes. DARMA Janine C. Bennett, Jonathan Lifflander, David S. Hollman, Jeremiah Wilke, Hemanth Kolla, Aram Markosyan, Nicole Slattengren, Robert L. Clay (PM) PSAAP-WEST February 22, 2017 Sandia National Laboratories

More information

Reliability Testing In OPNFV. Hao Pang San Francisco 11/09/2015

Reliability Testing In OPNFV. Hao Pang San Francisco 11/09/2015 Reliability Testing In OPNFV Hao Pang (shamrock.pang@huawei.com) San Francisco 11/09/2015 Agenda Overview of reliability Reliability research in OPNFV Introduction of reliability testing Reliability testing

More information

Enabling Seamless Execution on Hybrid. CPU/FPGA Systems: Challenges & Directions

Enabling Seamless Execution on Hybrid. CPU/FPGA Systems: Challenges & Directions Enabling Seamless Execution on Hybrid. PU/PGA Systems: hallenges & Directions Meena Belwal, Madhura Purnaprajna, Sudarshan TSB Department of omputer Science and Engineering, Amrita School of Engineering,

More information

ONOS Roadmap. September, 2017

ONOS Roadmap. September, 2017 ONOS Roadmap September, 2017 distributed core provides high-availability, scalability and performance abstractions & models allow applications to configure and control the network without becoming dependent

More information

ParalleX. A Cure for Scaling Impaired Parallel Applications. Hartmut Kaiser

ParalleX. A Cure for Scaling Impaired Parallel Applications. Hartmut Kaiser ParalleX A Cure for Scaling Impaired Parallel Applications Hartmut Kaiser (hkaiser@cct.lsu.edu) 2 Tianhe-1A 2.566 Petaflops Rmax Heterogeneous Architecture: 14,336 Intel Xeon CPUs 7,168 Nvidia Tesla M2050

More information

A Universal Micro-Server Ecosystem Exceeding the Energy and Performance Scaling Boundaries

A Universal Micro-Server Ecosystem Exceeding the Energy and Performance Scaling Boundaries A Universal Micro-Server Ecosystem Exceeding the Energy and Performance Scaling Boundaries www.uniserver2020.eu UniServer facilitates the advent of IoT solutions through the adoption of a distributed infrastructure

More information

HPX. High Performance ParalleX CCT Tech Talk Series. Hartmut Kaiser

HPX. High Performance ParalleX CCT Tech Talk Series. Hartmut Kaiser HPX High Performance CCT Tech Talk Hartmut Kaiser (hkaiser@cct.lsu.edu) 2 What s HPX? Exemplar runtime system implementation Targeting conventional architectures (Linux based SMPs and clusters) Currently,

More information

SEGRID storyline. Workshop SEGRID November 14 th, 2016, Barcelona, Spain

SEGRID storyline. Workshop SEGRID November 14 th, 2016, Barcelona, Spain Workshop SEGRID November 14 th, 2016, Barcelona, Spain SEGRID storyline This project has received funding from the European Union s Seventh Framework Programme for research, technological development and

More information

* Inter-Cloud Research: Vision

* Inter-Cloud Research: Vision * Inter-Cloud Research: Vision for 2020 Ana Juan Ferrer, ATOS & Cluster Chair Vendor lock-in for existing adopters Issues: Lack of interoperability, regulatory context, SLAs. Inter-Cloud: Hardly automated,

More information

MOC 6232A: Implementing a Microsoft SQL Server 2008 Database

MOC 6232A: Implementing a Microsoft SQL Server 2008 Database MOC 6232A: Implementing a Microsoft SQL Server 2008 Database Course Number: 6232A Course Length: 5 Days Course Overview This course provides students with the knowledge and skills to implement a Microsoft

More information

ELFms industrialisation plans

ELFms industrialisation plans ELFms industrialisation plans CERN openlab workshop 13 June 2005 German Cancio CERN IT/FIO http://cern.ch/elfms ELFms industrialisation plans, 13/6/05 Outline Background What is ELFms Collaboration with

More information

HPX The C++ Standards Library for Concurrency and Parallelism. Hartmut Kaiser

HPX The C++ Standards Library for Concurrency and Parallelism. Hartmut Kaiser HPX The C++ Standards Library for Concurrency and Hartmut Kaiser (hkaiser@cct.lsu.edu) HPX A General Purpose Runtime System The C++ Standards Library for Concurrency and Exposes a coherent and uniform,

More information

In-Network Computing. Paving the Road to Exascale. 5th Annual MVAPICH User Group (MUG) Meeting, August 2017

In-Network Computing. Paving the Road to Exascale. 5th Annual MVAPICH User Group (MUG) Meeting, August 2017 In-Network Computing Paving the Road to Exascale 5th Annual MVAPICH User Group (MUG) Meeting, August 2017 Exponential Data Growth The Need for Intelligent and Faster Interconnect CPU-Centric (Onload) Data-Centric

More information

Model-Driven Optimizations of Component Systems

Model-Driven Optimizations of Component Systems Model-Driven Optimizations of omponent Systems OMG Real-time Workshop July 12, 2006 Krishnakumar Balasubramanian Dr. Douglas. Schmidt {kitty,schmidt}@dre.vanderbilt.edu Institute for Software Integrated

More information

Application Example Running on Top of GPI-Space Integrating D/C

Application Example Running on Top of GPI-Space Integrating D/C Application Example Running on Top of GPI-Space Integrating D/C Tiberiu Rotaru Fraunhofer ITWM This project is funded from the European Union s Horizon 2020 Research and Innovation programme under Grant

More information

A Taxonomy of Task-Based Technologies for High-Performance Computing

A Taxonomy of Task-Based Technologies for High-Performance Computing A Taxonomy of Task-Based Technologies for High-Performance Computing Peter Thoman 1, Khalid Hasanov 2, Kiril Dichev 3, Roman Iakymchuk 4, Xavier Aguilar 4, Philipp Gschwandtner 1, Erwin Laure 4, Herbert

More information

OpenMP tasking model for Ada: safety and correctness

OpenMP tasking model for Ada: safety and correctness www.bsc.es www.cister.isep.ipp.pt OpenMP tasking model for Ada: safety and correctness Sara Royuela, Xavier Martorell, Eduardo Quiñones and Luis Miguel Pinho Vienna (Austria) June 12-16, 2017 Parallel

More information

New Business Opportunities Through Evolved OSS/BSS. SEMAFOUR vision on unified Self-Management

New Business Opportunities Through Evolved OSS/BSS. SEMAFOUR vision on unified Self-Management New Business Opportunities Through Evolved OSS/BSS SEMAFOUR vision on unified Self-Management Luis M Campoy Radio 12.10.2014 01 From SON functionalities to integrated management 01 Why Self-Management?

More information

Platforms Design Challenges with many cores

Platforms Design Challenges with many cores latforms Design hallenges with many cores Raj Yavatkar, Intel Fellow Director, Systems Technology Lab orporate Technology Group 1 Environmental Trends: ell 2 *Other names and brands may be claimed as the

More information

High performance computing and numerical modeling

High performance computing and numerical modeling High performance computing and numerical modeling Volker Springel Plan for my lectures Lecture 1: Collisional and collisionless N-body dynamics Lecture 2: Gravitational force calculation Lecture 3: Basic

More information

This project has received funding from the European Union s Horizon 2020 research and innovation programme under grant agreement No

This project has received funding from the European Union s Horizon 2020 research and innovation programme under grant agreement No This project has received funding from the European Union s Horizon 2020 research and innovation programme under grant agreement No 643921. TOOLS INTEGRATION UnCoVerCPS toolchain Goran Frehse, UGA Xavier

More information

OPERA. Low Power Heterogeneous Architecture for the Next Generation of Smart Infrastructure and Platforms in Industrial and Societal Applications

OPERA. Low Power Heterogeneous Architecture for the Next Generation of Smart Infrastructure and Platforms in Industrial and Societal Applications OPERA Low Power Heterogeneous Architecture for the Next Generation of Smart Infrastructure and Platforms in Industrial and Societal Applications Co-funded by the Horizon 2020 Framework Programme of the

More information

Launching StarlingX. The Journey to Drive Compute to the Edge Pilot Project Supported by the OpenStack

Launching StarlingX. The Journey to Drive Compute to the Edge Pilot Project Supported by the OpenStack Launching StarlingX The Journey to Drive Compute to the Edge Pilot Project Supported by the OpenStack Foundation Ian Jolliffe, WIND RIVER SYSTEMS Director Engineering @ian_jolliffe Project Overview An

More information

INtelligent solutions 2ward the Development of Railway Energy and Asset Management Systems in Europe.

INtelligent solutions 2ward the Development of Railway Energy and Asset Management Systems in Europe. INtelligent solutions 2ward the Development of Railway Energy and Asset Management Systems in Europe. Introduction to IN2DREAMS The predicted growth of transport, especially in European railway infrastructures,

More information

Address new markets with new services

Address new markets with new services Address new markets with new services Programs Deployment Options On-premises Private Cloud Pre-configured Private Cloud Hosted Private Cloud Hyper-V Cloud Deployment Guides Hyper-V Cloud Fast Track Hyper-V

More information

Inside Broker How Broker Leverages the C++ Actor Framework (CAF)

Inside Broker How Broker Leverages the C++ Actor Framework (CAF) Inside Broker How Broker Leverages the C++ Actor Framework (CAF) Dominik Charousset inet RG, Department of Computer Science Hamburg University of Applied Sciences Bro4Pros, February 2017 1 What was Broker

More information

Multigrid Method using OpenMP/MPI Hybrid Parallel Programming Model on Fujitsu FX10

Multigrid Method using OpenMP/MPI Hybrid Parallel Programming Model on Fujitsu FX10 Multigrid Method using OpenMP/MPI Hybrid Parallel Programming Model on Fujitsu FX0 Kengo Nakajima Information Technology enter, The University of Tokyo, Japan November 4 th, 0 Fujitsu Booth S Salt Lake

More information

THE COMPARISON OF PARALLEL SORTING ALGORITHMS IMPLEMENTED ON DIFFERENT HARDWARE PLATFORMS

THE COMPARISON OF PARALLEL SORTING ALGORITHMS IMPLEMENTED ON DIFFERENT HARDWARE PLATFORMS Computer Science 14 (4) 2013 http://dx.doi.org/10.7494/csci.2013.14.4.679 Dominik Żurek Marcin Pietroń Maciej Wielgosz Kazimierz Wiatr THE COMPARISON OF PARALLEL SORTING ALGORITHMS IMPLEMENTED ON DIFFERENT

More information

G-Lab The German Initiative to an Experimentally Driven Future Internet Design Thomas C. Schmidt

G-Lab The German Initiative to an Experimentally Driven Future Internet Design Thomas C. Schmidt HAW Hamburg, Dept. Informatik Internet Technologies Group Prof. Dr. Thomas C. Schmidt G-Lab The German Initiative to an Experimentally Driven Future Internet Design Thomas C. Schmidt schmidt@informatik.haw-hamburg.de

More information

The DEEP (and DEEP-ER) projects

The DEEP (and DEEP-ER) projects The DEEP (and DEEP-ER) projects Estela Suarez - Jülich Supercomputing Centre BDEC for Europe Workshop Barcelona, 28.01.2015 The research leading to these results has received funding from the European

More information

Diving into Parallelization in Modern C++ using HPX

Diving into Parallelization in Modern C++ using HPX Diving into Parallelization in Modern C++ using HPX Thomas Heller, Hartmut Kaiser, John Biddiscombe CERN 2016 May 18, 2016 Computer Architecture Department of Computer This project has received funding

More information

An Introduction to Virtualization and Cloud Technologies to Support Grid Computing

An Introduction to Virtualization and Cloud Technologies to Support Grid Computing New Paradigms: Clouds, Virtualization and Co. EGEE08, Istanbul, September 25, 2008 An Introduction to Virtualization and Cloud Technologies to Support Grid Computing Distributed Systems Architecture Research

More information

Potpuna virtualizacija od servera do desktopa. Saša Hederić Senior Systems Engineer VMware Inc.

Potpuna virtualizacija od servera do desktopa. Saša Hederić Senior Systems Engineer VMware Inc. Potpuna virtualizacija od servera do desktopa Saša Hederić Senior Systems Engineer VMware Inc. VMware ESX: Even More Reliable than a Mainframe! 2 The Problem Where the IT Budget Goes 5% Infrastructure

More information

Accelerate Your Enterprise Private Cloud Initiative

Accelerate Your Enterprise Private Cloud Initiative Cisco Cloud Comprehensive, enterprise cloud enablement services help you realize a secure, agile, and highly automated infrastructure-as-a-service (IaaS) environment for cost-effective, rapid IT service

More information

An Integrated Platform for Increased FLEXIbility in smart TRANSmission grids with STORage Entities and large penetration of Renewable Energy Sources

An Integrated Platform for Increased FLEXIbility in smart TRANSmission grids with STORage Entities and large penetration of Renewable Energy Sources An Integrated Platform for Increased FLEXIbility in smart TRANSmission grids with STORage Entities and large penetration of Renewable Energy Sources Project presentation This project has received funding

More information

Computational Interdisciplinary Modelling High Performance Parallel & Distributed Computing Our Research

Computational Interdisciplinary Modelling High Performance Parallel & Distributed Computing Our Research Insieme Insieme-an Optimization System for OpenMP, MPI and OpenCLPrograms Institute of Computer Science University of Innsbruck Thomas Fahringer, Ivan Grasso, Klaus Kofler, Herbert Jordan, Hans Moritsch,

More information

Enabling Smart Energy as a Service via 5G Mobile Network advances

Enabling Smart Energy as a Service via 5G Mobile Network advances NR 5 Enabling Smart Energy as a Service via 5G Mobile Network advances 5G-PPP Phase 2 at EuCNC Oulu Fiorentino Giampaolo giampaolo.fiorentino@eng.it SCOPE MOTIVATION NR 5 Insights behind... The state of

More information

Designing Parallel Programs. This review was developed from Introduction to Parallel Computing

Designing Parallel Programs. This review was developed from Introduction to Parallel Computing Designing Parallel Programs This review was developed from Introduction to Parallel Computing Author: Blaise Barney, Lawrence Livermore National Laboratory references: https://computing.llnl.gov/tutorials/parallel_comp/#whatis

More information

Enabling Smart Energy as a Service via 5G Mobile Network advances. The Energy as a Service: when the Smart Energy uses the 5G technology

Enabling Smart Energy as a Service via 5G Mobile Network advances. The Energy as a Service: when the Smart Energy uses the 5G technology Enabling Smart Energy as a Service via 5G Mobile Network advances The Energy as a Service: when the Smart Energy uses the 5G technology Ljubljana, 5G PPP Phase 3 Stakeholders Info day October 17 2017 Fiorentino

More information

Exploiting High-Performance Heterogeneous Hardware for Java Programs using Graal

Exploiting High-Performance Heterogeneous Hardware for Java Programs using Graal Exploiting High-Performance Heterogeneous Hardware for Java Programs using Graal James Clarkson ±, Juan Fumero, Michalis Papadimitriou, Foivos S. Zakkak, Christos Kotselidis and Mikel Luján ± Dyson, The

More information

Scalable Shared Memory Programing

Scalable Shared Memory Programing Scalable Shared Memory Programing Marc Snir www.parallel.illinois.edu What is (my definition of) Shared Memory Global name space (global references) Implicit data movement Caching: User gets good memory

More information

From Slicing to Dynamic Resource Control

From Slicing to Dynamic Resource Control From Slicing to Dynamic Resource Control Dirk Trossen* Rui L. Aguiar* Artur Hecker* InterDigital Europe, London, UK Instituto de Telecomunicações / DETI Universidade de Aveiro, Portugal Huawei ERC, Munich,

More information

Towards Exascale Programming Models HPC Summit, Prague Erwin Laure, KTH

Towards Exascale Programming Models HPC Summit, Prague Erwin Laure, KTH Towards Exascale Programming Models HPC Summit, Prague Erwin Laure, KTH 1 Exascale Programming Models With the evolution of HPC architecture towards exascale, new approaches for programming these machines

More information

Intel Array Building Blocks

Intel Array Building Blocks Intel Array Building Blocks Productivity, Performance, and Portability with Intel Parallel Building Blocks Intel SW Products Workshop 2010 CERN openlab 11/29/2010 1 Agenda Legal Information Vision Call

More information

An Integrated Pan-European Research Infrastructure for Validating Smart Grid Systems

An Integrated Pan-European Research Infrastructure for Validating Smart Grid Systems 1 An Integrated Pan-European Research Infrastructure for Validating Smart Grid Systems Thomas Strasser Coordinator H2020 ERIGrid Electric Energy Systems Center for Energy AIT Austrian Institute of Technology

More information

Towards a codelet-based runtime for exascale computing. Chris Lauderdale ET International, Inc.

Towards a codelet-based runtime for exascale computing. Chris Lauderdale ET International, Inc. Towards a codelet-based runtime for exascale computing Chris Lauderdale ET International, Inc. What will be covered Slide 2 of 24 Problems & motivation Codelet runtime overview Codelets & complexes Dealing

More information

Introduction to Parallel Programming Models

Introduction to Parallel Programming Models Introduction to Parallel Programming Models Tim Foley Stanford University Beyond Programmable Shading 1 Overview Introduce three kinds of parallelism Used in visual computing Targeting throughput architectures

More information

Portable Heterogeneous High-Performance Computing via Domain-Specific Virtualization. Dmitry I. Lyakh.

Portable Heterogeneous High-Performance Computing via Domain-Specific Virtualization. Dmitry I. Lyakh. Portable Heterogeneous High-Performance Computing via Domain-Specific Virtualization Dmitry I. Lyakh liakhdi@ornl.gov This research used resources of the Oak Ridge Leadership Computing Facility at the

More information

A Breakthrough in Non-Volatile Memory Technology FUJITSU LIMITED

A Breakthrough in Non-Volatile Memory Technology FUJITSU LIMITED A Breakthrough in Non-Volatile Memory Technology & 0 2018 FUJITSU LIMITED IT needs to accelerate time-to-market Situation: End users and applications need instant access to data to progress faster and

More information

Ewolucja sieci w Data Center

Ewolucja sieci w Data Center Ewolucja sieci w Data Center Czas na wirtualizację sieci za pomocą ware NSX Sławomir Słowiński Account Executive ware Networking and Security 2016 ware Inc. All rights reserved. Focus on the App The goals

More information

Approaches to I/O Scalability Challenges in the ECMWF Forecasting System

Approaches to I/O Scalability Challenges in the ECMWF Forecasting System Approaches to I/O Scalability Challenges in the ECMWF Forecasting System PASC 16, June 9 2016 Florian Rathgeber, Simon Smart, Tiago Quintino, Baudouin Raoult, Stephan Siemen, Peter Bauer Development Section,

More information

HPX. HPX The Futurization of Computing

HPX. HPX The Futurization of Computing The Futurization of Computing Thomas Heller (thomas.heller@cs.fau.de) February 28, 2014 Department Computer Science 3 The Futurization of Computing 2 The Programming Model Towards a C++ compliant Interface

More information

Executive Summary. It is important for a Java Programmer to understand the power and limitations of concurrent programming in Java using threads.

Executive Summary. It is important for a Java Programmer to understand the power and limitations of concurrent programming in Java using threads. Executive Summary. It is important for a Java Programmer to understand the power and limitations of concurrent programming in Java using threads. Poor co-ordination that exists in threads on JVM is bottleneck

More information

Networking for a smarter data center: Getting it right

Networking for a smarter data center: Getting it right IBM Global Technology Services October 2011 Networking for a smarter data center: Getting it right Planning the network needed for a dynamic infrastructure 2 Networking for a smarter data center: Getting

More information

NVIDIA Think about Computing as Heterogeneous One Leo Liao, 1/29/2106, NTU

NVIDIA Think about Computing as Heterogeneous One Leo Liao, 1/29/2106, NTU NVIDIA Think about Computing as Heterogeneous One Leo Liao, 1/29/2106, NTU GPGPU opens the door for co-design HPC, moreover middleware-support embedded system designs to harness the power of GPUaccelerated

More information

Europeana Core Service Platform

Europeana Core Service Platform Europeana Core Service Platform DELIVERABLE D7.1: Strategic Development Plan, Architectural Planning Revision Final Date of submission 30 October 2015 Author(s) Marcin Werla, PSNC Pavel Kats, Europeana

More information

Metal Recovery from Low Grade Ores and Wastes Plus

Metal Recovery from Low Grade Ores and Wastes Plus Metal Recovery from Low Grade Ores and Wastes Plus D7.1 Project and public website Public Authors: Marta Macias, Carlos Leyva (IDENER) D7.1 I Page 2 Deliverable Number 7.1 Deliverable Name Project and

More information

Improving the Practicality of Transactional Memory

Improving the Practicality of Transactional Memory Improving the Practicality of Transactional Memory Woongki Baek Electrical Engineering Stanford University Programming Multiprocessors Multiprocessor systems are now everywhere From embedded to datacenter

More information

TOOLS FOR IMPROVING CROSS-PLATFORM SOFTWARE DEVELOPMENT

TOOLS FOR IMPROVING CROSS-PLATFORM SOFTWARE DEVELOPMENT TOOLS FOR IMPROVING CROSS-PLATFORM SOFTWARE DEVELOPMENT Eric Kelmelis 28 March 2018 OVERVIEW BACKGROUND Evolution of processing hardware CROSS-PLATFORM KERNEL DEVELOPMENT Write once, target multiple hardware

More information

Algorithm and Library Software Design Challenges for Tera, Peta, and Future Exascale Computing

Algorithm and Library Software Design Challenges for Tera, Peta, and Future Exascale Computing Algorithm and Library Software Design Challenges for Tera, Peta, and Future Exascale Computing Bo Kågström Department of Computing Science and High Performance Computing Center North (HPC2N) Umeå University,

More information

Introduction to MATLAB application deployment

Introduction to MATLAB application deployment Introduction to application deployment Antti Löytynoja, Application Engineer 2015 The MathWorks, Inc. 1 Technical Computing with Products Access Explore & Create Share Options: Files Data Software Data

More information

Programming Models for Supercomputing in the Era of Multicore

Programming Models for Supercomputing in the Era of Multicore Programming Models for Supercomputing in the Era of Multicore Marc Snir MULTI-CORE CHALLENGES 1 Moore s Law Reinterpreted Number of cores per chip doubles every two years, while clock speed decreases Need

More information

Autonomous Swarm of Heterogeneous Robots for Border Surveillance

Autonomous Swarm of Heterogeneous Robots for Border Surveillance Autonomous Swarm of Heterogeneous Robots for Border Surveillance This project has received funding from the European Union s Horizon 2020 research and innovation programme under grant agreement No 740593

More information

ON THE SMART GRID SECURITY WITH THE E-BALANCE PROJECT EXAMPLE

ON THE SMART GRID SECURITY WITH THE E-BALANCE PROJECT EXAMPLE This project has received funding from the European Union s Seventh Framework Programme for research, technological development and demonstration under grant agreement no 609132. ON THE SMART GRID SECURITY

More information

Transactional Memory

Transactional Memory Transactional Memory Architectural Support for Practical Parallel Programming The TCC Research Group Computer Systems Lab Stanford University http://tcc.stanford.edu TCC Overview - January 2007 The Era

More information

Experience in Developing Model- Integrated Tools and Technologies for Large-Scale Fault Tolerant Real-Time Embedded Systems

Experience in Developing Model- Integrated Tools and Technologies for Large-Scale Fault Tolerant Real-Time Embedded Systems Institute for Software Integrated Systems Vanderbilt University Experience in Developing Model- Integrated Tools and Technologies for Large-Scale Fault Tolerant Real-Time Embedded Systems Presented by

More information

Virtualizing JBoss Enterprise Middleware with Azul

Virtualizing JBoss Enterprise Middleware with Azul Virtualizing JBoss Enterprise Middleware with Azul Shyam Pillalamarri VP Engineering, Azul Systems Stephen Hess Sr. Director, Product Management, Red Hat June 25, 2010 Agenda Java Virtualization Current

More information

Cloud Programming James Larus Microsoft Research. July 13, 2010

Cloud Programming James Larus Microsoft Research. July 13, 2010 Cloud Programming James Larus Microsoft Research July 13, 2010 New Programming Model, New Problems (and some old, unsolved ones) Concurrency Parallelism Message passing Distribution High availability Performance

More information

CHALLENGES AND DEVELOPMENTS FOR A DATA CENTRIC AND MICROSERVICE BASED INFRASTRUCTURE FOR BIG DATA AND AI

CHALLENGES AND DEVELOPMENTS FOR A DATA CENTRIC AND MICROSERVICE BASED INFRASTRUCTURE FOR BIG DATA AND AI CHALLENGES AND DEVELOPMENTS FOR A DATA CENTRIC AND MICROSERVICE BASED INFRASTRUCTURE FOR BIG DATA AND AI Casper van den Broek, casper.vandenbroek@tno.nl NATO IST 160 specialists meeting, 31-05-2018 CONTENTS

More information

Non-uniform memory access machine or (NUMA) is a system where the memory access time to any region of memory is not the same for all processors.

Non-uniform memory access machine or (NUMA) is a system where the memory access time to any region of memory is not the same for all processors. CS 320 Ch. 17 Parallel Processing Multiple Processor Organization The author makes the statement: "Processors execute programs by executing machine instructions in a sequence one at a time." He also says

More information

Challenges in Developing Highly Reliable HPC systems

Challenges in Developing Highly Reliable HPC systems Dec. 1, 2012 JS International Symopsium on DVLSI Systems 2012 hallenges in Developing Highly Reliable HP systems Koichiro akayama Fujitsu Limited K computer Developed jointly by RIKEN and Fujitsu First

More information

Foundation for Cloud Computing with VMware vsphere 4

Foundation for Cloud Computing with VMware vsphere 4 21 Short Topics in System Administration Jane-Ellen Long, Series Editor Foundation for Cloud Computing with VMware vsphere 4 John Arrasjid, Duncan Epping, and Steve Kaplan Published by the USENIX Association

More information

Framework for Large-scale SDN Experiments via Software Defined Federated Infrastructures

Framework for Large-scale SDN Experiments via Software Defined Federated Infrastructures Framework for Large-scale SDN Experiments via Software Defined Federated Infrastructures Gino Carrozzo and Kostas Pentikousis on behalf of the FP7 FELIX Consortium IETF 93 SDNG eeting Prague, Czech epublic

More information

Software Architecture

Software Architecture Software Architecture Prof. R K Joshi Department of Computer Science and Engineering IIT Bombay What is Architecture? Software Architecture? Is this an Architecture? Is this an Architecture? Is this an

More information

Oracle Solaris Virtualization: From DevOps to Enterprise

Oracle Solaris Virtualization: From DevOps to Enterprise Oracle Solaris Virtualization: From DevOps to Enterprise Duncan Hardie Principal Product Manager Oracle Solaris 17 th November 2015 Oracle Confidential Internal/Restricted/Highly Restricted Safe Harbor

More information

IO virtualization. Michael Kagan Mellanox Technologies

IO virtualization. Michael Kagan Mellanox Technologies IO virtualization Michael Kagan Mellanox Technologies IO Virtualization Mission non-stop s to consumers Flexibility assign IO resources to consumer as needed Agility assignment of IO resources to consumer

More information

From Notebooks to Supercomputers: Tap the Full Potential of Your CUDA Resources with LibGeoDecomp

From Notebooks to Supercomputers: Tap the Full Potential of Your CUDA Resources with LibGeoDecomp From Notebooks to Supercomputers: Tap the Full Potential of Your CUDA Resources with andreas.schaefer@cs.fau.de Friedrich-Alexander-Universität Erlangen-Nürnberg GPU Technology Conference 2013, San José,

More information

Welcome to the 2017 Charm++ Workshop!

Welcome to the 2017 Charm++ Workshop! Welcome to the 2017 Charm++ Workshop! Laxmikant (Sanjay) Kale http://charm.cs.illinois.edu Parallel Programming Laboratory Department of Computer Science University of Illinois at Urbana Champaign 2017

More information

Introduction to CUDA Algoritmi e Calcolo Parallelo. Daniele Loiacono

Introduction to CUDA Algoritmi e Calcolo Parallelo. Daniele Loiacono Introduction to CUDA Algoritmi e Calcolo Parallelo References q This set of slides is mainly based on: " CUDA Technical Training, Dr. Antonino Tumeo, Pacific Northwest National Laboratory " Slide of Applied

More information

Introducing Avaya SDN Fx with FatPipe Networks Next Generation SD-WAN

Introducing Avaya SDN Fx with FatPipe Networks Next Generation SD-WAN Avaya-FatPipe Solution Overview Introducing Avaya SDN Fx with FatPipe Networks Next Generation SD-WAN The Avaya SDN-Fx and FatPipe Networks solution provides a fabric-based SDN architecture for simplicity

More information

A Component Model and Software Architecture for CPS

A Component Model and Software Architecture for CPS A Component Model and Software Architecture for CPS Abhishek Dubey, Gabor Karsai, Nagabhushan Mahadevan ISIS/Vanderbilt University NASA Cooperative Agreement NNX08AY49A Outline Software components for

More information

Optimizing Pulse Secure Access Suite with Pulse Secure Virtual Application Delivery Controller solution

Optimizing Pulse Secure Access Suite with Pulse Secure Virtual Application Delivery Controller solution DATASHEET Optimizing Pulse Secure Access Suite with Pulse Secure Virtual Application Delivery Controller solution Features & Benefits Best-in-class VPN and vadc solutions A single point of access for all

More information

What is Software Architecture

What is Software Architecture What is Software Architecture Is this diagram an architecture? (ATM Software) Control Card Interface Cash Dispenser Keyboard Interface What are ambiguities in the previous diagram? Nature of the elements

More information

DISCERN SGAM Visio Template User Guide

DISCERN SGAM Visio Template User Guide Distributed Intelligence for Cost-Effective and Reliable Distribution Network Operation DISCERN SGAM Visio Template User Guide Author: OFFIS Date: 22.04.2016 www.discern.eu The research leading to these

More information

Deploying VMware Mirage : Tips and Tricks for Success

Deploying VMware Mirage : Tips and Tricks for Success Deploying VMware Mirage : Tips and Tricks for Success Yaniv Weinberg Horizon Mirage Product Specialists Team leader 2014 VMware Inc. All rights reserved. Agenda 1 What is VMware Mirage? 2 What s new in

More information

A WSN middleware for security and localization services

A WSN middleware for security and localization services 1st Italian Workshop on Embedded Systems A WSN middleware for security and localization services Speaker Marco Santic Center of Excellence DEWS University of L'Aquila Italy Overview Introduction Concept

More information

DICE: a Model-Driven DevOps Framework for Big Data

DICE: a Model-Driven DevOps Framework for Big Data DICE: a Model-Driven DevOps Framework for Big Data Giuliano Casale Imperial College London DICE Horizon 2020 Project Grant Agreement no. 644869 http://www.dice-h2020.eu Funded by the Horizon 2020 Framework

More information

<Insert Picture Here> Enterprise Data Management using Grid Technology

<Insert Picture Here> Enterprise Data Management using Grid Technology Enterprise Data using Grid Technology Kriangsak Tiawsirisup Sales Consulting Manager Oracle Corporation (Thailand) 3 Related Data Centre Trends. Service Oriented Architecture Flexibility

More information

Hyper-connected IoE Network Technology

Hyper-connected IoE Network Technology Architecture for Internet of Everything Everywhere Hyper-connected IoE Network Technology 13 th November 2016 ICNRG Taewan You (twyou@etri.re.kr) AETHER@ICNRG-Interim 1 Contents Challenges for IoE Research

More information

Virtual Execution Environments: Opportunities and Challenges

Virtual Execution Environments: Opportunities and Challenges Virtual Execution Environments: Opportunities and Challenges Workshop on the Future of Virtual Execution Environments September 15, 2004 Bob Blainey Chief Java Technologist IBM Software Group blainey@ca.ibm.com

More information

Some aspects of parallel program design. R. Bader (LRZ) G. Hager (RRZE)

Some aspects of parallel program design. R. Bader (LRZ) G. Hager (RRZE) Some aspects of parallel program design R. Bader (LRZ) G. Hager (RRZE) Finding exploitable concurrency Problem analysis 1. Decompose into subproblems perhaps even hierarchy of subproblems that can simultaneously

More information

SmartNet Pilots: The demonstration of the different TSO-DSO coordination schemes and market structures

SmartNet Pilots: The demonstration of the different TSO-DSO coordination schemes and market structures Smart TSO-DSO interaction schemes, market architectures and ICT Solutions for the integration of ancillary services from demand side management and distributed generation The Global Forum Electricity Ancillary

More information

The Cray Rainier System: Integrated Scalar/Vector Computing

The Cray Rainier System: Integrated Scalar/Vector Computing THE SUPERCOMPUTER COMPANY The Cray Rainier System: Integrated Scalar/Vector Computing Per Nyberg 11 th ECMWF Workshop on HPC in Meteorology Topics Current Product Overview Cray Technology Strengths Rainier

More information

Profiling and Debugging OpenCL Applications with ARM Development Tools. October 2014

Profiling and Debugging OpenCL Applications with ARM Development Tools. October 2014 Profiling and Debugging OpenCL Applications with ARM Development Tools October 2014 1 Agenda 1. Introduction to GPU Compute 2. ARM Development Solutions 3. Mali GPU Architecture 4. Using ARM DS-5 Streamline

More information