CORBA Across Embedded Devices

Transcription

1 Embedded Devices Victor Giddings Objective Interface Systems 1

2 Common Object Request Broker Architecture (CORBA) Systems Client Mainline Server Mainline Generated Stub Generated Skeleton ORB library ORB library CORBA Software Bus 2

3 Understanding CORBA Flexibility Location Transparency Without Location Transparency Processor 1Processor 1 Broke Processor 2Processor 2 Protocol Protocol Object X A B X Object Y O.K. (maybe) Object Z With Location Transparency Oops Processor 1Processor 1 Processor 2Processor 2 IDL Interface Object X Object Y Object Z IDL Interface 3

4 Understanding CORBA for Embedded Flexibility Transparent Distributed Communication Location Transparency Distributed application written the same as non-distributed Deployment Flexibility Transport/Media Transparency Heterogeneous Communication Processor, RTOS, Language ORB Shared Memory TCP/IP ORB TCP/IP Reflective Memory VME FireWire 4

5 Interface Definition Language (IDL) is the Key Specifies interfaces to remote objects Part of the CORBA specification Fully Object-Oriented Mapped to modern programming languages Ada 95, C, C++, Java, Smalltalk, OO Cobol... interface Sensor { exception InvalidLimit{}; void SetLimit (in long Lower_Limit, in long Upper_Limit) raises (InvalidLimit); boolean Valid (); //true if within limits readonly attribute long CurrentValue; }; Sensor Client asensor->setlimit(0,212); Sensor (implementation) 5

6 Why CORBA? CORBA removes the need for Low-level Bit Programming Defining a client/server protocol Defining a message format Demarshalling data upon return from call Marshalling of data Preserve investment in software artifacts while changing Processor Operating system Programming language 6

7 CORBA for Embedded Performance 7

8 Why CORBA for embedded? Location Transparency Architectural flexibility because of no-cost relocation High-performance, low-footprint implementations Interoperability with server and enterprise systems Wide Availability Microprocessors, RTOSes, transports DSPs FPGA A/D D/A FPGA DSP GPP ORBexpress ORBexpress ORBexpress 8

9 Why Use DSPs or FPGAs? 1.E+08 1.E+07 1.E+06 High-speed DSP or FPGA Design delivers order-ofmagnitude performance increases 1.E+05 1.E+04 1.E+03 1.E+02 1.E x Performance 100x Performance 10x Performance or wait 10 Years! 1.E

10 CORBA on DSPs Characteristics Challenges Operating environment Compilers and BIOS Footprint optimization Implementation tactics Operating environment not as challenging as expected E.g., TI BIOS is as capable as many RTOSes threads, synchronization, etc. Decomposable features footprint cost limited to features used Avoid language library bloat, e.g., C++ STL C++ native exception processing 10

11 CORBA on DSPs Characteristics Result multiple implementations reporting Small performance overhead Single digit percentage 100x speed up in throughput Less than 100K footprint 11

12 CORBA on DSPs Benefits for DSP Developers DSP developer uses own existing development tools BIOS Compiler Performance benefit with minimal overhead Easy transition of applications from GPP code to DSP code Can be re-compile Optimize to use native library Changing input and output sources does not require changes to DSP code 12

13 CORBA on FPGA Characteristics Challenges What does a firmware ORB do? Stream-oriented data optimization Minimizing gate count Maintaining throughput Results Support dynamic partial reconfiguration of FPGA code Less than 2% of FPGA real-estate for ORB functions Support customization to eliminate unused functionality Process messages at up to 1GByte per second line rate 32-bit data path at 250MHz Support dynamic computational chains 13

14 FPGA Designer Benefits FPGA designer uses own existing development tools for FPGA simulation and netlist generation Performance benefit with minimal overhead Easy conceptual transition of applications from GPP code to FPGA code Changing input and output sources does not require changes to FPGA code 14

15 Why CORBA for embedded? (reprise) Location Transparency Architectural flexibility because of no-cost relocation High-performance, lowfootprint implementations Interoperability with server and enterprise systems Wide Availability Microprocessors, RTOSes, transports DSPs FPGA Location transparency + Choice of General Purpose Processor Digital Signal Processor Field Programmable Gate Array = Technology Transparency 15

16 Technology Transparency 16

17 Technology Transparency System Architect Benefits System architect can migrate functionality among GPP, DSP and FPGA as needed Assignment of functionality does not need to be decided early Functionality can be tested on GPP, then migrated to FPGA as needed, without changing the main application System architect can focus on functionality while ORBexpress provides the necessary interface details for the (GPP, DSP, FPGA) code developer Full technology transparency feasible in a heterogeneous system architecture Future proof To technology change Operating environment migration 17