Generating and Using BCD Files with RVD

Transcription

1 Generating and Using BCD Files with RVD Application Note 142 Released on: January 2007 ARM DAI 0142 C Copyright All rights reserved. 1

2 Generating and Using BCD Files with RVD Application Note 142 Copyright All rights reserved. Release Information Table 1 lists the changes to this document. Table 1 Change history Date Issue Confidentiality Change February 2005 A Non-Confidential First release September 2006 B Non-Confidential Updated for RVDS v3.0 and BCD Generator January 2007 C Non-Confidential Updated for compatibility with InfoCenter Proprietary Notice Words and logos marked with or are registered trademarks or trademarks owned by ARM Limited, except as otherwise stated below in this proprietary notice. Other brands and names mentioned herein may be the trademarks of their respective owners. Neither the whole nor any part of the information contained in, or the product described in, this document may be adapted or reproduced in any material form except with the prior written permission of the copyright holder. The application described in this document is for a product that is subject to continuous developments and improvements. All particulars of the product and its use contained in this document are given by ARM in good faith. However, all warranties implied or expressed, including but not limited to implied warranties of merchantability, or fitness for purpose, are excluded. This document is intended only to assist the reader in the use of the product. ARM Limited shall not be liable for any loss or damage arising from the use of any information in this document, or any error or omission in such information, or any incorrect use of the product. Where the term ARM is used it means ARM or any of its subsidiaries as appropriate. Confidentiality Status This document is Non-Confidential. The right to use, copy and disclose this document may be subject to license restrictions in accordance with the terms of the agreement entered into by ARM and the party that ARM delivered this document to. Product Status The information in this document is final, that is for a developed product. Web Address 2 Copyright All rights reserved. ARM DAI 0142 C

3 1 Introduction This Application Note explains the basic principles of BCD files and gives practical examples of creating new BCD files from scratch. Some familiarity with RVD (RealView Debugger) is assumed. RVISS (RealView Instruction Set Simulator) is used throughout so that no specific target hardware is required to follow the examples. Note If you do not have access to the RVISS, for example if you are using an ARM RVDK (RealView Developer Kit), you can follow the example steps, from Creating and understanding your first BCD file on page 13 onwards, by changing the specified memory map so the dummy peripherals are created in a free area of RAM on your target. The Application Note is intended to be used together with the RVD Target Configuration Guide documentation. Specifically, the following sections: Configuring Custom Targets Appendix A Configuration Settings Reference To create and edit BCD files you can either use RealView Debugger or an Excel based utility called BCD Generator. The BCD Generator utility may be more suitable when you create more complex BCD files from scratch. This utility allows you to load existing BCD files, create new BCD files and provide basic syntax and error checking. This application note provides steps on how to create a BCD file using RealView Debugger but you can easily follow the same steps and use BCD Generator instead. You can download BCD Generator from the technical support area of the ARM website. ARM DAI 0142 C Copyright All rights reserved. 3

4 2 What are BCD files and what do they do? Board Chip Definition (BCD) files are configuration files used by RVD. They are usually associated with multi-ice or RealView ICE (RVI) or RVI-ME connections. They exist as text files with a.bcd extension in the %RVDEBUG_INSTALL%\etc directory. RVD includes sample BCD files for ARM supplied development platforms. BCD files are generally used to perform two main tasks: Provide an enumerated view of registers and peripherals on your target hardware. In RVD this feature is described as Extended Target Visibility (ETV). Describe the memory map of your target and control how RVD behaves when accessing these different areas of memory. The nature of BCD files means that they are target specific. You will need to develop your own BCD to describe the memory map and registers for your target. Figure 1 RVD Process Control and Register panes The screen shot above shows the contents of the RVD Process Control and Register panes when a BCD file is associated with a connection to an ARM development board. The board s memory map can be seen graphically in the Process Control pane Map tab. Different memory types (RAM, ROM, Flash etc) are shown in colour coded blocks. 4 Copyright All rights reserved. ARM DAI 0142 C

5 ETV register definitions are visible as new tabs in the RVD register pane. In this example the control register for Timer 1 is visible. The timer configuration can be changed by direct edits to these fields or by right clicking and selecting enumerated options. This Application Note uses a simulator connection to demonstrate and explain the functionality of BCD files. ARM DAI 0142 C Copyright All rights reserved. 5

6 3 Using existing BCD files In this section we will use the simulator connection to demonstrate the functionality of two BCD files for ARM supplied development boards. The following BCD files are included with a standard RVD install and should be located in the %RVDEBUG_INSTALL%\etc directory. CM7TDMI Contains a description of the memory map and registers available on an ARM Core Module (CM) development board. CP Core Modules can be stacked on top of a motherboard called the ARM Compact Platform (CP baseboard). The baseboard provides extended memory and peripherals. 3.1 Associating BCD files with a connection 1. Open the RVD Connection Control window. Expand the Localhost connection and right click on the new_arm entry. Select Configure. Figure 2 RVD Connection Control Ensure the ARM7TDMI is selected and click OK to close the RVISS configuration window. 2. Highlight the Localhost connection again and right click to open the Connection Properties window. 6 Copyright All rights reserved. ARM DAI 0142 C

7 Figure 3 Connection properties 3. The Connection Properties for the simulator connection are displayed. Highlight the BoardChip name entry and right click as shown. Figure 4 BoardChip name entry 4. Click More.. to view a full list of the options RVD has available. This dialog contains a list of all the BCD files located in the RVD \etc directory. ARM DAI 0142 C Copyright All rights reserved. 7

8 Figure 5 List selection window 5. Select CM7TDMI from the list and click OK. You will see a new BoardChip entry appear in the Connection Properties window. Note It is possible to associate multiple BOARD entries with a single connection. This allows you to break up your system description into convenient blocks if required. For example the ARM Core Module development boards can be used standalone or in association with the CP motherboard. 6. Repeat the process above and select the CP entry. The Connection Control should now look as below. Figure 6 CP entry 8 Copyright All rights reserved. ARM DAI 0142 C

9 7. Save and Close to exit the Connection Properties window. 3.2 Observing the impact of a BCD file in RVD Connect to the simulator and observe the resulting text in the RVD Output Pane CMD tab. You will see something like this: > Advanced_info searched in: BOARD=CM7TDMI, BOARD=CP Using Advanced info based on Processor 'ARM' ARMulator RVARMulatorISS1.4 [Build 297] This shows that RVD has searched two BOARD entries and tested that these entries are appropriate for an ARM7TDMI based connection Memory Map Open the RVD Process Control Pane and select the Map tab. Figure 7 Process Control pane Map tab ARM DAI 0142 C Copyright All rights reserved. 9

10 Various memory blocks are visible. Boot flash is colour coded green and is followed by an area of SDRAM. Various peripheral and control registers definitions follow. Note RVD has explicit support for programming flash memory. Application Note 110: Flash Programming with RVD discusses how to add flash programming support to RVD. It is also possible to see holes in the memory map where no memory block has been explicitly defined. These are marked as having Default Mapping. Examining the contents of memory in a default mapping area will cause RVD to display the memory as inaccessible (using asterisks). It is not possible to modify unassigned memory areas in RVD. This means it is important to define all the areas of your targets memory map you need to access when using a BCD file. A number of options are available in the Map Tab using a right click. Highlight the SDRAM block and select the Edit Map Entry Option. This allows you to make temporary in situ changes to the current memory map. 10 Copyright All rights reserved. ARM DAI 0142 C

11 Figure 8 Edit Map Entry Change the memory type to ROM and click OK. The colour of the second memory block changes to yellow indicating it is now read only. Open an RVD memory window at address 0x100 and try to edit the contents of memory at this address. RVD responds with: Error S10000 (Server): Unable to Write at 0x100 - ROM memory The write fails, even though the underlying memory is RAM, because of the definitions in the BCD file. It is possible to temporarily disable the memory mapping functionality of a BCD by selecting the right click option: Toggle Memory Mapping. If memory mapping is not enabled RVD will ignore any memory attributes described by a BCD file ETV Definitions Open the RVD Register pane. Two new tabs (CM7TDMI and CP) are visible. ARM DAI 0142 C Copyright All rights reserved. 11

12 Figure 9 RVD Register Pane The CP tab gives an enumerated view of various peripheral control registers on the CM7TDMI and CP baseboard. Read-only values are highlighted yellow. For example the status of the configuration DIP switches (S3-S0). Enumerated values can be updated by right clicking and selecting the appropriate option. For example: Right click and set the Remap field to ENABLED. This configures the core modules memory controller and allows different blocks of memory to be aliased to address 0x0. The corresponding view of the memory map (shown in the Map tab) should change to show RAM or Flash at 0x0 as the state of the Remap field is toggled. Every register defined in a BCD file has a symbolic name that can be used to modify the register directly from the RVD CLI (or from a script). Right click on the register of interest and select Properties to see this symbolic name. For example: The status LED's (L0) can be modified from the CLI as follows: 12 Copyright All rights reserved. ARM DAI 0142 C

13 4 Creating and understanding your first BCD file This section describes how to create a new BCD file. We will add functionality to the BCD file throughout the Application Note. 4.1 Creating a new BCD file Open the file blank.bcd in a text editor. You will see there isn't much here. A BCD file will only contain entries which are changes from the default. # blank.bcd This file is an empty template for creating new BCD files. # [BOARD=TEMPLATE] Note The BCD names displayed in RVD when you associate a BCD file with a connection are the BOARD names (for example TEMPLATE), not the name of the file blank.bcd). 1. Use the text editor to change the BOARD name to [BOARD=BCD-DEMO] 2. Save the text file as demo.bcd into the RVD \etc directory. RVD will read in all the files placed into this directory at start up. 4.2 Viewing the BCD file in the RVD GUI 1. Start RVD and ensure you are currently disconnected from the target. 2. Open the Connection Properties window and expand the Board/Chip definitions group in the left pane. You will see a list of all the BCD file names currently installed in the \etc directory including the file demo.bcd you have just created. ARM DAI 0142 C Copyright All rights reserved. 13

14 Figure 10 Demo.bcd 3. Expand demo.bcd and its sub groups BOARD=BCD-DEMO and Advanced_Information. 4. Now highlight the Default group as shown below so that the contents of the group are visible in the right hand pane of the Connection Properties window. Figure 11 Demo.bcd default group 14 Copyright All rights reserved. ARM DAI 0142 C

15 There are a very large number of subfolders and top level configuration options, even though our BCD configuration file is currently empty. This is because the RVD GUI displays all possible configuration options, but only changes from the default state of these options are actually recorded in the BCD file. Although it is possible to configure all these options as part of your BCD file, this Application Note is primarily concerned with the following options relating to the memory map and register definitions. Memory Block Map_Rule Defines your targets memory map (as displayed in the Process Control pane of RVD). Controls the currently displayed memory map. (Some targets have areas of memory which may be remapped to a new location by a system memory controller). Register_enum, Register, Concat _Register, Peripherals, Register_Window Provides ETV features in the RVD register pane. A full description of all the configuration options can be found in the RVD documentation. Specifically: RVD Target Configuration Guide: Appendix A Configuration Settings Reference. Note The same set of configuration options can also be defined as properties of a Connection (for example CONNECTION=RealView-ICE). Care must be taken to avoid conflicts if non default settings are specified in both places. For more information on connection configuration options see Appendix A Avoiding Configuration Conflicts and creating Custom Connections on page Creating a Memory map We are going to assume our target has the following memory map: Boot ROM: 0x0-0x8000 Internal RAM: 0x8000-0x28000 ARM DAI 0142 C Copyright All rights reserved. 15

16 System Registers: 0x x (This area contains memory mapped peripherals). 1. In the RVD Connection Properties window open the Memory Block group. You will see an existing Default entry. Highlight this entry then Right click to select Make Copy. Perform this operation to create the following 3 groups: Boot_ROM, 32bit_Internal_RAM, System_Registers. Figure 12 RVD Connection Properties memory block Boot_ROM Start: 0x0 Length: 0x8000 Access: ROM (selected using right click) Description: System Boot area 32bit_Internal_RAM Start: 0x8000 Length: 0x20000 Access: RAM Description: On chip 32bit RAM System_Registers Start: 0x Length: 0x1000 Access: RAM Description: Memory mapped Peripherals 16 Copyright All rights reserved. ARM DAI 0142 C

17 The Access field defines the type of memory. Supported options (RAM, ROM, Flash and so on) can be selected by right clicking. Different memory types are colour coded in the Process Control Memory Map tab. The attributes of this memory will control debugger access permissions. For example, if an area of memory is set as ROM, write access (for example, using Image Load or direct edits in the memory pane) will be prevented by RVD. Note This will occur even if the underlying memory is writeable. This ability can be used to protect areas of your target, from unwanted accesses. You will notice that any options which have been modified from the default are preceded by asterisks. This applies not only to the individual option, but also to the groups the options belong to. This makes it easier to identify where changes have been made in the RVD GUI. 2. Save and Close to exit the Connection Properties window. Figure 13 Modified Options 3. Open the RVD Connection Control window and highlight the Localhost connection. Right click to display the Connection Properties. 4. Remove both the CP and ARM7TDMI BoardChip entries used in Section 2. (Right Click and select Delete to do this). 5. Add a reference to the new BCD-DEMO board file we have created. ARM DAI 0142 C Copyright All rights reserved. 17

18 Save and Close to exit the Connection Properties window. Figure 14 Add bcd demo 6. Finally connect to the new_arm target (in Localhost) and check the memory map you have defined is visible in the Process Control pane, Map tab. Figure 15 Check memory map is visible 7. Disconnect from the simulator connection before proceeding onto the next section. 4.4 The text syntax of BCD files It is generally recommended that you create and edit BCD files within the RVD GUI. However, an explanation of the syntax used in BCD files helps to explain how the files are used by RVD. Note Direct modification of BCD files using a text editor is possible. This can be very useful when making large block changes, or for find and replace operations. However, care must be taken to preserve the formatting and syntax. 18 Copyright All rights reserved. ARM DAI 0142 C

19 With RVD disconnected from the target, open the file demo.bcd in a text editor. [BOARD=BCD-DEMO] Advanced_Information.default={\ Memory_block.default={}:Memory_block.Boot_ROM={\ start=0x0000:length=0x8000:access=rom:description="system Boot area"\ }:Memory_block.32bit_Internal_RAM={\ start=0x8000:length=0x20000:description="on chip 32bit RAM"\ }:Memory_block.System_Registers={\ start=0x :length=0x1000:description="memory mapped Peripherals"\ }:Map_rule.default={}:Register_enum.default={}:Register.default={\ bit_fields.default={}\ }:Concat_Register.default={}:Peripherals.default={\ Register.default={\ bit_fields.default={}\ }\ }:Register_Window.default={}:ARM_config={}\ } The configuration options that can be specified in a BCD file correspond to the options visible in the GUI. In general only changes to the default values are stored in the BCD file. However defining a memory map causes various other sub groups within the Advanced_Information group to be pulled in. These are currently empty as no changes have been made. This set of groups forms the basic framework of a BCD file. Some general comments on BCD file format: The whole of the Advanced_Information section is a single logical line. For readability, this large section is split over multiple lines using \ as a continuation marker (as the last character on the line). Items inside the Advanced_Information folder are displayed as: groupfolder.groupinstance. For example the area of 32bit RAM we defined within the Memory_Block folder is displayed as: Memory_block.32bit_Internal_RAM Entries are separated by a colon : The entries in a group are enclosed in a matching pair of { } Comments are not supported inside BOARD/CHIP definitions. Extra white space is not allowed ARM DAI 0142 C Copyright All rights reserved. 19

20 5 Adding basic ETV definitions We are now going to add some ETV features to the demo.bcd file we generated in the last section. ETV definitions can be created in either the Register or Peripheral groups of Connection Properties. This is a convenience and allows the writer of the BCD file to define system peripherals and standalone registers separately. However as these groups provide identical functionality all the examples in this application note are created inside the Peripherals group. 5.1 Defining a basic standalone register The following register definition is taken from the datasheet of an ARM development board. LED Register, SYS_LED Use the SYS_LED register at 0x to set the user LEDs. (The LEDs are located next to user switch S6.) Set the corresponding bit to 1 to illuminate the LED. Figure 16 LED register 1. Navigate your way to BCD file Peripherals, Register block and right click to Make Copy of the existing default group. Name this new group BRD_SYS_LED. 2. Inside the new register group add the following information: Right click on the base = absolute option and select System Registers from the list. This will define a base address = 0x Start = 0x8 (offset from base address). Length = 0x1 (length of the register in bytes - set to 1 as the top 3 bytes are reserved). Gui name = LED Status (The name which will be displayed in the debugger). 20 Copyright All rights reserved. ARM DAI 0142 C

21 Figure 17 BRD_SYS_LED base setting Note The default option is for the start address to specify an absolute address: Base = absolute. However it is often more convenient to specify register addresses as an offset from the start of a Peripheral base or memory block. This has the advantage of allowing you to easily change the base location for a group of registers. If you use absolute addresses for your register the address MUST correspond to one of the memory block regions in your BCD file. (Otherwise RVD will assume this area is inaccessible and any attempts to modify the contents will fail). Example: > Error S10000 (Server): Unable to Read at 0x Unassigned memory 5.2 Adding the register to the Register Window Once a register group has been defined you must tell RVD to display this group in the Register window. 1. Navigate to the Register Window Default group and rename the existing group My-Dev-Board. This name will appear as a new tab in the RVD register window. You can create new groups which will add extra tabs in RVD s register window. 2. Open the group, right click on the Line entry and select Edit Value. Enter BRD_SYS_LED. This is the name of the register group we created above. ARM DAI 0142 C Copyright All rights reserved. 21

22 Figure 18 BRD_SYS_LED edit line entry Note Care must be taken to ensure the names used in the GUI field of the register definition and the register window are exactly the same. If they are not you may see warnings such as the one below in the RVD CMD pane when you connect to the target: Warning: Reg-Win 'My-Dev-Board': register not found: 'BRD_SYS_LEDS' 5.3 Reviewing what we have created 1. Save and close the Connection Properties window to exit. 2. Connect to the Localhost new_arm target and check the RVD register window. A new tab should be visible as shown. Figure 19 RVD Register window new tab 22 Copyright All rights reserved. ARM DAI 0142 C

23 Modifications to this number should be reflected at the corresponding address in an RVD memory window. This approach is all right, but we are only interested in viewing the last byte of this register. Displaying the whole register also makes it possible for a user to inadvertently modify the reserved upper 3 bytes. We can remove these problems by using a BCD feature called bit fields. 5.4 Using Bit Fields 1. Disconnect from the target and reopen the Connection Properties Window. Navigate to the Peripherals, Register group BRD_SYS_LED and open the Bit Fields subfolder. 2. Rename the default sub group as B_BRD_SYS_LED. 3. Enter the following information: Position = 0 (Start of the bit field in the 32 bit register) Size = 8 (We wish to show the bottom 8 bits) Gui name = LED Status (The name which will be displayed in the debugger). Figure 20 LED status 4. Modify the Register window entry. Change the existing entry to the Bit field name: Line=B_BRD_SYS_LED so that the bit field group is displayed rather than the previous register group. 5. Save and close the Connection Properties window to exit. ARM DAI 0142 C Copyright All rights reserved. 23

24 6. Connect to the Localhost new_arm target and note the changes. Only the bottom 8 bits are now accessible. 5.5 Viewing the register definition in the text file For reference, the relevant regions of the BCD file are shown in plain text form below. }:Peripherals.default={\ Register.BRD_SYS_LED={\ start=0x0008:length=4:base=system_registers:gui_name="led Status":\ bit_fields.b_brd_sys_led={\ size=8:gui_name="led Status"\ }\ }\ }:Register_Window.My-Dev-Board={\ line="brd_sys_led":line="b_brd_sys_led"\ 24 Copyright All rights reserved. ARM DAI 0142 C

25 6 Enumerations and Display Formatting Using the steps described in the last section we will create a new Peripheral Register block to describe the following DMA peripheral map registers. 6.1 DMA peripheral map registers, SYS_DMAPSRx The DMA map registers, SYS_DMAPSR0 to SYS_DMAPSR3, permit the mapping of DMA channels 0, 1, and 2 to three of the external peripherals. Name Address Access Description Table 2 DMA map registers SYS_DMAPSR0 0x Read/write Controls mapping of external peripheral DMA request and acknowledge signals to DMA channel 0. Table 3 SYS_DMAPSRx, DMA mapping register format Bit Access Description [31:8] - Reserved. Use read-modify-write to preserve value. [7] Read/write Set to 1 to enable mapping of external periphjeral DMA signals to the DMA controller channel. [6:5] - Reserved. Use read-modify-write to preserve value. [4:0] Read/write FPGA peripheral mapped to this channel b00000 = AACI Tx b00001 = AACI Rx b00010 = USB A b00011 = USB B b00100 = MCI 0 b00101 = MCI 1 b00110 = UART3 Tx b00111 = UART3 Rx b01000 = SCI Int A b01001 = SCI Int B b01010 to b11111 Reserved 6.2 Creating a new Peripheral, Register group Navigate your way to BCD file Peripherals, Register block and right click to Make Copy of the default group. Name the new group SYS_DMA_PSR0. ARM DAI 0142 C Copyright All rights reserved. 25

26 Inside the register group add the following information: Start: 0x64 Length: 0x4 Base = System Registers Gui name = DMA Peripheral mapping - channel 0 Figure 21 DMA peripheral mapping 6.3 Enumerations In the previous example (simple LED control register) turning an LED on and off could only be achieved by directly modifying the contents of the register (by entering a hex number). With more complex peripherals it can be useful to assign enumerations to particular bit patterns so users can select from a list of enumerated values. (For example: Enabled/Disabled, On/Off). The following steps create enumeration groups for the example DMA control peripheral. 1. Navigate your way to the BCD file Register_Enum group 2. Make two copies of the default group: E_Enabled_Disabled E_DMA_channel_options 3. For E_Enabled_Disabled add the following entry: names: Enabled=0x1,Disabled=0x0 4. For E_DMA_channel_options enter: names: AACI Tx=0x0,AACI Rx=0x1,USB A=0x2,USB B=0x3,MCI 0=0x4, MCI 1=0x5,UART3 Tx=0x6,UART3 Rx=0x7,SCI int A=0x8,SCI int B=0x9 26 Copyright All rights reserved. ARM DAI 0142 C

27 Figure 22 E_Enabled_Disabled entry 6.4 Create bit field groups For the Peripheral register group SYS_DMA_PSR0 (created above) create new bit field groups as follows: Group name: B_SYS_DMA_PSR0_Enable Position = 7 (Start of the bit field in the 32 bit register) Size =1 Enum = E_Enabled_Disabled (Right click to select from list) Gui name = Channel Enable Group name: B_SYS_DMA_PSR0_FPGA_PERIP Position = 0 (Start of the bit field in the 32 bit register) Size =5 Enum = E_DMA_channel_options (Right click to select from list) Gui name = FPGA peripheral mapped to channel ARM DAI 0142 C Copyright All rights reserved. 27

28 Figure 23 FPGA peripheral mapped to channel 6.5 Displaying the information in the register window Controlling how registers are displayed in the Register Window. 1. Open the Register Window folder and add the following lines to the existing B_BRD_SYS_LED entry: SYS_DMA_PSR0 B_SYS_DMA_PSR0_Enable,B_SYS_DMA_PSR0_FPGA_PERIP The use of comma separation means items will be displayed on a single line in the RVD Register window. 2. Improving formatting You can add plain text to the register window to improve formatting by using a leading underscore. You can also use the reserved symbol $+. A group immediately following this symbol will initially appear collapsed (so only the title is visible.) It can then be expanded if required to show the contents. Add the following entries: _My Development Board _(used as a spacer). _DMA Channel Settings _ (used as a spacer). $+ (used to create a collapsible group). $- (used to end a collapsible group). 28 Copyright All rights reserved. ARM DAI 0142 C

29 Figure 24 Add entries Right click and select the Manage List dialog. Use this menu to change the order of items in the list as shown. Figure 25 Manage list dialog Note For large BCD files this process can be very cumbersome and it is often easier to make changes directly in a text editor. 6.6 Checking the results Save and close the connection Properties window. Connect to the Localhost connection. The register pane should now have a new tab showing your register window entries. ARM DAI 0142 C Copyright All rights reserved. 29

30 The contents of the text file demo.bcd are displayed below: Figure 26 Checking Register window entries [BOARD=BCD-DEMO] Advanced_Information.default={\ Memory_block.default={}:Memory_block.Boot_ROM={\ start=0x0000:length=0x8000:access=rom:description="system Boot area"\ }:Memory_block.32bit_Internal_RAM={\ start=0x8000:length=0x20000:description="on chip 32bit RAM"\ }:Memory_block.System_Registers={\ start=0x :length=0x1000:description="memory mapped Peripherals"\ }:Map_rule.default={}:Register_enum.default={}:Register_enum.E_Enabled_Dis abled={\ names="enabled=0x1,disabled=0x0"\ }:Register_enum.E_DMA_channel_options={\ names="aaci Tx=0x0, AACI Rx=0x1, USB A=0x2, USB B=0x3, MCI 0=0x4,"\ }:Register.default={\ bit_fields.default={}\ }:Concat_Register.default={}:Peripherals.default={\ Register.BRD_SYS_LED={\ bit_fields.b_brd_sys_led={\ size=8:gui_name="led Status"\ }\ }:Register.SYS_DMA_PSR0={\ start=0x0064:length=4:base=system_registers:\ gui_name="dma Peripheral mapping - channel 0":bit_fields.B_SYS_DMA_PSR0_Enable={\ position=7:enum=e_enabled_disabled:gui_name="channel Enable"\ }:bit_fields.b_sys_dma_psr0_fpga_perip={\ size=5:enum=e_dma_channel_options:gui_name="fpga peripheral mapped to channel"\ }\ }:Register.default={\ 30 Copyright All rights reserved. ARM DAI 0142 C

31 bit_fields.default={}\ }\ }:Register_Window.My-Dev-Board={\ line="_my Development Board":line="_":line="B_BRD_SYS_LED":line="_":line="$+":\ line="_dma Channel Settings":line="SYS_DMA_PSR0":\ line="b_sys_dma_psr0_enable,b_sys_dma_psr0_fpga_perip"\ }:ARM_config={}\ } ARM DAI 0142 C Copyright All rights reserved. 31

32 7 Working with Conditional Memory Many targets have a system memory controller which supports remapping of blocks of memory. BCD files allow this remap condition to be recognised (when the remap state can be determined by reading a memory mapped register) and the resulting debugger memory map adjusted to match. The following register definition describes an example control register which provides a remap facility. Core Module Control, CM_CTRL The Core Module and LCD Control Register (CM_CTRL) at 0x C is a read/write register that controls a number of user-configurable features of the core module and the display interface on the baseboard. Figure 27 and Table 4 describe the Core Module Register bits. Figure 27 Core Module Control Register Table 4 CM_CTRL Register Bits Name Access Function [2] REMAP Read/Write 0 = Flash at address 0 1 = SRAM at address 0. For this example, we will assume that: Clearing bit2 (CM_CTRL = 0) will generate the following memory map 0x0000-0x8000 Boot_ROM 0x8000-0x bit_RAM Setting bit2 (CM_CTRL = 1) will generate the following memory map 0x0000-0x bit_RAM_block1_alias 0x8000-0x bit_RAM 32 Copyright All rights reserved. ARM DAI 0142 C

33 That is, the first 32K of our RAM (block1) may be aliased to address 0x0 by setting the remap bit in the control register. 7.1 Creating a new Memory Block Open the Connection Properties window and navigate to the Memory_block folder for the demo.bcd file. Right click on the existing Default entry and Select Make Copy to create a new group called: 32bit_RAM_block1_alias Inside the group add the following information: Start: 0x0 Length: 0x8000 Access: RAM Description: Alias of On chip 32bit RAM (block1) Figure 28 Alias of on-chip 32-bit RAM 7.2 Create a Peripheral definition for the Control Register. Navigate to the Peripherals, Register group and right click on the existing Default entry. Select Make Copy to create a new group called: CM_CTRL Inside the group add the following information: Start: 0xC Length: 0x4 Base = System Registers Gui name = Core Module control register ARM DAI 0142 C Copyright All rights reserved. 33

34 Figure 29 Core Module control register Inside the Peripheral, Register group CM_CTRL (created above) open the Bit_fields group. Right click on the existing Default entry and select Make Copy to create a new bit field group called: B_Remap_Enable Inside the group add the following information: Position = 2 (Start of the bit field in the 32 bit register) Size = 1 Enum = E_Enabled_Disabled (Right click to select from list) GUI name = Remap Control 7.3 Creating Map Rule entries We need to create two remap groups to control whether ROM or flash appears at address 0x0. Navigate to the Map rule folder and right click on the existing Default entry. Select Make Copy and create two new groups called: Remap_RAM_block1, Remap_ROM. Inside the Remap_RAM_block1 group add the following information: Register: CM_CTRL (right click to select) Mask: 0x4 (Mask off all bits except bit2) Value: 0x4 (RAM alias enabled when this bit is set) On equal: 32bit_RAM_block1_alias (right click to select - this is the Memory block to enable when condition true). Inside the Remap_ROM group add the following information: Register: CM_CTRL (right click to select) Mask: 0x4 (Mask off all bits except bit2) Value: 0x0 (ROM at 0x0 when remap disabled) 34 Copyright All rights reserved. ARM DAI 0142 C

35 On equal: Boot_ROM (right click to select - this is the Memory block to enable when condition true). 7.4 Displaying the information in the Register Window Open the Register Window folder and add the following lines to the existing entries. _(used as a spacer). B_Remap_Enable Use the Manage List function to order the entries as shown. Figure 30 Manage list to order entries 7.5 Checking the results Use Save and Close to exit the Connection Properties window. Connect to the Localhost connection. The Register pane ETV tab and the Process Control should appear as below. By right clicking on the Remap Control field it is possible to enable or disable memory remap. The memory map should change to reflect the current status of the remap bit. ARM DAI 0142 C Copyright All rights reserved. 35

36 Figure 31 Remap control enabled Figure 32 Remap control disabled 36 Copyright All rights reserved. ARM DAI 0142 C

37 8 Using Multiple BOARD/CHIP definitions As demonstrated in What are BCD files and what do they do? on page 4 it is possible to associate more than one BCD file with a connection. This is often convenient where the hardware target consists of a common motherboard with numerous daughter boards containing different peripherals. 8.1 BOARD and CHIP groups RVD allows the creation of BOARD or CHIP groups inside a BCD file. These groups offer identical configuration options. They are simply provided as a convenience to help distinguish between chip specific and board specific features. For example, the ARM Evaluator 7T development board was manufactured with two different ARM7TDMI based micro controllers. (The KS32C50100 and SC34510B). To support this the corresponding Eval7T BCD file was created with a common BOARD group and two CHIP sub groups. These groups can be defined in a single BCD file or in separate ones (as shown in the example below). Note The BOARD definition automatically includes the CHIP definition by populating the BoardChip_name field. [BOARD=Evaluator7T] description="arm Evaluator'7T" boardchip_name=ks32c50100 Eval7T.bcd [CHIP=KS32C50100] Advanced_Information.default={\ Memory_block.System={\ start=0x3ff0000:length=0x10000:description="system Special Registers":\ Samsung-KS32.bcd 8.2 Matching BOARD or CHIP groups with a Connection By default BCD files are created with a default Advanced_Information.default group. This means that the settings in the BCD file will be applied when connected to any processor. However it is possible to rename this group so that the BCD file will only be associated with a specific processor or range of processors. This can be particularly helpful in multi-core systems. ARM DAI 0142 C Copyright All rights reserved. 37

38 Note This functionality is only provided for RVI or Multi-ICE connections and cannot be demonstrated with the simulator connection. An extract from an example BCD file used with a multi core SoC is shown below. # multicore.bcd example of a BCD file for a multi-core system. # [BOARD=My_multi-core_SOC] Advanced_Information.default={\ Memory_block.default={}:Memory_block.Shared_RAM={\ start=0x :length=0x1000:description="shared Memory"\ }:Map_rule.default={}:Register_enum.default={}:Register.default={\ bit_fields.default={}\ }:Concat_Register.default={}:Peripherals.default={\ Register.default={\ bit_fields.default={}\ }\ }:Register_Window.default={}:Register_Window.Common={\ line="_registers common to both chips":line="_in a multi-core system"\ }:ARM_config={}\ } boardchip_name=my_arm9 boardchip_name=my_arm7 [CHIP=My_ARM7] Advanced_Information.ARM7={\ Memory_block.default={}:Memory_block.RAM_ARM7={\ start=0x7000:length=0x1000:description="arm7 local memory"\ }:Map_rule.default={}:Register_enum.default={}:Register.default={\ bit_fields.default={}\ }:Concat_Register.default={}:Peripherals.default={\ Register.default={\ bit_fields.default={}\ }\ }:Register_Window.default={}:Register_Window.My_ARM7={\ line="_contains registers specific to ARM7"\ }:ARM_config={}\ } [CHIP=My_ARM9] Advanced_Information.ARM9={\ Memory_block.default={}:Memory_block.RAM_ARM9={\ start=0x9000:length=0x1000:description="arm9 local memory"\ }:Map_rule.default={}:Register_enum.default={}:Register.default={\ bit_fields.default={}\ }:Concat_Register.default={}:Peripherals.default={\ Register.default={\ 38 Copyright All rights reserved. ARM DAI 0142 C

39 bit_fields.default={}\ }\ }:Register_Window.default={}:Register_Window.My_ARM9={\ line="_contains registers specific to ARM9"\ }:ARM_config={}\ } This SoC contains an ARM7TDMI and an ARM926EJ-S. Some memory areas have been defined local to each chip and a shared memory area has been defined higher up in memory. When this BCD file is associated with a connection only the information relevant to the current connection will be displayed. When connected to the ARM7TDMI Figure 33 Connected to the ARM7TDMI When connected to the ARM926EJ-S Figure 34 Connected to the ARM926EJ-S ARM DAI 0142 C Copyright All rights reserved. 39

40 9 Appendix A Avoiding Configuration Conflicts and creating Custom Connections The group of connection configuration options discussed in Viewing the BCD file in the RVD GUI on page 13 can be defined in two places: Directly in the properties of a connection (example: CONNECTION=RealView-ICE) Indirectly by associating a BCD file with a connection If you modify the same configuration option in both these places it is possible to produce conflicts. For example, BCD file specifies little endian memory system, Connection Properties specifies big endian). If this happens the resultant debugger configuration is undefined. When using BCD files care must be taken to avoid conflicts with settings defined in a connection. The most reliable way to do this is to create your own custom connection for use with the BCD file which has a default configuration. (Or a configuration where the only changes are known not to conflict with settings in the BCD file). 9.1 Creating a Custom connection 1. Open the Connection Control window in RVD. 2. From the File menu select Create New Configuration Figure 35 Create new configuration 40 Copyright All rights reserved. ARM DAI 0142 C

41 3. Give the new Connection a suitable name. For example, My_new_connection. (Do not use spaces). 4. Select your RVI connection from the New configuration dropdown list. Figure 36 Select RVI connection 5. From the RVD Connection Control Window expand the new My_new_connection connection. RVD will display the following prompt. 6. Select Configure Device Information... and click OK. Figure 37 Select configure device information Figure 38 Select empty 7. Select Empty. When prompted, save the file myrvi.rvc to a suitable location. ARM DAI 0142 C Copyright All rights reserved. 41

42 Creating this new connection has added the following lines to the rvdebug.brd file located in the RVD home directory. (example:c:\program Files\ARM\RVD\Core\3.0.1\###\win_32-pentium\home\usrname). [CONNECTION=My-RVI] connect_with.manufacturer=arm-arm-nw description="arm RealView ICE JTAG debug interface" configuration="c:\program Files\ARM\My-RVI.rvc" This new custom connection can be passed to other users by: Inserting the text above into the rvdebug.brd file Placing the.rvc configuration file in the specified location. 42 Copyright All rights reserved. ARM DAI 0142 C

43 10 Appendix B Hints, Tips & Troubleshooting Why do I see multiple copies of a connection in RVD? When you are connected to a target RVD keeps a cached copy of the configuration options associated with the connection in memory. If you make changes to the Connection Properties while you are connected: Your changes may not be respected Duplicate copies of the connection route will appear in the Connection Control Pane. Disconnect and reconnect to the target to remove the duplicate group and ensure any changes you have made are applied. Using the RVD Output Pane messages to debug BCD files problems When you connect to a target messages will be displayed in the RVD Cmd and Log tabs showing information about the connection process and any errors that have occurred. This information can be useful when debugging new BCD files. > connect 10 Advanced_info searched in: BOARD=My_multi-core_SOC, CHIP=My_ARM7, CHIP=My_ARM9 Using Advanced info based on Processor 'ARM' Using Advanced info based on 'Default' or 'All' Mode: Little Endian Where are BCD files stored? BCD files are normally stored in the RVD %RVDEBUG_INSTALL%\etc directory. However, they can also be placed in the %RVDEBUG_INSTALL%\home directory. Any BOARD/CHIP definitions contained in any BCD files placed in these directories will be read in RVD at start-up. Spotting configuration groups which contain non default Information The large number of configuration groups available in a BCD file can make it difficult to identify which groups contain new non default information. RVD will prefix any configuration group that contains non default information with an asterisk (*) to indicate a change from the default. Problems accessing memory on the target ARM DAI 0142 C Copyright All rights reserved. 43

44 BCD files can be used to control access permissions to memory. If you are unable to load an image or modify memory on your target, this may be caused by an error in the BCD file memory map. The BCD memory map can be temporarily disabled by right clicking in the Process Control Pane Map tab and selecting the Toggle Memory Mapping option. Displaying ETV Information in the RVD Register window Great care must be taken to ensure the names used for the register groups and the names used to identify these groups for display in the register window are exactly the same. If the entries do not match you may see warnings (such as the one below) in the RVD CMD pane when you connect to the target: Warning: Reg-Win 'My-Dev-Board': register not found: 'BRD_SYS_LEDS' Register and Peripheral definitions must be assigned to a defined memory area The absolute address of any register or peripheral definition MUST correspond to one of the memory block regions in your BCD file. Any attempt to access a register not in a defined memory block will generate errors. Example: > Error S10000 (Server): Unable to Read at 0x Unassigned memory Editing BCD files directly in a text editor Using this method can be much quicker than making changes using the RVD GUI. However the syntax and format of BCD files is strict and not particularly easy to read. It is advisable to make a back up copy of the BCD file before making changes in a text editor. Why does RVD change the format / layout of files I create in a text editor? RVD restricts the number of characters allowed on each line of a BCD file. If you have created a BCD file in a text editor, modifying this BCD file in the RVD GUI may change the formatting of your text file and insert line continuation separators. 44 Copyright All rights reserved. ARM DAI 0142 C