GRAPHICS CONTROLLERS DEVICE SETUP AND FUJITSU DEVELOPER SUITE

Transcription

1 Fujitsu Semiconductor Europe Application Note an-mb88f33x-device-setup-rev1.0 GRAPHICS CONTROLLERS MB88F33X 'INDIGO2(-X)' DEVICE SETUP AND FUJITSU DEVELOPER SUITE REV1.0 APPLICATION NOTE GRAPHICS COMPETENCE CENTER

2 Revision History Revision History Date Issue Rev1.0 GCC/HA First draft. New layout, minor corrections, improved description This document contains 11 pages. an-mb88f33x-device-setup-rev Fujitsu Semiconductor Europe GmbH

3 Warranty and Disclaimer Warranty and Disclaimer The use of the deliverables (e.g. software, application examples, target boards, evaluation boards, starter kits, schematics, engineering samples of IC s etc.) is subject to the conditions of Fujitsu Semiconductor Europe GmbH ( FSEU ) as set out in (i) the terms of the License Agreement and/or the Sale and Purchase Agreement under which agreements the Product has been delivered, (ii) the technical descriptions and (iii) all accompanying written materials. Please note that the deliverables are intended for and must only be used for reference in an evaluation laboratory environment. The software deliverables are provided on an as-is basis without charge and are subject to alterations. It is the user s obligation to fully test the software in its environment and to ensure proper functionality, qualification and compliance with component specifications. Regarding hardware deliverables, FSEU warrants that they will be free from defects in material and workmanship under use and service as specified in the accompanying written materials for a duration of 1 year from the date of receipt by the customer. Should a hardware deliverable turn out to be defect, FSEU s entire liability and the customer s exclusive remedy shall be, at FSEU s sole discretion, either return of the purchase price and the license fee, or replacement of the hardware deliverable or parts thereof, if the deliverable is returned to FSEU in original packing and without further defects resulting from the customer s use or the transport. However, this warranty is excluded if the defect has resulted from an accident not attributable to FSEU, or abuse or misapplication attributable to the customer or any other third party not relating to FSEU or to unauthorised decompiling and/or reverse engineering and/or disassembling. FSEU does not warrant that the deliverables do not infringe any third party intellectual property right (IPR). In the event that the deliverables infringe a third party IPR it is the sole responsibility of the customer to obtain necessary licenses to continue the usage of the deliverable. In the event the software deliverables include the use of open source components, the provisions of the governing open source license agreement shall apply with respect to such software deliverables. To the maximum extent permitted by applicable law FSEU disclaims all other warranties, whether express or implied, in particular, but not limited to, warranties of merchantability and fitness for a particular purpose for which the deliverables are not designated. To the maximum extent permitted by applicable law, FSEU s liability is restricted to intention and gross negligence. FSEU is not liable for consequential damages. Should one of the above stipulations be or become invalid and/or unenforceable, the remaining stipulations shall stay in full effect. The contents of this document are subject to change without a prior notice, thus contact FSEU about the latest one. Should one of the above stipulations be or become invalid and/or unenforceable, the remaining stipulations shall stay in full effect Fujitsu Semiconductor Europe GmbH an-mb88f33x-device-setup-rev1.0

4 Contents Contents REVISION HISTORY... 2 WARRANTY AND DISCLAIMER... 3 CONTENTS INTRODUCTION EMPTY DEVICE Setting-up the Device LOCK / UNLOCK REGISTERS VS. ONE-TIME PROGRAMMING... 7 Write Once Register FUJITSU DEVELOPER SUITE (FDS) Initialization Sequence Register Sequence Execution Modes Default, Independent Mode Command List / Command Sequencer Mode SETUP EXAMPLE an-mb88f33x-device-setup-rev Fujitsu Semiconductor Europe GmbH

5 Chapter 1 Introduction 1 Introduction This application note describes the basic setup of MB88F33x's family devices. It also covers the differences in the device setup as long as the Fujitsu Developer Suite (FDS) is used for debugging purposes. Scope of this document is not only to have the device setup properly for later production usage, but also to understand the different modes and limitations that occur depending on the selected configuration. Fujitsu Semiconductor Europe GmbH an-mb88f33x-device-setup-rev1.0

6 Chapter 2 Empty Device 2 Empty Device When receiving an MB88F33x Indigo2 device from Fujitsu Semiconductor, the flash is usually empty. (For pre-flashed devices please contact Fujitsu Semiconductor local sales representatives). 2.1 Setting-up the Device Via bootstrap pins, the device can be booted in different modes. Depending on the selected configuration data from the flash (a so-called command sequence) will be executed. Therefore, the device can behave differently depending on the flash content. For bootstrap configuration, please refer to the corresponding chapter in the hardware manual, but the most important options are: Disable Command Sequencer. The device will do nothing, just start-up with default values and minimized clock setup. Not all functional blocks are powered-on or enabled. Command Sequencer starts command sequence (aka start-up-sequence, boot sequence) from the internal flash. This is probably the most common mode, as it allows freely defining of the device behavior after power-up. After selecting a suitable bootstrap configuration, a corresponding command sequence has to be generated for the application. It is recommended to use the Fujitsu Developer Suite for that purpose, as it allows debugging of the configuration and, finally, it can create the needed binary code out of the existing register sequence. an-mb88f33x-device-setup-rev Fujitsu Semiconductor Europe GmbH

7 Chapter 3 Lock / Unlock Registers vs. One-time Programming 3 Lock / Unlock Registers vs. One-time Programming Several registers in the Indigo2 family are protected by a more global lock/unlock mechanism. This feature is implemented to additionally protect sensitive functions, i.e., the Signature Unit. A programmed CRC value within the signature unit can be locked via additional register writing (a magic needs to be written) so that the CRC values afterwards could not be changed accidentally by, i.e., a wrong write access. After unlocking the register again (different magic), it can be reconfigured. Contrary to the global lock/unlock mechanism, some settings can only be done once (usually while starting up the device), as they are even more critical. This applies to, i.e., the setting of the multiplex of the pins (e.g. GPIO), to avoid possible issues on HW-level afterwards. Please refer to the table below for details: Functional Block Chip Global Control IRIS Global Control IRIS Signature Unit 0 IRIS Signature Unit 1 IRIS Signature Unit 2 IRIS Signature Unit 3 IRIS Frame Generator Ethernet MAC (E2IP) Protected Address Range 0x0000_0018-0x0000_0568 0x0003_0008-0x0003_001C 0x0003_5008-0x0003_5070 0x0003_5408-0x0003_5470 0x0003_5808-0x0003_5870 0x0003_5C08-0x0003_5C70 0x0003_3408-0x0003_3490 0x0002_3008-0x0002_30B8 Table 3-1 Overview register protection Lock/Unlock register LockUnlock (0x0000_0010) LockUnlock (0x0003_0000) SigLockUnlock (0x0003_5000) SigLockUnlock (0x0003_5400) SigLockUnlock (0x0003_5800) SigLockUnlock (0x0003_5C00) LockUnlock (0x0003_3400) LOCK (0x0002_3000) Lock/Unlock status register LockStatus (0x0000_0014) LockStatus (0x0003_0004) SigLockStatus (0x0003_5004) SigLockStatus (0x0003_5404) SigLockStatus (0x0003_5804) SigLockStatus (0x0003_5C04) LockStatus (0x0003_3404) LOCK_STAT (0x0002_3004) Unlock value 0x69B3_09B8 0x803F_D2DA 0x1F24_A7A4 0x1F24_A7A4 0x1F24_A7A4 0x1F24_A7A4 0xB4AC_332B 0xC0CA_C01A Lock value 0xA82B_E775 0x7863_1639 0xAC0B_1F35 0xAC0B_1F35 0xAC0B_1F35 0xAC0B_1F35 0xD1A3_75FB 0x1FED_BEEF Write Once Register Functional block GPIO Register PPER0 Low (0x000A_8380) PPER0 High (0x000A_8384) PPER1 Low (0x000A_8388) PPER1 High (0x000A_838C) Internal Flash Control TCFCFG_FECCCTRL (0x0002_D010) Fujitsu Semiconductor Europe GmbH an-mb88f33x-device-setup-rev1.0

8 Chapter 3 Lock / Unlock Registers vs. One-time Programming Please have in mind that a device, which already executed a command/boot sequence, is pre-initialized. That means, that it may have limited option for debugging already (i.e., GPIO may not be reconfigured any more for testing purposes). Please be also aware that while debugging, certain limitations can occur depending on the used registers and the applied modifications. IMPORTANT NOTE: When using the Host Interface (Aardvark 1) device and Fujitsu Developer Suite) an incorrect access to a protected register will cause the Host Interface to be locked in order to prohibit further communication for safety reasons. In this scenario, the device needs to be re-powered/reset again. This is due to the fact that in production environment, a prohibited access must be avoided anyway. The user should be aware of this improper usage in the development and debugging processes. 1) The Aardvark SPI Host Adapter is a product of Total Phase, Inc. For more information, please visit an-mb88f33x-device-setup-rev Fujitsu Semiconductor Europe GmbH

9 Chapter 4 Fujitsu Developer Suite (FDS) 4 Fujitsu Developer Suite (FDS) The Fujitsu Developer Suite is a sophisticated development and debugging tool. To have the full benefit of the FDS some preconditions have to be taken into account. 4.1 Initialization Sequence By default the tool needs to automatically setup certain registers to have full access to the complete device. So when connecting to the target device an initialization sequence will be performed. For the Indigo2 device this startup-sequence can be found in the following subdirectory of the FDS main installation directory, \user\indigo2\sequence\samples\startupsequence.gdcseq This may imply that debugging behaves differently compared to the stand-alone operation of the device. For testing customer developed start-up code or specific command sequences, it is recommended to disable this automatic initialization on connection. This can be done in the following way: Disconnect from the current device or ensure being disconnected. Enable the following item, which can be found in the Settings menu of the Fujitsu Developer Suite menu bar: Suppress Default Chip Initialization on Connection when possible Now, all new established connections will be performed without the default chip initialization. But please, keep in mind that it is possible that not all registers can be accessed due to missing unlock commands or similar initialization actions. Nevertheless, it is always possible to return to the standard FDS behaviour, when disabling the upper mentioned menu item. 4.2 Register Sequence Execution Modes For the Indigo2 device, the Fujitsu Developer Suite supports two different modes of executing register sequences. Depending on the mode the behaviour can be different Default, Independent Mode This mode is the standard mode which accesses the registers directly, as they are listed in the sequence. Each sequence item action will be performed separately and at once, depending on the speed and behaviour of the current connection type (i.e., SPI, Ethernet). On transmission error, the sequence will be stopped immediately, while on success, the sequence will be performed until finished. For executing the register sequence in this mode, please ensure that the Sequence Execution Mode is set to Default, Independent. Fujitsu Semiconductor Europe GmbH an-mb88f33x-device-setup-rev1.0

10 Chapter 4 Fujitsu Developer Suite (FDS) Command List / Command Sequencer Mode This mode is a chip specific mode. All sequence items will be internally converted into real command sequencer code. Then, the complete command stream will automatically being copied into the SRAM memory of the Indigo2. Finally, the Command Sequencer will be set up to execute the complete sequence at once. When this mode is selected, additional command sequence macros that are directly supported by the Indigo2 Command Sequencer will be offered as register sequence items. But please, keep in mind that those chip specific macros can only be executed in this mode. For details, please refer to Indigo2 Specific Elements section in the Fujitsu Developer Suite User Manual, chapter Register Sequencer. For executing the register sequence in this mode, please ensure that the Sequence Execution Mode is set to Indigo2, Command List. Remark: This execution mode is typically needed by customers for testing real chip behaviour. Furthermore, it can be used for converting existing register sequences into real command sequence code and storing it as.bin file as preparation for flashing it into memory. an-mb88f33x-device-setup-rev Fujitsu Semiconductor Europe GmbH

11 Chapter 5 Setup Example 5 Setup Example The following steps are exemplary for a setup sequence. It might differ depending on the use case. Please refer to the respective scripts (.par files) attached to this document. 1. Clock setup for the system and the peripheral units (1_system_clocks_setup.par) 2. Pinmux setup for 18-bit TTL-panel + GPIO (2_pinmux_setup.par) 3. Panel setup for 800x480@18-bit TTL-panel (3_panel_setup.par) 4. APIX setup for APIX2 mode 1Gbit (down sideband), Ethernet (10Mbit) and AShell enabled (4_apix_setup.par) 5. Iris-MVL setup for display of APIX stream on panel and fallback of memory stream (5_iris_setup.par) 6. Unlock script for all registers (x_unlocksequence_for_debug.par). If steps 1 to 5 are programmed in the same sequence as shown above, the system should start without any problems. The.par files handle the lock/unlock mechanism independently. The default init sequence must be suppressed in the Fujitsu Developer Suite. If afterwards the Fujitsu Developer Suite is used, the script x_unlocksequence_for_debug.par should be executed. Fujitsu Semiconductor Europe GmbH an-mb88f33x-device-setup-rev1.0