MSP430-EasyWeb3 development board Users Manual

Transcription

1 MSP0-EasyWeb development board Users Manual Page

2 INTRODUCTION: MSP0-EasyWeb is TCP/IP board with MPS0F9 based on Andreas Dannenberg easyweb TCP/IP. On the board, there are JTAG connector, two extension connectors, two UART interfaces terminated to extension connector EXT, LAN connector and status leds. All this allows you to build an applications to be used in a different situations. BOARD FEATURES: - MSP0F9 running Andreas' open source TCPIP stack - CS8900 LAN controller + LAN transformer and RJ LAN connector - three status LEDs for the LAN - JTAG connector for MSP0F9 programming - low power RS driver MAX - two extension headers for MSP0F9 ports - 8Mhz oscillator crystal - PCB: FR-,. mm (0,0"), soldermask, silkscreen component print - Dimensions: x0 mm (x.") Page

3 ELECTROSTATIC WARNING: The MSP0-EasyWeb board is shipped in protective anti-static packaging. The board must not be subject to high electrostatic potentials. General practice for working with static sensitive devices should be applied when working with this board. BOARD USE REQUIREMENTS: Cables: The cable you will need depends on the programmer/debugger you use. If you use MSP0-JTAG, you will need LPT cable, if you use MSP0-JTAG-TINY or MSP-JTAG-ISO, you will need.8m A-B USB cable, if you use MSP0-JTAG-RF, you can connect it to the USB port of your computer, or via USB cable type A female. Hardware: Programmer/Debugger one of our Programmers MSP0-JTAG, MSP0-JTAG-TINY, MSP0-JTAG-ISO, or MSP0-JTAG-RF. Software: MSP0 KickStart software. PROCESSOR FEATURES: MSP0-EasyWeb board use ultralow-power consumption mixed signal microcontroller with these features: Low Supply-Voltage Range,.8 V.... V Ultralow-Power Consumption: Active Mode: 80 μa at MHz,.V Standby Mode:. μa Off Mode (RAM Retention): 0. μa Five Power-Saving Modes Wake-Up From Standby Mode in less than μs -Bit RISC Architecture, -ns Instruction Cycle Time -Bit A/D Converter With Internal Reference, Sample-and-Hold and Autoscan Feature -Bit Timer_B With Seven Capture/Compare-With-Shadow Registers -Bit Timer_A With Three Capture/Compare Registers On-Chip Comparator Serial Communication Interface (USART), Functions as Asynchronous UART or Synchronous SPI Interface Two USARTs (USART0, USART) Page

4 0KB+B Flash Memory KB RAM Page

5 BLOCK DIAGRAM: Page

6 MEMORY ORGANIZATION: Page

7 SCHEMATIC: Page 0p p p 0uF/ n(na) n(na) NC NC 0uF/V 00uF/ 0uF/VDC N89(NA) DB0 GNDA GNDA MSP0F9 CS8900A E0 green RJ yellow VCC VCC VCC VCC VCC VCC PWR-JAK 0MHz 8MHz 00 8, 8, K K99,% K 00K 0 NC 90/% 0/% red +UB +UB MAX LM RS Interface -9VDC 0R A[0..] D[0..] P_[0..],P_[0..],P_[0..],P_[0..] VEREFP,VREFP,VREFN +UB /IOR /IOR /IOW /IOW /RESET /RESET /RESET A0 A0 A A A A A A D0 D0 D D D D D D D D D D D D D D LANLED LINKLED P_0 P_0 P_ P_ P_ P_ P_ P_ P_ P_ P_ P_ P_ P_ P_ P_ P_0 P_0 P_ P_ P_ P_ P_ P_ P_ P_ P_ P_ P_ P_ P_ P_ P_0 P_0 P_ P_ P_ P_ P_ P_ P_ P_ P_ P_ P_ P_ P_ P_ P_0 P_0 P_ P_ P_ P_ P_ P_ P_ P_ P_ P_ P_ P_ P_ P_ RD+ RD- RXD+ RXD+ RXD- RXD- RXD0 RXD0 RXD0 RXIN RXIN TD+ TD- TXD+ TXD+ TXD- TXD- TXD0 TXD0 TXD0 TXD+ TXD- TXOUT TXOUT VEREFP VEREFP VREFN VREFN VREFP VREFP C C C C C C C C8 C9 C0 C C C C C C C C8 C9 C0 C C C C C C C C8 C9 C0 C C D EXT EXT G AVCC AVSS DVCC DVSS P.0/TACLK P./TA0 P./TA P./TA P./SMCLK P./TA0 P./TA 8 P./TA 9 P.0/ACLK 0 P./TACLK P./CAOUT P./CA0 P./CA P./ROSC P./ADCLK P./TA0 P.0/STE0 8 P./SIMO0 9 P./SOMI0 0 P./ULCK0 P./UTXD0 P./URXD0 P./UTXD P./URXD P.0/TB0 P./TB P./TB 8 P./TB 9 P./TB 0 P./TB P./TB P./TBCLK P.0/STE P./SIMO P./SOMI P./UCLK P./MCLK 8 P./SMCLK 9 P./ACLK 0 P./TH P.0/A0 9 P./A 0 P./A P./A P./A P./A P./A P./A RST/NMI 8 TCK TDI TDO/TDI TMS VEREF+ 0 VREF+ VREF- XIN 8 XOUT/TCLK 9 XTIN XTOUT IC AEN A 90 A 8 A 9 AVSS0 AVSS 89 AVSS 8 AVSS 9 AVSS 9 BSTATUS 8 CHIPSEL CI+ 8 CI- 8 CSOUT DI+ 9 DI- 80 DMACK0 DMACK DMACK DMARQ0 DMARQ DMARQ DO+ 8 DO- 8 D 9 D D D 9 DVSS 8 DVSSA 0 DVSS DVSS DVSSA DVSS 0 EECS EEDIN EEDOUT EESK ELCS INTRQ0 INTRQ INTRQ 0 INTRQ IOCHRDY IOCS IOR IOW LANLED 00 LINKLED 99 MEMCS MEMR 9 MEMW 8 REFRESH 9 RES 9 RESET RXD+ 9 RXD- 9 SA0 SA 8 SA 9 SA 0 SA SA SA SA SA8 SA9 SA0 SA 8 SA 0 SA SA SA SA SA 8 SA8 9 SA9 0 SBHE SD0 SD SD SD 8 SD SD SD SD SD8 SD9 SD0 SD SD SD 0 SD 9 SD 8 SLEEP TEST TXD+ 8 TXD- 88 XTAL 9 XTAL 98 IC IND JTAG LAN 8 LAN_CON LINK PWR Q Q Q R R R R R R R R8 R9 R0 R R R SJ STAT C+ C- C+ C- RIN ROUT RIN 8 ROUT 9 TIN TOUT TIN 0 TOUT V+ V- U GND VCC UPWR ADJ/GND IN OUT VR

8 BOARD LAYOUT: POWER SUPPLY CIRCUIT: RESET CIRCUIT: CLOCK CIRCUIT: MSP0-EasyWeb can take power from PWR connector, where to 9 VDC is applied by external power source. The board power consumption is: about 0 ma with all peripherals and microcontroller running at full speed. MSP0-EasyWeb reset circuit includes R8 (00k) and C () and MSP0F9 pin 8 (RST/NMI). Quartz crystal (Q) 0 MHz is connected to MSP0F9 pin (P.0/XIN) and pin (P./XOUT). Quartz crystal (Q) 8 MHz is connected to CS8900A pin 9 (XTAL) and pin 98 (XTAL). JUMPER DESCRIPTION: There are no jumpers on this board. Page 8

9 Input/Output: Status LED (green) with name LAN connected to CS8900A pin 00 (LANLED). Status LED (yellow) with name LINK connected to CS8900A pin 99 (LINKLED). Power supply LED (red) with name STAT indicates that external power source is applied and board power supply is applied. CONNECTOR DESCRIPTIONS: JTAG: Pin # Signal Name Pin # Signal Name TDO/TDI Not Connected TDI TMS Not Connected TCK 8 Not Connected 9 GND 0 Not Connected /RESET Not Connected Not Connected Not Connected PWR_J: Pin # Signal Name Power Input GND Page 9

10 EXT: Pin # Signal Name Pin # Signal Name GND P_0 P_ P_ P_ P_ 8 P_ 9 P_ 0 P_ P_0 P_ P_ P_ P_ P_ P_ 8 P_ 9 P_0 0 P_ P_ P_ P_ P_ P_ P_ Page 0

11 EXT: Pin # Signal Name Pin # Signal Name GND P_ P_ P_ P_ P_ 8 P_ 9 P_ 0 P_0 GND VREFN TXOUT VREFP RXIN VEREFP GND 8 /RESET 9 GND 0 TXD0 GND RXD0 GND GND +UB Page

12 LAN: Pin # Signal Name TD+ TD- RD+ Not Connected Not Connected RD- Not Connected 8 Not Connected Page

13 MECHANICAL DIMENSIONS: Page

14 AVAILABLE DEMO SOFTWARE: MSP0-EasyWeb test software TCP/IP port of Adam Dunkel's uip made by Rowley Associates, UK MSP0-EasyWeb modified by Paul Aguayo to work with new IAR EW-MSP0 version MSP0-EasyWeb modified by Bart van Deenen to work with MSP0GCC free compiler and changed default IP to MSP0-EasyWeb port for MSPGCC Page

15 ORDER CODE: MSP0-EasyWeb assembled and tested (no kit, no soldering required) Page