LPC-P1114 development board Users Manual

Transcription

1 LPC-P4 development board Users Manual All boards produced by Olimex are ROHS compliant Revision B, November 0 Copyright(c) 0, OLIMEX Ltd, All rights reserved Page

2 INTRODUCTION LPC-P4 is development board with LPC4 ARM Cortex-M0 based microcontrollers for embedded applications from NXP. LPC-P4 featuring a high level of integration and low power consumption. This microcontroller supports various interfaces such as one Fast-mode Plus IC-bus interface, one RS-485/EIA485 UART, two SSP interfaces, four general purpose timers, a 0-bit ADC. On the board are available UEXT, Debug Interface, user buttons and leds. BOARD FEATURES MCU: LPC4 Cortex-M0, up to 50 Mhz, 3 kb Flash, 8kB SRAM, UART RS-485, two SSP, IC/Fast+, ADC Power supply circuit Power-on led USB connector only for power supply, not USB functionality Debug interface SWD (Serial Wire Debug) UEXT connector Eight user leds Two user buttons Reset button Prototype area FR-4,.5 mm, soldermask, component print Dimensions: 80x50mm (3.5 x.97") Page

3 ELECTROSTATIC WARNING The LPC-P4 board is shipped in protective anti-static packaging. The board must not be subject to high electrostatic potentials. General practice for working with static sensitive devices should be applied when working with this board. BOARD USE REQUIREMENTS Cables: USB-Mini cable is need as this board used power supply from the USB. You will also need USA A-B cable for connecting the programmers to the PC. Hardware: To program this board you need JTAG and software which supports Cortex M0. The programmers Olimex offers are ARM-JTAG-EW which works with IAR for ARM up to version 6.0; ARM-USB-OCD, ARM-USB-OCD-H, ARM-USBTINY and ARM-USB-TIBY-H which works only with ARM-JTAG-SWD adapter and with Rowley CrossWorks. Software: IAR for ARM up to version 6.0 and Rowley CrossWorks. PROCESSOR FEATURES LPC-P4 board use ARM Cortex -M0 microcontroller LPC4FBD48/30 from NXP Semiconductors with these features: ARM Cortex-M0 processor, running at frequencies of up to 50 MHz. ARM Cortex-M0 built-in Nested Vecto Interrupt Controller (NVIC). 3 kb on-chip flash programming memory. 8 kb SRAM. In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software. Serial interfaces: - UART with fractional baud rate generation, internal FIFO, and RS485 support. - Two SSP controllers with FIFO and multi-protocol capabilities - IC-bus interface supporting full IC-bus specification and Fastmode Plus with a data rate of Mbit/s with multiple address recognition and monitor mode. Other peripherals: - 4 General Purpose I/O (GPIO) pins with configurable pullup/pull-down resistors. - Four general purpose timers/counters with a total of four capture inputs and 3 match outputs. - Programmable WatchDog Timer (WDT). - System tick timer. Page 3

4 Serial Wire Debug. High-current output driver (0 ma) on one pin. High-current sink drivers (0 ma) on two IC-bus pins in Fast-mode Plus. Integrated PMU (Power Management Unit) to minimize power consumption during Sleep, Deep-sleep, and Deep power-down modes. Three uced power modes: Sleep, Deep-sleep, and Deep power-down. Single 3.3 V power supply (.0 V to 3.6 V). 0-bit ADC with input multiplexing among 8 pins. GPIO pins can be used as edge and level sensitive interrupt sources. Clock output function with divider that can reflect the system oscillator clock, IRC clock, CPU clock, and the Watchdog clock Processor wake-up from Deep-sleep mode via a dedicated start logic using up to 3 of the functional pins. Brownout detect with four separate thresholds for interrupt and one threshold for forced reset. Power-On Reset (POR). Crystal oscillator with an operating range of MHz to 5 MHz. MHz internal RC oscillator trimmed to % accuracy that can optionally be used as a system clock. PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the main oscillator, the internal RC oscillator, or the watchdog oscillator. Page 4

5 BLOCK DIAGRAM Page 5

6 MEMORY MAP Page 6

7 Page 7 R6 0k R-MAT 560R R4 R3 R R R-MAT 560R R4 R3 R R OUT R 390R/% R0 40R/% 00nF C8 R9 560R PWR _PIN BUT T57 WAKE_UP R7 0k UEXT UEXT- UEXT- TXD UEXT-3 RXD UEXT-4 SCL UEXT-5 SDA UEXT-6 MISO UEXT-7 MOSI/SWV UEXT-8 SCK UEXT-9 CS UEXT-0 VBUS DD+ ID USB #USB_CONNECT USBC yellow(na) + COPYRIGHT(C) 00, Olimex Ltd. Rev. A 47k C6 33R(NA) 33R(NA) C5 T DTA4YKA(NA) R3.5k/%(NA) LPC-P4 R4 560R(NA) MICRO_B C7 0nF USB_VBUS DR D+ R UDD-/P.4 UD+ D+/P.5 _CORE_E 44 C4 CLOSE 4 00nF 9 0 RXD TXD SWD WAKE_UP P_0 P_ P_ P_3 P_4 P_5 P_6 P_7 P_8 P_9 P_0 P_ k IT85AU RESET RSTN R8 0k BUT T57 R5.0k R6.0k LPC3FBD C9 0uF/6.3V/TANT IN TMS/PIO_0/AD/CT3B_CAP0 TDO/PIO_/AD/CT3B_MAT0 PIO3_0/#DTR #TRST/PIO_/AD3/CT3B_MAT PIO3_/#DSR SWDIO/PIO_3/AD4/CT3B_MAT PIO3_/#DCD PIO_4/AD5/CT3B_MAT3/WAKEUP PIO3_3/#RI PIO_5/#RTS/CT3B0_CAP0 PIO_6/RXD/CT3B0_MAT0 PIO_0/#DTR/SSEL PIO_7/TXD/CT3B0_MAT PIO_/#DSR/SCK0 PIO_8/CT6B_CAP0 PIO_/#DCD/MISO PIO_9/CT6B_MAT0 PIO_3/#RI/MOSI PIO_0/AD6/CT6B_MAT PIO3_4 PIO_/AD7 PIO3_5 PIO_6 PIO_4 PIO_7 PIO_5 PIO_8 PIO_9 VDD(3V3) PIO_0 PIO_/SCK0 VSS RST P0_ P0_ P0_3 SCL P0_4 SDA P0_5 #USB_CONNECT P0_6 P0_7 MISO P0_8 MOSI/SWV P0_9 SWC P0_0 P0_ RSTN BLD_E R0 k 8p(NA) ADJ/ USER USER 4 CS 5 SCK 3 P_0 P_ P_ P_3.4/3.4.5/3.5 P_6 P_7 P_8 P_9 P_0 P_ BUTTONS HNx 0k 0k(NA) k(na) 8p(NA) +5V_JLINK D BAT54C VR() LM7IMPX-ADJ XTALIN VSSIO VDDIO #RESET/PIO0_0 PIO0_/CLKOUT/CT3B0_MAT PIO0_/SSEL0/CT6B0_CAP0 PIO0_3 PIO0_4/SCL PIO0_5/SDA PIO0_6/SCK0 PIO0_7/#CTS PIO0_8/MISO/CT6B0_MAT0 PIO0_9/MOSI/CT6B0_MAT SWCLK/PIO0_0/SCK0/CT6B0_MAT TDI/PIO0_/AD0/CT3B0_MAT3 USB_VBUS R7 R8 R9 USB USB_VBUS POWER SUPPLY Q MHz/0pF 7 7 XTALOUT 6 5 P3_0 P3_ P3_ P3_3 7pF C3 C 8 U LED0 LED LED LED3 LED4 LED5 LED6 LED7 R5 0k 7pF 00nF MOSI/SWV +5V_JLINK C R4 0k _IO_E CLOSE SWD SWC R 0k BH0S SWD DEBUG INTERFACE: SCHEMATIC

8 BOARD LAYOUT POWER SUPPLY CIRCUIT LPC-P4 is power supplied +5V via USB, or via JTAG. RESET CIRCUIT LPC-P4 reset circuit includes LPC4 pin 3 (#RESET/PIO0_0), R8 (0k) and RESET button. CLOCK CIRCUIT Quartz crystal MHz is connected to LPC4 pin 6 (XTALIN) and pin 7 (XTALOUT). Page 8

9 JUMPER DESCRIPTION _CORE_E This jumper, when closed, enables microcontroller power supply. Default state is closed. (I/O)_E This jumper, when closed, supplies 3.3 V voltage to LPC4 pin 8 (VDDIO). Default state is closed. INPUT/OUTPUT LED0 () connected via R-MAT to LPC4 pin 36 (PIO3_0/#DTR). LED () connected via R-MAT to LPC4 pin 37 (PIO3_/#DSR). LED () connected via R-MAT to LPC4 pin 43 (PIO3_/#DCD). LED3 () connected via R-MAT to LPC4 pin 48 (PIO3_3/#RI). LED4 () connected via R-MAT to LPC4 pin 8 (PIO3_4). LED5 () connected via R-MAT to LPC4 pin (PIO3_5). LED6 () connected via R-MAT to LPC4 pin (PIO_6). LED7 () connected via R-MAT to LPC4 pin (PIO_7). Power-on LED () this LED shows that + is applied to the board. User button with name BUT (USER) connected to LPC4 pin 4 (PIO_9). User button with name BUT connected to LPC4 pin 40 (WAKEUP). Reset button with name RESET connected to LPC4 pin 3 (#RESET/PIO0_0). Page 9

10 EXTERNAL CONNECTORS DESCRIPTION UEXT Pin # Signal Name 3 TXD 4 RXD 5 SCL 6 SDA 7 MISO 8 MOSI 9 SCK 0 CS SWD Pin # Signal Name Pin # Signal Name 3 NC 4 5 NC 6 7 SWD 8 9 SWC 0 pull-down 3 MOSI 4 5 NC 6 7 pull-down V_JLINK 0 Page 0

11 USB connector Pin # Signal Name USB_VBUS NC 3 NC 4 NC 5 Page

12 MECHANICAL DIMENSIONS Page

13 AVAILABLE DEMO SOFTWARE - LPC4 demo examples project for EW-ARM Page 3

14 ORDER CODE LPC-P4 - assembled and tested board How to order? You can order to us directly or by any of our distributors. Check our web for more info. Revision history Board's Revision: Rev. A, May 00 Manual's Revision: Rev. B, November 0 - Added Programmers and Software in BOARD USE REQUIREMENTS and in BOARD LAYOUT the name of connector named JTAG is changed to SWD Page 4

15 Disclaimer 0 Olimex Ltd. All rights reserved. Olimex, logo and combinations thereof, are registe trademarks of Olimex Ltd. Other terms and product names may be trademarks of others. The information in this document is provided in connection with Olimex products. No license, express or implied or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Olimex products. Neither the whole nor any part of the information contained in or the product described in this document may be adapted or reproduced in any material from except with the prior written permission of the copyright holder. The product described in this document is subject to continuous development and improvements. All particulars of the product and its use contained in this document are given by OLIMEX in good faith. However all warranties implied or expressed including but not limited to implied warranties of merchantability or fitness for purpose are excluded. This document is intended only to assist the reader in the use of the product. OLIMEX Ltd. shall not be liable for any loss or damage arising from the use of any information in this document or any error or omission in such information or any incorrect use of the product. Page 5