EE 6900: FAULT-TOLERANT COMPUTING SYSTEMS

Transcription

1 EE 6900: FAULT-TOLERANT COMPUTING SYSTEMS LECTURE 6: CODING THEORY - 2 Fall 2014 Avinash Kodi kodi@ohio.edu Acknowledgement: Daniel Sorin, Behrooz Parhami, Srinivasan Ramasubramanian Agenda Hamming Codes Cyclic Codes 1

2 Hamming Distance The hamming distance between two words is the number of differences between two corresponding bits Example 1: The hamming distance between d(000, 111) is 2 because 000 XOR 011 = 011 (two 1s) The minimum hamming distance, d min is the smallest Hamming distance between all possible pairs in a set of words Example 2: 00000, 10101, 11110? To guarantee the detection upto s errors in all cases, d min = s+1 Geometric Concept for Finding dmin in Error Detection (1/2) 2

3 Geometric Concept for Finding dmin in Error Detection (2/2) To guarantee correction of up to t errors, the minimum hamming distance, d min = 2t+1 Simple Parity Checkers A simple parity-check code is a single-bit error-detecting code in which n = k + 1 with d min = 2 Even parity (ensures even number of 1 s) Odd parity (ensures odd number of 1 s) Simple parity-check code C(5, 4) 3

4 Encode and Decoder Design Two-Dimensional Parity Check Code 4

5 Hamming Code Construction See Lecture notes Encoder and Decoder for a Hamming Code 5

6 Burst Errors Burst errors are very common, in particular in wireless environments where a fade will affect a group of bits in transit. The length of the burst is dependent on the duration of the fade. One way to counter burst errors, is to break up a transmission into shorter words and create a block (one word per row), then have a parity check per word. The words are then sent column by column. When a burst error occurs, it will affect 1 bit in several words as the transmission is read back into the block format and each word is checked individually. Burst Error Correction Using Hamming Code 6

7 Cyclic Codes Cyclic codes are special linear block codes with one extra property. In a cyclic code, if a codeword is cyclically shifted (rotated), the result is another codeword Cyclic Codes Construction See Lecture Notes 7

8 Cyclic Codes The divisor in a cyclic code is normally called the generator polynomial or the generator In a cyclic code, If c (x)!= 0, one or more bits are corrupted If c (x) = 0 No bits are corrupted Some bits are corrupted, but the decoder fails to detect them In a cyclic code, those e(x) errors that are divisible by g(x) are not caught. Received codeword, c (x) = (c(x) + e(x))/g(x) = c(x)/g(x) + e(x)/gx The first part is by definition divisible the second part will determine the error. If 0 conclusion -> no error occurred. CRC (7,4) 8

9 CRC Encoder and Decoder CRC at Encoding 9

10 CRC Decoder (two cases) Hardwire Design in CRC 10

11 Simulation of CRC Division General Encoder and Decoder Design 11

12 Using Polynomials We can use a polynomial to represent a binary word. Each bit from right to left is mapped onto a power term. The rightmost bit represents the 0 power term. The bit next to it the 1 power term, etc. If the bit is of value zero, the power term is deleted from the expression. A Polynomial to Represent a Dataword 12

13 CRC Division Using Polynomials 10. Single-Error Detection If the generator has more than one term and the coefficient of x 0 is 1, all single errors can be caught. Which of the following g(x) values guarantees that a single-bit error is caught? For each case, what is the error that cannot be caught? a. x + 1 b. x 3 c. 1 Solution a. No x i can be divisible by x + 1. Any single-bit error can be caught. b. If i is equal to or greater than 3, x i is divisible by g(x). All single-bit errors in positions 1 to 3 are caught. c. All values of i make x i divisible by g(x). No single-bit error can be caught. This g(x) is useless. 13

14 Two isolated single bit errors Error Detection Capability (Two single bit isolated) If a generator cannot divide x t + 1 (t between 0 and n 1), then all isolated double errors can be detected. Find the status of the following generators related to two isolated, single-bit errors. a. x + 1 b. x c. x 7 + x d. x 15 + x Solution a. This is a very poor choice for a generator. Any two errors next to each other cannot be detected. b. This generator cannot detect two errors that are four positions apart. c. This is a good choice for this purpose. d. This polynomial cannot divide x t + 1 if t is less than 32,768. A codeword with two isolated errors up to 32,768 bits apart can be detected by this generator. 14

15 Burst Error Detection All burst errors with L r will be detected. All burst errors with L = r + 1 will be detected with probability 1 (1/2) r 1. All burst errors with L > r + 1 will be detected with probability 1 (1/2) r. Standard Polynomials 15

16 Reed-Solomon Codes (1/2) Popular ECC for CDs, DVDs, wireless communications, etc. k data symbols, each of which is s bits r parity symbols, each of which is also s bits Can correct up to r/2 symbols that contain errors Or can correct up to r symbol erasures Erasure = error in a known symbol Denoted by RS(n,k) Common example: RS(255, 223) with s=8 n = codeword bytes k = dataword bytes r = 32 can correct errors in <= 16 bytes Reed-Solomon Codes (2/2) There exist many flavors of RS codes, each of which is tailored to specific purpose Cross-Interleaved Reed-Solomon Coding (CIRC) used in CDs can correct error burst of up to 4000 bits! 4000 bits is roughly equivalent to 2.5mm on the CD surface RS codes are best for bursty error model Just as good at handling 1 error in symbol or s errors in symbol Codewords created by multiplying datawords with generator polynomial (like CRC) 16

17 Arithmetic Codes Codes that are preserved by arithmetic operations If X and Y are codewords, then Z = F(X,Y) is a codeword Arithmetic codes let us detect errors in ALUs Two types of codes, where f(x) is the encoding of X and C(X) is the check symbol computed from X Separable: f(x) = concatenation of X and C(X) denoted X, C(X) Non-separable: f(x)!= X, C(X) Why is separability a desirable feature? Think about hardware implementation issues Example (assume addition is performed modulo M) AN code: f(x) = A*X A (X+Y mod M) = (AX + AY) mod AM Implementing ECC and EDC in hardware Where does EDC/ECC get used? Disk, CD-ROM Memory (DRAM, SRAM) Buses Network Tradeoff between EDC and ECC ECC: Forward error recovery Often on critical path, so can slow down even fault-free system EDC: Backward error recovery Detecting error leads to recovery (can be slow) So would you use ECC or EDC in your L1 cache? How about in DRAM? 17