Single Chip Module (SCM) Package-on- Package (PoP) Assembly Guide

Transcription

1 Freescale Semiconductor, Inc. Document Number: AN5247 Application Notes Rev. 0, 01/2016 Single Chip Module (SCM) Package-on- Package (PoP) Assembly Guide 1. Introduction Freescale Single Chip Modules (SCM) are a suite of highly integrated products in an ultra-small form factor. For SCM products that are designed for Package-on- Package (PoP) configurations, a package can be assembled onto the top of the SCM. This application note provides reference information for PoP assembly, includes examples of case outline drawings of a SCM- PoP configuration, provides reference guidelines for assembly onto a Printed Circuit Board (PCB) and references an established supplier for PoP pre-stack assembly. Contents 1. Introduction Scope Example of SCM-PoP Package Drawings PoP Assembly Reference PoP Pre-Stack Reference References Revision History Freescale Semiconductor, Inc. All rights reserved.

2 Scope 2. Scope This document provides the general references for PoP and PCB assembly of SCM PoP products. The specific materials and recipes are not provided. PoP package assembly requires unique considerations in system and process design. To develop a specific solution, actual experience and development efforts are required to optimize the assembly process and application design per system requirements, industry standards (such as IPC and JEDEC), and prevalent practices in the assembly environment. 2 Freescale Semiconductor, Inc.

3 Example of SCM-PoP Package Drawings 3. Example of SCM-PoP Package Drawings This section shows the examples of the case outline drawings that depict an SCM PoP configuration. Figure 1 shows the SCM only, Figure 2 shows an SCM pre-stacked with a top package (i.e., memory package). Freescale Semiconductor, Inc. 3

4 Example of SCM-PoP Package Drawings Figure 1 SCM i.mx 6Dual package drawing 4 Freescale Semiconductor, Inc.

5 Example of SCM-PoP Package Drawings Figure 2 SCM i.mx 6Dual PoP package drawing Freescale Semiconductor, Inc. 5

6 PoP Assembly Reference 4. PoP Assembly Reference For further information on the PoP pre-stack process, see the pre-stack source provided in Section 5 PoP Pre-Stack Reference. Additionally, it is recommended to consult the top package (i.e., memory) supplier for general PoP assembly guidelines, including pre-stack and co-stack assembly. For example, Package-on-Package (PoP) User Guide is the Micron PoP assembly guideline, including Z-height calculations, assembly flow options, fluxing and paste medium, reflow profile, handling/rework, memory die temperature and underfill options. 6 Freescale Semiconductor, Inc.

7 PoP Pre-Stack Reference 5. PoP Pre-Stack Reference Pre-stacking is a method in which the top package is mounted to a base package prior to assembly onto the PCB. Pre-stacking provides the ability to test the full functionality of the PoP prior to final PCB assembly if necessary. Shinko has established a pre-stacking process that is successfully used for the SCM PoP. The contact information for Shinko is as follows: Contact Information (North America/Europe): Brandon Reddick brandon.reddick@shinko.com Tel: Shinko Electric America, Inc Telecom Pkwy., Richardson, TX Contact Information (Asia): Shinichiro Nakaizumi shinichiro_nakaizumi@shinko.co.jp Tel: SHINKO ELECTRIC INDUSTRIES CO., LTD , Himegawara, Myoko-shi, Niigata, JAPAN Freescale Semiconductor, Inc. 7

8 References 6. References [1] IPC/JEDEC J-STD-020C, Moisture/Reflow Sensitivity Classification for Non-hermetic Solid State Surface Mount Devices, July [2] IPC/JEDEC J-STD-033B, Joint IPC/JEDEC Standard for handling, packing, shipping, and use of moisture/reflow sensitive surface-mount devices, January [3] IPC-7351B, Generic Requirements for Surface Mount Design and Land Pattern Standards, June [4] IPC/JEDEC-9702, Monotonic Bend Characterization of Board-Level Interconnects, June [5] IPC-SM-785, Guidelines for Accelerated Reliability Testing of Surface Mount Solder Attachments, November [6] JESD22-B111, Board Level Drop Test Method of Components for Handheld Electronic Products, July [7] IPC-1752, Materials Declaration Management, June [8] JESD615-A, Requirements for Handling Electrostatic-Discharge-Sensitive (ESDS) Devices. 8 Freescale Semiconductor, Inc.

9 Revision History 7. Revision History Table 1 Revision history Revision Date Substantive changes 0 01/2016 Initial release Freescale Semiconductor, Inc. 9

10 . How to Reach Us: Home Page: freescale.com Web Support: freescale.com/support Information in this document is provided solely to enable system and software implementers to use Freescale products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document. Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters that may be provided in Freescale data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. All operating parameters, including typicals, must be validated for each customer application by customer's technical experts. Freescale does not convey any license under its patent rights nor the rights of others. Freescale sells products pursuant to standard terms and conditions of sale, which can be found at the following address: freescale.com/salestermsandconditions. Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. All other product or service names are the property of their respective owners Freescale Semiconductor, Inc. Document Number: AN5247 Rev. 0 01/2016