VM Design and Tradeoffs
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1 VM Design and Tradeoffs or: Why bother having VM statistics? CS A3 Section 1 cs161@eecs.harvard.edu Max Wang max.wang@college
2 Synchronization
3 Synchronization How do you synch access to a table entry?
4 Synchronization Option 1
5 Synchronization Option 1 Coremap and addrspace locks?
6 Synchronization Option 1 Coremap and addrspace locks? Too much contention!
7 Synchronization Option 1 Coremap and addrspace locks? Too much contention! VM is everywhere needs to be fast.
8 Synchronization Option 2
9 Synchronization Option 2 Per-CME, per-pte spinlock?
10 Synchronization Option 2 Per-CME, per-pte spinlock? Costs an extra word per table entry.
11 Synchronization Option 2 Per-CME, per-pte spinlock? Costs an extra word per table entry. Important to keep memory footprint of memory bookkeeping structures low.
12 Synchronization Option 3
13 Synchronization Option 3 Per-CPU, per-pte... spinbit? Or SPL?
14 Synchronization Option 3 Per-CPU, per-pte... spinbit? Or SPL? Can t hold these across disk accesses.
15 Synchronization Option 3 Per-CPU, per-pte... spinbit? Or SPL? Can t hold these across disk accesses. Spinlocks are for small critical sections.
16 Synchronization Option 3 Per-CPU, per-pte... spinbit? Or SPL? Can t hold these across disk accesses. Spinlocks are for small critical sections. SPL might drop I/O interrupts...
17 Synchronization Option 4
18 Synchronization Option 4 Busy bits! (aka, pin bits)
19 Synchronization Option 4 Busy bits! (aka, pin bits) Coarse spinlock (e.g., for entire coremap)
20 Synchronization Option 4 Busy bits! (aka, pin bits) Coarse spinlock (e.g., for entire coremap) Single bit marking whether an entry is busy.
21 Synchronization Option 4 Busy bits! (aka, pin bits) Coarse spinlock (e.g., for entire coremap) Single bit marking whether an entry is busy. Spinlock critical section is just test/set.
22 Synchronization
23 Synchronization Do you need addrspace locks?
24 Synchronization Do you need addrspace locks? Do you need PTE busy bits?
25 Synchronization Do you need addrspace locks? Do you need PTE busy bits? How many CMEs and/or PTEs will you need at any given time?
26 Synchronization Do you need addrspace locks? Do you need PTE busy bits? How many CMEs and/or PTEs will you need at any given time? Fix an ordering to prevent deadlock.
27 Table entries
28 Coremap Mapping from PPN to VPN.
29 Coremap Mapping from PPN to VPN. Right?
30 Coremap Mapping from PPN to VPN. Right? Mapping from PPN to addrspace + VPN.
31 Coremap Mapping from PPN to VPN. Right? Mapping from PPN to addrspace + VPN. Mapping from PPN to PTE.
32 CMEs A pointer, and maybe a vaddr_t.
33 CMEs A pointer, and maybe a vaddr_t. What else do you need?
34 CMEs A pointer, and maybe a vaddr_t. What else do you need? Busy bit
35 CMEs A pointer, and maybe a vaddr_t. What else do you need? Busy bit Kernel bit (i.e., do-not-evict bit)
36 CMEs A pointer, and maybe a vaddr_t. What else do you need? Busy bit Kernel bit (i.e., do-not-evict bit) Dirty bit
37 CMEs A pointer, and maybe a vaddr_t. What else do you need? Busy bit Kernel bit (i.e., do-not-evict bit) Dirty bit Use bit
38 PTEs Maps to a coremap entry via PPN.
39 PTEs Maps to a coremap entry via PPN. What else do you need?
40 PTEs Maps to a coremap entry via PPN. What else do you need? Valid bit or marker
41 PTEs Maps to a coremap entry via PPN. What else do you need? Valid bit or marker Backing store block index
42 PTEs Maps to a coremap entry via PPN. What else do you need? Valid bit or marker Backing store block index Busy bit? depends on your synch
43 CME or PTE? Where should you keep your bits?
44 CME or PTE? Where should you keep your bits? Only 2 bits in CMEs which are a pointer.
45 CME or PTE? Where should you keep your bits? Only 2 bits in CMEs which are a pointer. You can play some games with the PPN and BSI fields.
46 CME or PTE? What s the tradeoff?
47 CME or PTE? What s the tradeoff? Making CMEs smaller optimizes for low memory usage (#CME > #PTE).
48 CME or PTE? What s the tradeoff? Making CMEs smaller optimizes for low memory usage (#CME > #PTE). Making PTEs smaller optimizes for high memory usage (#CME < #PTE).
49 Bootstrapping
50 Bootstrapping When does VM bootstrapping need to happen?
51 Bootstrapping When does VM bootstrapping need to happen? Where do you put the coremap?
52 Bootstrapping When does VM bootstrapping need to happen? Where do you put the coremap? Make sure you mark it in the coremap!
53 Bootstrapping The coremap ought to be staticallyallocated, unlike PTEs. Why?
54 Bootstrapping The coremap ought to be staticallyallocated, unlike PTEs. Why? You want to extend the coremap. Allocate some memory.
55 Bootstrapping The coremap ought to be staticallyallocated, unlike PTEs. Why? You want to extend the coremap. Allocate some memory. Need to extend the coremap to allocate memory. Allocate some memory.
56 Bootstrapping The coremap ought to be staticallyallocated, unlike PTEs. Why? You want to extend the coremap. Allocate some memory. Need to extend the coremap to allocate memory. Allocate some memory. Need to extend the coremap to allocate memory. Allocate some memory.
57 Bootstrapping The coremap ought to be staticallyallocated, unlike PTEs. Why? You want to extend the coremap. Allocate some memory. Need to extend the coremap to allocate memory. Allocate some memory. Need to extend the coremap to allocate memory. Allocate some memory. Need to extend the coremap to allocate memory. Allocate some memory.
58 Bootstrapping The coremap ought to be staticallyallocated, unlike PTEs. Why? You want to extend the coremap. Allocate some memory. Need to extend the coremap to allocate memory. Allocate some memory. Need to extend the coremap to allocate memory. Allocate some memory. Need to extend the coremap to allocate memory. Allocate some memory. Need to extend the coremap to allocate memory. Allocate some memory.
59 Page tables
60 PTEs What is at index i of your page table?
61 PTEs What is at index i of your page table? A page table entry?
62 PTEs What is at index i of your page table? A page table entry? A pointer to a page table entry?
63 PTEs What is at index i of your page table? A page table entry? A pointer to a page table entry? What if you wanted copy-on-write?
64 Single-level page table Option 1
65 Single-level page table Option 1 20 bytes for VPN and PPN
66 Single-level page table Option 1 20 bytes for VPN and PPN So, 2 20 entries.
67 Single-level page table Option 1 20 bytes for VPN and PPN So, 2 20 entries. Uh.
68 Single-level page table Option 1 20 bytes for VPN and PPN So, 2 20 entries. Uh. That s 1 MB per address space.
69 Multi-level page table Option 2
70 Multi-level page table Option 2 10 bytes for each layer.
71 Multi-level page table Option 2 10 bytes for each layer. Or some other division.
72 Multi-level page table Option 2 10 bytes for each layer. Or some other division bytes = 1 KB per page directory
73 Multi-level page table Option 2 10 bytes for each layer. Or some other division bytes = 1 KB per page directory Simple and efficient
74 Segmented page table Option 3
75 Segmented page table Option 3 Page table per ELF-defined segment
76 Segmented page table Option 3 Page table per ELF-defined segment e.g., code, data, bss
77 Segmented page table Option 3 Page table per ELF-defined segment e.g., code, data, bss Also for the stack and heap
78 Segmented page table Option 3 Page table per ELF-defined segment e.g., code, data, bss Also for the stack and heap More complex, maybe more performant?
79 Permissions
80 Segments Still need a notion of segments, even for multi-level page tables.
81 Segments Still need a notion of segments, even for multi-level page tables. ELF binary loading
82 Segments Still need a notion of segments, even for multi-level page tables. ELF binary loading Permissions enforcement
83 Permissions Permissions [rwx] are per-segment.
84 Permissions Permissions [rwx] are per-segment. Tradeoff for keeping perm bits in PTEs?
85 Permissions Permissions [rwx] are per-segment. Tradeoff for keeping perm bits in PTEs? What happens when you load the [rx] code segment?
86 and NRU
87 Use bit When do you set the use bit?
88 Use bit When do you set the use bit? TLB doesn t do it for you.
89 Use bit When do you set the use bit? TLB doesn t do it for you. Need to wait for a TLB miss!
90 Use bit What about a highly-referenced page?
91 Use bit What about a highly-referenced page? Might be TLB resident for an entire clock sweep.
92 Use bit What about a highly-referenced page? Might be TLB resident for an entire clock sweep. Will have a 0 use bit if no TLB miss!
93 Use bit What about a highly-referenced page? Might be TLB resident for an entire clock sweep. Will have a 0 use bit if no TLB miss! How do we deal with this?
94 Use bit Option 1
95 Use bit Option 1 Evict TLB when clock hand unsets use bit.
96 Use bit Option 1 Evict TLB when clock hand unsets use bit. Absolutely not!
97 Use bit Option 1 Evict TLB when clock hand unsets use bit. Absolutely not! This kills the TLB s effectiveness as a cache.
98 Use bit Option 2
99 Use bit Option 2 Check if the page is in the TLB.
100 Use bit Option 2 Check if the page is in the TLB. Can use tlb_probe().
101 Use bit Option 2 Check if the page is in the TLB. Can use tlb_probe(). Can keep a TLB bit in each CME.
102 Use bit Option 3
103 Use bit Option 3 Hope for the best.
104 Use bit Option 3 Hope for the best. With large memory and random TLB eviction, probably works fine!
105 Kernel memory allocation
106 alloc_kpages() Need to get physical pages for kmalloc().
107 alloc_kpages() Need to get physical pages for kmalloc(). Share code with VM fault path!
108 alloc_kpages() Need to get physical pages for kmalloc(). Share code with VM fault path! How do you allocate contiguous pages in physical memory?
109 alloc_kpages() Option 1
110 alloc_kpages() Option 1 Just try to find k free pages.
111 alloc_kpages() Option 1 Just try to find k free pages. May need up to 16 for execv.
112 alloc_kpages() Option 1 Just try to find k free pages. May need up to 16 for execv. Can evict user pages, but not kernel pages.
113 alloc_kpages() Option 1 Just try to find k free pages. May need up to 16 for execv. Can evict user pages, but not kernel pages. External fragmentation D:
114 alloc_kpages() Option 2
115 alloc_kpages() Option 2 Make use of KSEG2.
116 alloc_kpages() Option 2 Make use of KSEG2. Mappable memory!= swappable memory
117 alloc_kpages() Option 2 Make use of KSEG2. Mappable memory!= swappable memory Be sure to avoid recursion!
118 alloc_kpages() Option 2 Make use of KSEG2. Mappable memory!= swappable memory Be sure to avoid recursion! Use sparingly, e.g., kmalloc2().
119 alloc_kpages() Option 3
120 alloc_kpages() Option 3 Never make contiguous allocations.
121 alloc_kpages() Option 3 Never make contiguous allocations. Rewrite execv() to use page-sized buffers.
122 alloc_kpages() Option 3 Never make contiguous allocations. Rewrite execv() to use page-sized buffers. Easier to write execv() than VM.
123 TLB dirty bit
124 TLB dirty bit aka, write-protect bit
125 TLB dirty bit aka, write-protect bit What does it do?
126 TLB dirty bit aka, write-protect bit What does it do? Faults with TLB_READONLY
127 TLB dirty bit aka, write-protect bit What does it do? Faults with TLB_READONLY What do we do with it?
128 Protection Write-protect read-only pages
129 Protection Write-protect read-only pages Kill the process if it tries to write w/o permission.
130 Dirtying pages Make the TLB notify you when you first write to a page.
131 Dirtying pages Make the TLB notify you when you first write to a page. Unset dirty bit of paged-in pages.
132 Dirtying pages Make the TLB notify you when you first write to a page. Unset dirty bit of paged-in pages. Avoid unnecessary writeback.
133 TLB shootdown
134 Thread switch Need to shoot down your entire TLB on thread switch.
135 Thread switch Need to shoot down your entire TLB on thread switch. your == current CPU
136 Eviction Need to shoot down TLB entries for evicted pages.
137 Eviction Need to shoot down TLB entries for evicted pages. How do you determine which TLB?
138 Eviction Need to shoot down TLB entries for evicted pages. How do you determine which TLB? Pointer to address space.
139 Eviction Need to shoot down TLB entries for evicted pages. How do you determine which TLB? Pointer to address space. Broadcast to all CPUs.
140 Design considerations
141 VM statistics
142 VM statistics Lots of design decisions
143 VM statistics Lots of design decisions You re not limited to what was presented!
144 VM statistics Lots of design decisions You re not limited to what was presented! You don t have to test multiple options.
145 VM statistics Lots of design decisions You re not limited to what was presented! You don t have to test multiple options. You should instrument support for evaluating your choices against others.
146 Sharing code
147 Sharing code Two paths for most virtual memory operations:
148 Sharing code Two paths for most virtual memory operations: TLB miss from userland
149 Sharing code Two paths for most virtual memory operations: TLB miss from userland Kernel memory allocation
150 Sharing code Two paths for most virtual memory operations: TLB miss from userland Kernel memory allocation Share as much code as possible!
151 Building interfaces
152 Building interfaces Write composable, unital, modular primitives.
153 Building interfaces Write composable, unital, modular primitives. Build higher- and higher-level interfaces.
154 Building interfaces Write composable, unital, modular primitives. Build higher- and higher-level interfaces. e.g., load page > get free page > evict > pin/busy a CME
155 Building interfaces Write composable, unital, modular primitives. Build higher- and higher-level interfaces. e.g., load page > get free page > evict > pin/busy a CME Write low-level interfaces around all data structures.
156 Machine dependency
157 Machine dependency Let machine-dependency abstraction barrier guide your design!
158 Machine dependency Let machine-dependency abstraction barrier guide your design! Format of your page table is machine dependent.
159 Machine dependency Let machine-dependency abstraction barrier guide your design! Format of your page table is machine dependent. Eviction algorithm and backing store?
160 Getting started
161 Start early
162 Start early. Start early
163 Start early Start early. Don t start late.
164 Start early Start early. Don t start late. Ought to have started by now.
165 Start early Start early. Don t start late. Ought to have started by now. Better to sprint now than to stress later.
166 How to start
167 How to start Write your data structures and basic interfaces.
168 How to start Write your data structures and basic interfaces. Make a skeletal fault codepath.
169 How to start Write your data structures and basic interfaces. Make a skeletal fault codepath. Fill in the fault path step-by-step, functionby-function.
170 How to start Write your data structures and basic interfaces. Make a skeletal fault codepath. Fill in the fault path step-by-step, functionby-function. Ignore paging at first; just use an enormous RAM size.
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