IFE: Course in Low Level Programing. Lecture 6

Transcription

1 IFE: Course in Low Level Programing Lecture 6

2 Instruction Set of Intel x86 Microprocessors Conditional jumps Jcc jump on condition cc, JMP jump always, CALL call a procedure, RET return from procedure, INT software interrupt, IRET return from interrupt, LOOP loop and iterate, State changing instructions STC set carry flag, CLC clear carry flag, STD set direction flag, CLD clear direction flag, STI set interrupt flag, CLI clear interrupt flag, Privileged instructions LGDT load global descriptor table register, LIDT load interrupt descriptor table register, LLDT load local descriptor table register. IFE: Course in Low Level Programing

3 All programs contain loops and conditional instructions. In case of assembly language these are constructed via Jcc conditional jump instructions. Conditional jump instructions take into consideration appropriate flag bits contained in a processor's flag register. Flags are set by the processor's arithmetical operations, such as: add, sub, mul, div, and, or, xor, etc., also by comparing instructions, such as: cmp or test. cmp x,y instruction compares two arguments by substracting y argument form x, but the result is not stored anywhere, except that appropriate flags are set depending on the risult of that substraction. similarely test x,y performs bitwise and operation on both arguments, and sets appropriate flags, in this case also the result is not stored.

4 Processor's flag register OF (ang. overflow) overflow for two's complement (signed) numbers, DF (ang. direction flag) sets the direction for string operations, IF (ang. interrupt enable flag) enables/disables interrupts, TF (ang. trap flag) interrupts execution of every single instruction enabling programming of debugging applications, SF (ang. sign flag) informs about a sign of the result of last arithmetical operation (two's complement numbers), ZF (ang. zero flag) set when the result is equal to zero, AF (ang. auxiliary flag) auxiliary carry for BCD numbers handling PF (ang. parity flag) set when number of binary 1's in the result is even, CF (ang. carry flag) overflow for binary coded (unsigned) numbers

5 Conditional jumps Jcc (from jump on condition cc) Instruction checks the state of one or more flags in FLAGS register depending on condition cc. If condition is met instruction performs a jump to a target instruction specified by the destination operand which is an immediate 8-bit signed value. The address of target instruction is calculated as the relative one. Affects no flags. Available variants: Jcc imm8 Jcc imm16 Jcc r/m16 Depending on condition cc the following variants of Jcc instruction are available: IFE: Course in Low Level Programing

6 Mnemonic Flags Description JA CF=0 and ZF=0 jump if greater (binary code) JAE CF=0 jump if greater or equal (binary code) JB CF=1 jump if smaller (binary code) JBE CF=1 or ZF=1 jump if smaller or equal (binary code) JC CF=1 see JB instruction JNC CF=0 see JAE instruction JE ZF=1 jump if equal JG SF=OF and ZF=0 jump if greater (two's complement code) JGE SF=OF jump if greater or equal (two's complement code) JL SF!=OF jump if smaller (two's complement code) JLE SF!=OF or ZF=1 jump if smaller or equal (two's complement code) JNA CF=1 or ZF=1 see JBE instruction JNAE CF=1 see JB instruction JNB CF=0 see JAE instruction

7 Mnemonic Flags Description JNBE CF=0 and ZF=0 see JA instruction JNC CF=0 see JAE instruction JNE ZF=0 jump if not equal JNG SF!=OF or ZF=1 see JLE instruction JNGE SF!=OF see JL instruction JNL SF=OF see JGE instruction JNLE SF=OF and ZF=0 see JG instruction JNO OF=0 jump if not carry JNP PF=0 jump if not number of 1 bits is not even JNS SF=0 jump if number is positive or zero JNZ ZF=0 see JNE instruction JO OF=1 jump if overflow occured JP PF=1 jump if not number of 1 bits is even JS SF=1 jump if number is negative JZ ZF=1 see JE instruction

8 EXAMPLES. 1) do {} while loop until AX value is equal to 0. Theloop: ; inside loop instructions test ax, ax jnz theloop 2) for loop iterated by CX register from zero to N-1. theloop: theend: mov cx,0 cmp cx,n jae theend ; inside loop instructions inc cx jmp theloop ; instructions after the loop

9 3) while loop continuing when a value in CX register is even. theloop: theend: and cx,1 jnz theend ; inside loop instructions jmp theloop ; instructions after the loop 4) do {} while loop continuing when CX>0 and CX<N. theloop: theend: ; inside loop instructions cmp cx,0 jbe theend cmp cx,n jae theend jmp theloop ; instructions after the loop

10 The LOOP instruction. The LOOP instruction is an assembly language counterpart of for loop. First the LOOP instruction decrements CX register. Then it checks weather CX value is not equal to zero. If so, it performs a jump to a specified label (address). In the other case (CX = 0) it doesn't perform a jump, instead the program continues from the next instruction after the LOOP instruction. EXAMPLE. The loop which executes N times. theloop: mov cx, N ; inside loop instructions loop theloop ; instructions after the loop

11 There are also two available variants of the LOOP instruction: LOOPE jump if CX is not equal to 0 and ZF=1, LOOPNE jump if CX is not equal to 0 and ZF=0 EXAMPLE. The loop with an additional test for equality of AX and BX registers' values. mov cx, N theloop: ; inside loop instructions cmp ax,bx loopne theloop ; instructions after the loop Equally important is the JMP instruction, which jumps unconditionally (always) to a given address (label).

12 Function calling support instructions Function calling support instructions are assembly counterparts of function calls and return instructions in hi-level programming languages. CALL label jumps to an address specified by a label. Before making an actual jump it stores the return address on the processor's stack, i.e. the address of the next instruction after the call instruction. This enables proper return when the called function ends. RET return from a function. Jump to an address which is located on the processor's stack top. By default it's the address stored by a recent call instruction (see above), which called the function. EXAMPLE. call function ; next instruction... function: ; function instructions ret ;jumps to a 'next instruction' above

13 Interrupt support instructions Interrupt support instructions are very similar to CALL and RET instructions, except that they are intended to simulate in software an external interrupt occurrence. INT number cause an interrupt with a number equal to number. causes an interrupt. The processor reacts as if truly an external interrupt occured, i.e. it checks an interrupt table to determine the address of an interrupt routine (number argument), it stores on a stack a return address of a next instruction after the simulated interrupt (after INT instruction). It also stores FLAGS register. IRET works identiaclly as RET, but additionally, upon return, it retrieves FALGS register form the processor's stack, which was earlier stored by the INT instruction. EXAMPLE. int 09h ; perform simulated interrupt by jumping to an address ; located at 09h-th entry in an interrupt table ; next instruction int09h: ; interrupt handler instructions iret ;jumps to a 'next instruction' above

14 State changing instructions State changing instructions set or clear chosen bits (flags) in a processor's FLAGS regiser, changing processor's internal operating modes. STC Set carry flag CLC Clear carry flag Useful for arithmetical operations behavior STD Set direction flag. CLD Clear direction flag, Direction is used in string and loop operations determining weather the CX iterating register should be incremented or decremented when performing consecutive string or loop operations. STI set interrupt flag, CLI clear interrupt flag, Enable and disable interrupts.

15 Privileged instructions Privileged instructions are instructions which can only be executed when they are contained in a code segment with the highest privilege level attribute (set in a global or local descriptor tables). Normally only an operating system code contains such segments and all other code, i.e. applications' code is placed in segments with lowest privilege level, which means that applications cannot execute privileged instructions. Privileged instructions are thus a part of the protected mode system implemented in IA32 processors. LGDT LIDT LLDT load global descriptor table register, load interrupt descriptor table register, load local descriptor table register. Applications cannot load processors' descriptor tables. Only an operating system can do that. IN OUT read a value from a given port write a value to a given port Applications cannot access or program external devices (printer, sound card, network card, video card, keyboard). Only an operating system can do that.

16 Thank you for today's lecture