GDB and Makefile. Bin Li Assistant Professor Dept. of Electrical, Computer and Biomedical Engineering University of Rhode Island

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1 GDB and Makefile Bin Li Assistant Professor Dept. of Electrical, Computer and Biomedical Engineering University of Rhode Island

2 GDB Debugging: An Example #include<stdio.h> void main() { int i; int result = 0; for (i=1;i<=100;i++) { result += i; } printf( result=%d\n, result); }

3 GDB Debugging: Main Steps 1. compile program gcc g test.c o test 2. start GDB gdb test 3. set breaking point break main 4. run program run 5. program execution continue to the next source line : next 6. resume program execution : continue

4 GDB Commands list(l):list source code break(b) function break(b) line break(b) file: line break (b) line if condition e.g., break 6 if i=10

5 GDB Commands Info break : check all possible breakpoints delete [breakpoint number]: delete # breakpoint Without arguments deletes all breakpoints run(r): run program next(n): program execution continue to the next source line, omitting function calls step(s): program execution continue to next source line, going into function calls continue(c): resume program execution

6 GDB Commands print(p) variable : check the value of a variable finish: forced return (from a function) watch variable: stops whenever the value of the variable changes quit(q):quit GDB

7 Makefile Provide a way for separate compilation Describe the dependencies among the project files make utility

8 Makefile (Cont ) The make utility in Unix is one of the original tools designed by S. I. Fieldman of AT&T Bell labs circa What is make?: The tool is designed to allow programmers to efficiently compile large complex programs with many components easily. You can place the commands to compile a program in a Unix script but this will cause ALL modules to be compiled every time. The make utility allows us to only compile those that have changed and the modules that depend upon them.

9 Example hello: main.o func1.o func2.o gcc main.o func1.o func2.o o hello main.o: main.c gcc c main.c func1.o: func1.c gcc c func1.c func2.o: func2.c gcc c func2.c.phony : clean clean: rm f hello main.o func1.o func2.o main.o main.c hello func1.o func1.c clean func2.o func2.c

10 Using Makefile Naming: makefile or Makefile are standard Other name can be also used Running make Make make f filename if the name of your file is not makefile or Makefile

11 Main Components Rules Variables (macros) # sign comments everything till the end of the line \ sign to separate one command line on two rows

12 Rules Makefiles main element is called a rule target : dependencies TAB commands # shell commands hello: main.o func1.o func2.o gcc main.o func1.o func2.o o hello main.o: main.c gcc c main.c func1.o: func1.c gcc c func1.c func2.o: func2.c gcc c func2.c.phony : clean clean: rm f hello main.o func1.o func2.o

13 Variables (macros) hello: main.o func1.o func2.o gcc main.o func1.o func2.o o hello Question: how do you add an additional dependency, say func3.o? Answer 1: hello: main.o func1.o func2.o func3.o gcc main.o func1.o func2.o func3.o o hello Answer 2: obj=main.o func1.o func2.o func3.o hello:$(obj) gcc $(obj) o hello

14 Automatic Variables hello: main.o func1.o func2.o gcc main.o func1.o func2.o o hello S@: The name of the target of the rule (hello) S<: The name of the first dependency (main.o) S^: The names of all the dependencies (main.o, func1.o, func2.o) hello: main.o func1.o func2.o gcc S^ -o S@

15 Phony Targets Targets that have no dependencies. Used only as names for commands that you want to execute. To invoke it: make clean hello: main.o func1.o func2.o gcc main.o func1.o func2.o o hello main.o: main.c gcc c main.c func1.o: func1.c gcc c func1.c func2.o: func2.c gcc c func2.c.phony : clean clean: rm f hello main.o func1.o func2.o

16 Inference Rules Inference rules are a method of generalizing the build process. In essence, it is a sort of wild card notation. The % is used to indicate a wild card. Example: %.obj : %.c $(CC) $(FLAGS) c $(SOURCE) All.obj files have dependencies of all %.c files of the same name.

17 An Example TARGET = myname_lab1assignment CROSS_COMPILE = arm-linux-gnueabihf- CFLAGS = -static -g -Wall -I $(HOME)/Documents/C_Projects/include -Dsoc_cv_av LDFLAGS = -g -Wall CC = $(CROSS_COMPILE)gcc ARCH= arm build: $(TARGET) $(TARGET): main.o fpga.o $(CC) $(LDFLAGS) $^ -o $@ -lpthread -lrt %.o : %.c $(CC) $(CFLAGS) -c $< -o $@.PHONY: clean clean: rm -f $(TARGET) *.a *.o *~

18 Misc hello: hello.c o cancel echo command

Makefiles SE 2XA3. Term I, 2018/19

Makefiles SE 2XA3. Term I, 2018/19 Makefiles SE 2XA3 Term I, 2018/19 Outline Example Calling make Syntax How it works Macros Suffix rules Command line options Example Assume we have files main.c, test.c, and lo.asm Consider the makefile