COE608: Computer Organization and Architecture
|
|
- Rodger Scott
- 5 years ago
- Views:
Transcription
1 Add on Instruction Set Architecture COE608: Computer Organization and Architecture Dr. Gul N. Khan Electrical and Computer Engineering Ryerson University Overview More MIPS Instructions Alternative Architecture ARM CPU - ISA IA-32/x86 ISA Chapter 2 of the Text G. Khan Computer Organization & Architecture COE608: ISA and IS Design Page: 1
2 Instruction Set Design Main Goals Maximize performance, minimize cost and reduce design time software instructions hardware Between Software and Hardware Which is easier to modify? G. Khan Computer Organization & Architecture COE608: ISA and IS Design Page: 2
3 Switch Statement Choose among four alternatives depending on whether k has the value 0, 1, 2 or 3. Compile the following C code manually: switch (k) { case 0: f = i+j; break; case 1: f = g+h; break; case 2: f = g h; break; case 3: f = i j; break; } Rewrite it as a chain of if-else statements, which we already know how to compile: if (k = = 0) f = i+j; else if (k = = 1) f = g+h; else if (k = = 2) f = g h; else if (k = = 3) f = i j; Using the following mapping: f:$s0, g:$s1, h:$s2, i:$s3, j:$s4, k:$s5 G. Khan Computer Organization & Architecture COE608: ISA and IS Design Page: 3
4 Switch Statement Final compiled MIPS code: bne $s5, $0, L1 add $s0, $s3, $s4 j Exit L1: addi $t0, $s5, -1 bne $t0, $0, L2 add $s0, $s1, $s2 j Exit L2: addi $t0, $s5, -2 bne $t0, $0, L3 sub $s0, $s1, $s2 j Exit L3: addi $t0, $s5, -3 bne $t0, $0, Exit sub $s0, $s3, $s4 Exit: G. Khan Computer Organization & Architecture COE608: ISA and IS Design Page: 4
5 Function/Procedure Call Registers play a major role in keeping track of information for function calls. MIPS Registers The constant 0 $0 $zero Reserved for Assembler $1 $at Return Values $2-$3 $v0-$v1 Arguments $4-$7 $a0-$a3 Temporary $8-$15 $t0-$t7 Saved $16-$23 $s0-$s7 More Temporary $24-$25 $t8-$t9 Used by Kernel $26-27 $k0-$k1 Global Pointer $28 $gp Stack Pointer $29 $sp Frame Pointer $30 $fp Return Address $31 $ra... sum( a, b );... // a, b: $s0,$s1 int sum( int x, int y) { return x + y; } 1000 add $a0,$s0,$zero 1004 add $a1,$s1,$zero 1008 addi $ra,$zero, j sum sum: add $v0,$a0,$a jr $ra G. Khan Computer Organization & Architecture COE608: ISA and IS Design Page: 5
6 Another Procedure Call G. Khan Computer Organization & Architecture COE608: ISA and IS Design Page: 6
7 Function/Procedure Call Why use jr here? Why not simply use j? Procedure return: jump register jr $ra Copies $ra to program counter Can also be used for computed jumps e.g. for case/switch statements Procedure call: jump and link jal Procedure-Label Address of following instruction put in $ra Jumps to target address Single instruction to jump and save return address: jump and link (jal) With jr $ra as part of sum 1008 addi $ra,$zero,1016 #$ra= j sum #goto sumwith jal 1008 jal sum # $ra=1012,goto sum Why have a jal? G. Khan Computer Organization & Architecture COE608: ISA and IS Design Page: 7
8 Function/Procedure Call Support Syntax for jal (jump link) is same as for j (jump): jal label jal should really be called link and jump : Step 1 (link): Save address of next instruction into $ra (Why next instruction? Why not current one?) Step 2 (jump): Jump to the given label Nested Procedures call other procedures For nested call, caller needs to save on the stack: Its return address Arguments and temporaries needed after the call Restore from the stack after the call C code: int fact (int n) { if (n < 1) return f; else return n * fact(n - 1); } Argument n in $a0 Result in $v0 G. Khan Computer Organization & Architecture COE608: ISA and IS Design Page: 8
9 Nested Procedure Call Support MIPS code: fact: addi $sp,$sp,-8:adjust stack for 2 items sw sw $a0,0($sp) :save argument slti $t0,$a0, 1 :test for n < 1 beq $t0,$zero, L1 addi $v0,$zero, 1 :yes, result is 1 addi $sp,$sp, 8 :pop 2 items from jr $ra :stack and return $ra,4($sp) :save return address L1: addi $a0,$a0,-1 :else decrement n jal fact :recursive call lw $a0,0($sp) :restore original n lw $ra,4($sp) :and return address addi $sp,$sp,8 :pop 2 items from stack mul $v0,$a0,$v0 : multiply to get jr $ra :result and return G. Khan Computer Organization & Architecture COE608: ISA and IS Design Page: 9
10 ARM & MIPS Similarities ARM: the most popular embedded CPU core. ARM and MIPS CPUs have a similar basic set of instructions. Date announced Instruction size Address space Data alignment Data addressing Registers Input/output ARM bits 32-bit flat Aligned bit Mem-mapped MIPS bits 32-bit flat Aligned bit Mem-mapped Compare and Branch in ARM Uses condition codes for result of an arithmetic or logical instruction Compare instructions to set condition codes without keeping the result Each instruction can be conditional Top 4 bits of instruction word: condition value Can avoid branches over single instructions G. Khan Computer Organization & Architecture COE608: ISA and IS Design Page: 10
11 The Intel x86 ISA Evolution and backward compatibility 8080 (1974): 8-bit microprocessor Accumulator, plus 3 index-register pairs 8086 (1978): 16-bit extension to 8080 Complex instruction set (CISC) 8087 (1980): floating-point coprocessor Adds FP instructions and register stack (1982): 24-bit addresses, MMU Segmented memory mapping and protection (1985): 32-bit extension (IA-32) Additional addressing modes and operations Paged memory mapping as well as segments i486 (1989): pipelined, on-chip caches/fpu Compatible competitors: AMD, Cyrix, Pentium (1993): super-scalar, 64-bit datapath Later versions added MMX instructions The infamous FDIV bug Pentium Pro (1995), Pentium II (1997) New micro-architecture Pentium III (1999) Added SSE (Streaming SIMD Extensions) and associated registers Pentium 4 (2001) New micro-architecture & added SSE2 instructions G. Khan Computer Organization & Architecture COE608: ISA and IS Design Page: 11
12 Basic x86 Registers Register Set G. Khan Computer Organization & Architecture COE608: ISA and IS Design Page: 12
13 x86 Instruction Formats Variable length encoding Postfix bytes specify addressing mode Prefix bytes modify operation Operand length, repetition, locking, G. Khan Computer Organization & Architecture COE608: ISA and IS Design Page: 13
14 Implementing IA-32 Complex instruction set makes implementation difficult Hardware translates instructions to simpler micro-operations Simple instructions: 1 1 Complex instructions: 1 many Micro-engine similar to RISC Market share makes it economically viable Comparable performance to RISC Compilers avoid complex instructions G. Khan Computer Organization & Architecture COE608: ISA and IS Design Page: 14
15 Typical Instructions of IA 32 G. Khan Computer Organization & Architecture COE608: ISA and IS Design Page: 15
16 Fallacies Powerful instruction higher performance Fewer instructions required But complex instructions are hard to implement May slow down all instructions, including simple ones Compilers are good at making fast code from simple instructions Use assembly code for high performance But modern compilers are better at dealing with modern processors More lines of code more errors and less productivity G. Khan Computer Organization & Architecture COE608: ISA and IS Design Page: 16
Procedure Calling. Procedure Calling. Register Usage. 25 September CSE2021 Computer Organization
CSE2021 Computer Organization Chapter 2: Part 2 Procedure Calling Procedure (function) performs a specific task and return results to caller. Supporting Procedures Procedure Calling Calling program place
More informationInstruction Set Design and Architecture
Instruction Set Design and Architecture COE608: Computer Organization and Architecture Dr. Gul N. Khan http://www.ee.ryerson.ca/~gnkhan Electrical and Computer Engineering Ryerson University Overview Computer
More informationComputer Systems Laboratory Sungkyunkwan University
ARM & IA-32 Jin-Soo Kim (jinsookim@skku.edu) Computer Systems Laboratory Sungkyunkwan University http://csl.skku.edu ARM (1) ARM & MIPS similarities ARM: the most popular embedded core Similar basic set
More informationEJEMPLOS DE ARQUITECTURAS
Maestría en Electrónica Arquitectura de Computadoras Unidad 4 EJEMPLOS DE ARQUITECTURAS M. C. Felipe Santiago Espinosa Marzo/2017 ARM & MIPS Similarities ARM: the most popular embedded core Similar basic
More informationCS3350B Computer Architecture MIPS Procedures and Compilation
CS3350B Computer Architecture MIPS Procedures and Compilation Marc Moreno Maza http://www.csd.uwo.ca/~moreno/cs3350_moreno/index.html Department of Computer Science University of Western Ontario, Canada
More informationTwo processors sharing an area of memory. P1 writes, then P2 reads Data race if P1 and P2 don t synchronize. Result depends of order of accesses
Synchronization Two processors sharing an area of memory P1 writes, then P2 reads Data race if P1 and P2 don t synchronize Result depends of order of accesses Hardware support required Atomic read/write
More informationComputer Architecture. Chapter 2-2. Instructions: Language of the Computer
Computer Architecture Chapter 2-2 Instructions: Language of the Computer 1 Procedures A major program structuring mechanism Calling & returning from a procedure requires a protocol. The protocol is a sequence
More informationLECTURE 2: INSTRUCTIONS
LECTURE 2: INSTRUCTIONS Abridged version of Patterson & Hennessy (2013):Ch.2 Instruction Set The repertoire of instructions of a computer Different computers have different instruction sets But with many
More informationMIPS ISA-II: Procedure Calls & Program Assembly
MIPS ISA-II: Procedure Calls & Program Assembly Module Outline Reiew ISA and understand instruction encodings Arithmetic and Logical Instructions Reiew memory organization Memory (data moement) instructions
More informationCOMP 303 Computer Architecture Lecture 3. Comp 303 Computer Architecture
COMP 303 Computer Architecture Lecture 3 Comp 303 Computer Architecture 1 Supporting procedures in computer hardware The execution of a procedure Place parameters in a place where the procedure can access
More informationChapter 2. Instructions: Language of the Computer. HW#1: 1.3 all, 1.4 all, 1.6.1, , , , , and Due date: one week.
Chapter 2 Instructions: Language of the Computer HW#1: 1.3 all, 1.4 all, 1.6.1, 1.14.4, 1.14.5, 1.14.6, 1.15.1, and 1.15.4 Due date: one week. Practice: 1.5 all, 1.6 all, 1.10 all, 1.11 all, 1.14 all,
More informationChapter 2. Computer Abstractions and Technology. Lesson 4: MIPS (cont )
Chapter 2 Computer Abstractions and Technology Lesson 4: MIPS (cont ) Logical Operations Instructions for bitwise manipulation Operation C Java MIPS Shift left >>> srl Bitwise
More informationThomas Polzer Institut für Technische Informatik
Thomas Polzer tpolzer@ecs.tuwien.ac.at Institut für Technische Informatik Branch to a labeled instruction if a condition is true Otherwise, continue sequentially beq rs, rt, L1 if (rs == rt) branch to
More informationBranch Addressing. Jump Addressing. Target Addressing Example. The University of Adelaide, School of Computer Science 28 September 2015
Branch Addressing Branch instructions specify Opcode, two registers, target address Most branch targets are near branch Forward or backward op rs rt constant or address 6 bits 5 bits 5 bits 16 bits PC-relative
More informationComputer Architecture Computer Science & Engineering. Chapter 2. Instructions: Language of the Computer BK TP.HCM
Computer Architecture Computer Science & Engineering Chapter 2 Instructions: Language of the Computer Computer Component 25-Aug-16 Faculty of Computer Science & Engineering 2 Instruction execution process
More informationChapter 2. Baback Izadi Division of Engineering Programs
Chapter 2 Baback Izadi Division of Engineering Programs bai@engr.newpaltz.edu Instruction Set Language of the Machine The repertoire of instructions of a computer Different computers have different instruction
More informationComputer Architecture
CS3350B Computer Architecture Winter 2015 Lecture 4.3: MIPS ISA -- Procedures, Compilation Marc Moreno Maza www.csd.uwo.ca/courses/cs3350b [Adapted from lectures on Computer Organization and Design, Patterson
More informationStored Program Concept. Instructions: Characteristics of Instruction Set. Architecture Specification. Example of multiple operands
Stored Program Concept Instructions: Instructions are bits Programs are stored in memory to be read or written just like data Processor Memory memory for data, programs, compilers, editors, etc. Fetch
More informationControl Instructions. Computer Organization Architectures for Embedded Computing. Thursday, 26 September Summary
Control Instructions Computer Organization Architectures for Embedded Computing Thursday, 26 September 2013 Many slides adapted from: Computer Organization and Design, Patterson & Hennessy 4th Edition,
More informationControl Instructions
Control Instructions Tuesday 22 September 15 Many slides adapted from: and Design, Patterson & Hennessy 5th Edition, 2014, MK and from Prof. Mary Jane Irwin, PSU Summary Previous Class Instruction Set
More informationRechnerstrukturen. Chapter 2. Instructions: Language of the Computer
182.690 Rechnerstrukturen Chapter 2 Instructions: Language of the Computer Instruction Set The repertoire of instructions of a computer Different computers have different instruction sets But with many
More informationComputer Science 324 Computer Architecture Mount Holyoke College Fall Topic Notes: MIPS Instruction Set Architecture
Computer Science 324 Computer Architecture Mount Holyoke College Fall 2007 Topic Notes: MIPS Instruction Set Architecture vonneumann Architecture Modern computers use the vonneumann architecture. Idea:
More informationChapter 2. Instructions: Language of the Computer
Chapter 2 Instructions: Language of the Computer Instruction Set The range of instructions of a computer Different computers have different instruction sets But with many aspects in common Early computers
More informationChapter 2. Instructions: Language of the Computer
Chapter 2 Instructions: Language of the Computer Instruction Set The repertoire of instructions of a computer Different computers have different instruction sets But with many aspects in common Early computers
More informationCSCI 402: Computer Architectures. Instructions: Language of the Computer (4) Fengguang Song Department of Computer & Information Science IUPUI
CSCI 402: Computer Architectures Instructions: Language of the Computer (4) Fengguang Song Department of Computer & Information Science IUPUI op Instruction address 6 bits 26 bits Jump Addressing J-type
More informationCS 61C: Great Ideas in Computer Architecture More MIPS, MIPS Functions
CS 61C: Great Ideas in Computer Architecture More MIPS, MIPS Functions Instructors: John Wawrzynek & Vladimir Stojanovic http://inst.eecs.berkeley.edu/~cs61c/fa15 1 Machine Interpretation Levels of Representation/Interpretation
More informationCOMPUTER ORGANIZATION AND DESIGN. 5 th Edition. The Hardware/Software Interface. Chapter 2. Instructions: Language of the Computer
COMPUTER ORGANIZATION AND DESIGN The Hardware/Software Interface 5 th Edition Chapter 2 Instructions: Language of the Computer Instruction Set The repertoire of instructions of a computer Different computers
More informationChapter 2. Instructions: Language of the Computer. Adapted by Paulo Lopes
Chapter 2 Instructions: Language of the Computer Adapted by Paulo Lopes Instruction Set The repertoire of instructions of a computer Different computers have different instruction sets But with many aspects
More informationInstructions: MIPS arithmetic. MIPS arithmetic. Chapter 3 : MIPS Downloaded from:
Instructions: Chapter 3 : MIPS Downloaded from: http://www.cs.umr.edu/~bsiever/cs234/ Language of the Machine More primitive than higher level languages e.g., no sophisticated control flow Very restrictive
More informationChapter 2A Instructions: Language of the Computer
Chapter 2A Instructions: Language of the Computer Copyright 2009 Elsevier, Inc. All rights reserved. Instruction Set The repertoire of instructions of a computer Different computers have different instruction
More informationInequalities in MIPS (2/4) Inequalities in MIPS (1/4) Inequalities in MIPS (4/4) Inequalities in MIPS (3/4) UCB CS61C : Machine Structures
CS61C L8 Introduction to MIPS : Decisions II & Procedures I (1) Instructor Paul Pearce inst.eecs.berkeley.edu/~cs61c UCB CS61C : Machine Structures http://www.xkcd.org/627/ Lecture 8 Decisions & and Introduction
More informationCS 110 Computer Architecture Lecture 6: More MIPS, MIPS Functions
CS 110 Computer Architecture Lecture 6: More MIPS, MIPS Functions Instructor: Sören Schwertfeger http://shtech.org/courses/ca/ School of Information Science and Technology SIST ShanghaiTech University
More informationChapter 2. lw $s1,100($s2) $s1 = Memory[$s2+100] sw $s1,100($s2) Memory[$s2+100] = $s1
Chapter 2 1 MIPS Instructions Instruction Meaning add $s1,$s2,$s3 $s1 = $s2 + $s3 sub $s1,$s2,$s3 $s1 = $s2 $s3 addi $s1,$s2,4 $s1 = $s2 + 4 ori $s1,$s2,4 $s2 = $s2 4 lw $s1,100($s2) $s1 = Memory[$s2+100]
More informationCOMPUTER ORGANIZATION AND DESIGN. 5 th Edition. The Hardware/Software Interface. Chapter 2. Instructions: Language of the Computer
COMPUTER ORGANIZATION AND DESIGN The Hardware/Software Interface 5 th Edition Chapter 2 Instructions: Language of the Computer Instruction Set The repertoire of instructions of a computer Different computers
More informationChapter 2. Instructions: Language of the Computer
Chapter 2 Instructions: Language of the Computer Instruction Set The repertoire of instructions of a computer Different computers have different instruction sets But with many aspects in common Early computers
More informationReview of instruction set architectures
Review of instruction set architectures Outline ISA and Assembly Language RISC vs. CISC Instruction Set Definition (MIPS) 2 ISA and assembly language Assembly language ISA Machine language 3 Assembly language
More informationChapter 3 MIPS Assembly Language. Ó1998 Morgan Kaufmann Publishers 1
Chapter 3 MIPS Assembly Language Ó1998 Morgan Kaufmann Publishers 1 Instructions: Language of the Machine More primitive than higher level languages e.g., no sophisticated control flow Very restrictive
More informationChapter 2. Instructions: Language of the Computer. Baback Izadi ECE Department
Chapter 2 Instructions: Language of the Computer Baback Izadi ECE Department bai@engr.newpaltz.edu Instruction Set Language of the Machine The repertoire of instructions of a computer Different computers
More informationInstruction Set. The MIPS Instruction Set. Chapter 2
COMPUTER ORGANIZATION AND DESIGN The Hardware/Software Interface 5 th Edition 1 Chapter 2 Instructions: Language of the Computer Instruction Set The repertoire of instructions of a computer Different computers
More informationCSE 141 Computer Architecture Spring Lecture 3 Instruction Set Architecute. Course Schedule. Announcements
CSE141: Introduction to Computer Architecture CSE 141 Computer Architecture Spring 2005 Lecture 3 Instruction Set Architecute Pramod V. Argade April 4, 2005 Instructor: TAs: Pramod V. Argade (p2argade@cs.ucsd.edu)
More informationECE 486/586. Computer Architecture. Lecture # 8
ECE 486/586 Computer Architecture Lecture # 8 Spring 2015 Portland State University Lecture Topics Instruction Set Principles MIPS Control flow instructions Dealing with constants IA-32 Fallacies and Pitfalls
More informationComputer Architecture
Computer Architecture Chapter 2 Instructions: Language of the Computer Fall 2005 Department of Computer Science Kent State University Assembly Language Encodes machine instructions using symbols and numbers
More informationCOMPUTER ORGANIZATION AND DESIGN
COMPUTER ORGANIZATION AND DESIGN 5 th The Hardware/Software Interface Edition Chapter 2 Instructions: Language of the Computer 2.1 Introduction Instruction Set The repertoire of instructions of a computer
More informationLecture Topics. Branch Condition Options. Branch Conditions ECE 486/586. Computer Architecture. Lecture # 8. Instruction Set Principles.
ECE 486/586 Computer Architecture Lecture # 8 Spring 2015 Portland State University Instruction Set Principles MIPS Control flow instructions Dealing with constants IA-32 Fallacies and Pitfalls Reference:
More informationMIPS R-format Instructions. Representing Instructions. Hexadecimal. R-format Example. MIPS I-format Example. MIPS I-format Instructions
Representing Instructions Instructions are encoded in binary Called machine code MIPS instructions Encoded as 32-bit instruction words Small number of formats encoding operation code (opcode), register
More informationMore C functions and Big Picture [MIPSc Notes]
More C functions and Big Picture [MIPSc Notes] Implementing C functions Passing parameters Local variables Stack frames Big picture Compiling Assembling Passing parameters by value or reference Galen H.
More informationInstruction Set Architecture. "Speaking with the computer"
Instruction Set Architecture "Speaking with the computer" The Instruction Set Architecture Application Compiler Instr. Set Proc. Operating System I/O system Instruction Set Architecture Digital Design
More informationReduced Instruction Set Computer (RISC)
Reduced Instruction Set Computer (RISC) Focuses on reducing the number and complexity of instructions of the ISA. RISC Goals RISC: Simplify ISA Simplify CPU Design Better CPU Performance Motivated by simplifying
More informationSystems Architecture I
Systems Architecture I Topics Assemblers, Linkers, and Loaders * Alternative Instruction Sets ** *This lecture was derived from material in the text (sec. 3.8-3.9). **This lecture was derived from material
More informationDo-While Example. In C++ In assembly language. do { z--; while (a == b); z = b; loop: addi $s2, $s2, -1 beq $s0, $s1, loop or $s2, $s1, $zero
Do-While Example In C++ do { z--; while (a == b); z = b; In assembly language loop: addi $s2, $s2, -1 beq $s0, $s1, loop or $s2, $s1, $zero 25 Comparisons Set on less than (slt) compares its source registers
More informationInstructions: Language of the Computer. Euiseong Seo Computer Systems Laboratory Sungkyunkwan University
Instructions: Language of the Computer Euiseong Seo (euiseong@skku.edu) Computer Systems Laboratory Sungkyunkwan University http://csl.skku.edu Instruction Set The repertoire of instructions of a computer
More informationCENG3420 Lecture 03 Review
CENG3420 Lecture 03 Review Bei Yu byu@cse.cuhk.edu.hk 2017 Spring 1 / 38 CISC vs. RISC Complex Instruction Set Computer (CISC) Lots of instructions of variable size, very memory optimal, typically less
More informationReduced Instruction Set Computer (RISC)
Reduced Instruction Set Computer (RISC) Reduced Instruction Set Computer (RISC) Focuses on reducing the number and complexity of instructions of the machine. Reduced number of cycles needed per instruction.
More informationComputer Science 324 Computer Architecture Mount Holyoke College Fall Topic Notes: MIPS Instruction Set Architecture
Computer Science 324 Computer Architecture Mount Holyoke College Fall 2009 Topic Notes: MIPS Instruction Set Architecture vonneumann Architecture Modern computers use the vonneumann architecture. Idea:
More informationChapter 3. Instructions:
Chapter 3 1 Instructions: Language of the Machine More primitive than higher level languages e.g., no sophisticated control flow Very restrictive e.g., MIPS Arithmetic Instructions We ll be working with
More informationELEC / Computer Architecture and Design Fall 2013 Instruction Set Architecture (Chapter 2)
ELEC 5200-001/6200-001 Computer Architecture and Design Fall 2013 Instruction Set Architecture (Chapter 2) Victor P. Nelson, Professor & Asst. Chair Vishwani D. Agrawal, James J. Danaher Professor Department
More informationECE468 Computer Organization & Architecture. MIPS Instruction Set Architecture
ECE468 Computer Organization & Architecture MIPS Instruction Set Architecture ECE468 Lec4.1 MIPS R2000 / R3000 Registers 32-bit machine --> Programmable storage 2^32 x bytes 31 x 32-bit GPRs (R0 = 0) 32
More informationEEC 581 Computer Architecture Lecture 1 Review MIPS
EEC 581 Computer Architecture Lecture 1 Review MIPS 1 Supercomputing: Suddenly Fancy 2 1 Instructions: Language of the Machine More primitive than higher level languages e.g., no sophisticated control
More informationChapter 2. Instructions: Language of the Computer. Jiang Jiang
Chapter 2 Instructions: Language of the Computer Jiang Jiang jiangjiang@ic.sjtu.edu.cn [Adapted from Computer Organization and Design, 4 th Edition, Patterson & Hennessy, 2008, MK] Chapter 2 Instructions:
More informationMachine Language Instructions Introduction. Instructions Words of a language understood by machine. Instruction set Vocabulary of the machine
Machine Language Instructions Introduction Instructions Words of a language understood by machine Instruction set Vocabulary of the machine Current goal: to relate a high level language to instruction
More informationInstruction Set Architectures
Lecture 2 Instruction Set Architectures Dr. Soner Onder CS 4431 Michigan Technological University 09/04/12 1 Instruction Set Architecture (ISA) 1950s to 1960s: Computer Architecture Course Computer Arithmetic
More informationUCB CS61C : Machine Structures
inst.eecs.berkeley.edu/~cs61c UCB CS61C : Machine Structures Lecture 10 Introduction to MIPS Procedures I Sr Lecturer SOE Dan Garcia 2014-02-14 If cars broadcast their speeds to other vehicles (and the
More informationCS61C : Machine Structures
inst.eecs.berkeley.edu/~cs61c CS61C : Machine Structures Lecture 11 Introduction to MIPS Procedures I Lecturer PSOE Dan Garcia www.cs.berkeley.edu/~ddgarcia CS61C L11 Introduction to MIPS: Procedures I
More informationArchitecture II. Computer Systems Laboratory Sungkyunkwan University
MIPS Instruction ti Set Architecture II Jin-Soo Kim (jinsookim@skku.edu) Computer Systems Laboratory Sungkyunkwan University http://csl.skku.edu Making Decisions (1) Conditional operations Branch to a
More informationMIPS Functions and Instruction Formats
MIPS Functions and Instruction Formats 1 The Contract: The MIPS Calling Convention You write functions, your compiler writes functions, other compilers write functions And all your functions call other
More informationComputer Organization and Structure. Bing-Yu Chen National Taiwan University
Computer Organization and Structure Bing-Yu Chen National Taiwan University Instructions: Language of the Computer Operations and Operands of the Computer Hardware Signed and Unsigned Numbers Representing
More informationLecture 4: MIPS Instruction Set
Lecture 4: MIPS Instruction Set No class on Tuesday Today s topic: MIPS instructions Code examples 1 Instruction Set Understanding the language of the hardware is key to understanding the hardware/software
More informationLecture 7: Procedures
Lecture 7: Procedures CSE 30: Computer Organization and Systems Programming Winter 2010 Rajesh Gupta / Ryan Kastner Dept. of Computer Science and Engineering University of California, San Diego Outline
More informationECE369. Chapter 2 ECE369
Chapter 2 1 Instruction Set Architecture A very important abstraction interface between hardware and low-level software standardizes instructions, machine language bit patterns, etc. advantage: different
More informationTopic Notes: MIPS Instruction Set Architecture
Computer Science 220 Assembly Language & Comp. Architecture Siena College Fall 2011 Topic Notes: MIPS Instruction Set Architecture vonneumann Architecture Modern computers use the vonneumann architecture.
More informationChapter 2. Instructions: Language of the Computer
Chapter 2 Instructions: Language of the Computer Instruction Set The repertoire of instructions of a computer Different computers have different instruction sets But with many aspects in common Early computers
More informationCS222: MIPS Instruction Set
CS222: MIPS Instruction Set Dr. A. Sahu Dept of Comp. Sc. & Engg. Indian Institute of Technology Guwahati 1 Outline Previous Introduction to MIPS Instruction Set MIPS Arithmetic's Register Vs Memory, Registers
More information2.7 Supporting Procedures in hardware. Why procedures or functions? Procedure calls
2.7 Supporting Procedures in hardware Why procedures or functions? Procedure calls Caller: Callee: Proc save registers save more registers set up parameters do function call procedure set up results get
More informationCS 61C: Great Ideas in Computer Architecture Intro to Assembly Language, MIPS Intro
CS 61C: Great Ideas in Computer Architecture Intro to Assembly Language, MIPS Intro Instructors: Krste Asanovic & Vladimir Stojanovic h>p://inst.eecs.berkeley.edu/~cs61c/sp15 1 Machine Interpreta4on Levels
More informationCommunicating with People (2.8)
Communicating with People (2.8) For communication Use characters and strings Characters 8-bit (one byte) data for ASCII lb $t0, 0($sp) ; load byte Load a byte from memory, placing it in the rightmost 8-bits
More informationCS61C : Machine Structures
inst.eecs.berkeley.edu/~cs61c/su05 CS61C : Machine Structures Lecture #8: MIPS Procedures 2005-06-30 CS 61C L08 MIPS Procedures (1) Andy Carle Topic Outline Functions More Logical Operations CS 61C L08
More informationChapter 2. Instructions: Language of the Computer
Chapter 2 Instructions: Language g of the Computer Outlines Introduction to MIPS machine Operations of the Computer HW Operands of the Computer HW Representing instructions in the Computer Logical Operations
More informationLecture 2. Instructions: Language of the Computer (Chapter 2 of the textbook)
Lecture 2 Instructions: Language of the Computer (Chapter 2 of the textbook) Instructions: tell computers what to do Chapter 2 Instructions: Language of the Computer 2 Introduction Chapter 2.1 Chapter
More informationLecture 5: Procedure Calls
Lecture 5: Procedure Calls Today s topics: Procedure calls and register saving conventions 1 Example Convert to assembly: while (save[i] == k) i += 1; i and k are in $s3 and $s5 and base of array save[]
More informationCS/COE1541: Introduction to Computer Architecture
CS/COE1541: Introduction to Computer Architecture Dept. of Computer Science University of Pittsburgh http://www.cs.pitt.edu/~melhem/courses/1541p/index.html 1 Computer Architecture? Application pull Operating
More information1 5. Addressing Modes COMP2611 Fall 2015 Instruction: Language of the Computer
1 5. Addressing Modes MIPS Addressing Modes 2 Addressing takes care of where to find data instruction We have seen, so far three addressing modes of MIPS (to find data): 1. Immediate addressing: provides
More informationcomp 180 Lecture 10 Outline of Lecture Procedure calls Saving and restoring registers Summary of MIPS instructions
Outline of Lecture Procedure calls Saving and restoring registers Summary of MIPS instructions Procedure Calls A procedure of a subroutine is like an agent which needs certain information to perform a
More informationChapter 2. Instructions: Language of the Computer
Chapter 2 Instructions: Language of the Computer Instruction Set The repertoire of instructions of a computer Different computers have different instruction sets But with many aspects in common Early computers
More informationMachine Instructions - II. Hwansoo Han
Machine Instructions - II Hwansoo Han Conditional Operations Instructions for making decisions Alter the control flow - change the next instruction to be executed Branch to a labeled instruction if a condition
More informationMIPS Instruction Set Architecture (2)
MIPS Instruction Set Architecture (2) Jinkyu Jeong (jinkyu@skku.edu) Computer Systems Laboratory Sungkyunkwan University http://csl.skku.edu EEE3050: Theory on Computer Architectures, Spring 2017, Jinkyu
More informationChapter 2. Instruction Set Architecture (ISA)
Chapter 2 Instruction Set Architecture (ISA) MIPS arithmetic Design Principle: simplicity favors regularity. Why? Of course this complicates some things... C code: A = B + C + D; E = F - A; MIPS code:
More informationComputer Architecture. MIPS Instruction Set Architecture
Computer Architecture MIPS Instruction Set Architecture Instruction Set Architecture An Abstract Data Type Objects Registers & Memory Operations Instructions Goal of Instruction Set Architecture Design
More informationCS 61C: Great Ideas in Computer Architecture (Machine Structures) More MIPS Machine Language
CS 61C: Great Ideas in Computer Architecture (Machine Structures) More MIPS Machine Language Instructors: Randy H. Katz David A. PaGerson hgp://inst.eecs.berkeley.edu/~cs61c/sp11 1 2 Machine Interpreta4on
More informationCS61C : Machine Structures
inst.eecs.berkeley.edu/~cs61c/su06 CS61C : Machine Structures Lecture #9: MIPS Procedures 2006-07-11 CS 61C L09 MIPS Procedures (1) Andy Carle C functions main() { int i,j,k,m;... i = mult(j,k);... m =
More informationCS3350B Computer Architecture MIPS Introduction
CS3350B Computer Architecture MIPS Introduction Marc Moreno Maza http://www.csd.uwo.ca/~moreno/cs3350_moreno/index.html Department of Computer Science University of Western Ontario, Canada Thursday January
More informationChapter 2. Instructions:
Chapter 2 1 Instructions: Language of the Machine More primitive than higher level languages e.g., no sophisticated control flow Very restrictive e.g., MIPS Arithmetic Instructions We ll be working with
More informationCSCI 402: Computer Architectures. Instructions: Language of the Computer (3) Fengguang Song Department of Computer & Information Science IUPUI.
CSCI 402: Computer Architectures Instructions: Language of the Computer (3) Fengguang Song Department of Computer & Information Science IUPUI Recall Big endian, little endian Memory alignment Unsigned
More informationMIPS ISA and MIPS Assembly. CS301 Prof. Szajda
MIPS ISA and MIPS Assembly CS301 Prof. Szajda Administrative HW #2 due Wednesday (9/11) at 5pm Lab #2 due Friday (9/13) 1:30pm Read Appendix B5, B6, B.9 and Chapter 2.5-2.9 (if you have not already done
More informationCS 316: Procedure Calls/Pipelining
CS 316: Procedure Calls/Pipelining Kavita Bala Fall 2007 Computer Science Cornell University Announcements PA 3 IS out today Lectures on it this Fri and next Tue/Thu Due on the Friday after Fall break
More informationCS 61C: Great Ideas in Computer Architecture More RISC-V Instructions and How to Implement Functions
CS 61C: Great Ideas in Computer Architecture More RISC-V Instructions and How to Implement Functions Instructors: Krste Asanović and Randy H. Katz http://inst.eecs.berkeley.edu/~cs61c/fa17 9/14/17 Fall
More informationECE 30 Introduction to Computer Engineering
ECE 30 Introduction to Computer Engineering Study Problems, Set #3 Spring 2015 Use the MIPS assembly instructions listed below to solve the following problems. arithmetic add add sub subtract addi add
More informationEE 361 University of Hawaii Fall
C functions Road Map Computation flow Implementation using MIPS instructions Useful new instructions Addressing modes Stack data structure 1 EE 361 University of Hawaii Implementation of C functions and
More informationCS 61C: Great Ideas in Computer Architecture. Lecture 6: More MIPS, MIPS Func.ons. Instructor: Sagar Karandikar
CS 61C: Great Ideas in Computer Architecture Lecture 6: More MIPS, MIPS Func.ons Instructor: Sagar Karandikar sagark@eecs.berkeley.edu hap://inst.eecs.berkeley.edu/~cs61c 1 Machine Interpreta4on Levels
More informationInstructions: Language of the Computer
CS359: Computer Architecture Instructions: Language of the Computer Yanyan Shen Department of Computer Science and Engineering 1 The Language a Computer Understands Word a computer understands: instruction
More informationMIPS Assembly Language Programming
MIPS Assembly Language Programming COE 308 Computer Architecture Prof. Muhamed Mudawar College of Computer Sciences and Engineering King Fahd University of Petroleum and Minerals Presentation Outline Assembly
More information