Reliably Scalable Name Prefix Lookup! Haowei Yuan and Patrick Crowley! Washington University in St. Louis!! ANCS 2015! 5/8/2015!
|
|
|
- Rudolph Russell
- 6 years ago
- Views:
Transcription
1 Reliably Scalable Name Prefix Lookup! Haowei Yuan and Patrick Crowley! Washington University in St. Louis!! ANCS 2015! 5/8/2015!
2 ! My Topic for Today! Goal: a reliable longest name prefix lookup performance baseline with large FIB tables regardless of the specific characteristics of the forwarding rules.! Approach: binary search of hash tables.!! Results: 10 Gbps throughput with 256-byte packets.! On a general-purpose multicore platform.! One billion name prefixes, each containing up to seven components.! 2!
3 Longest Name Prefix Lookup! Named Data Networking (NDN)! Names data rather than hosts.! URL-like hierarchical names: /wustl/content/name/.! Two types of packets: Interest and Data.! Interests are forwarded based on longest name prefix lookup.! IP! Src IP ! Dst IP! ! NDN! Name! /wustl/content/name! (Data)! Challenges! Names are much longer than fixed-length IP addresses.! The forwarding table is much larger than seen with IP.! 3!
4 ! Motivation! Existing solutions have shown encouraging performance.! Most are optimized for or evaluated with a limited number of URL datasets.! URLs may not fully characterize future NDN forwarding rules.! Some schemes require O(k) string lookups in the worst case, where k is the number of components in the prefixes.! 4!
5 ! Existing Solutions! Hash table-based! Existing solutions differ mostly in prefix searching strategy.! Longest first: begins with longest prefix, reduces one component if no match.! Optimization based on component number distribution.! Worst case: O(k) string lookups.! Bloom filter-based! Prefix bloom filter: stores prefixes with the same first-level component in the same cache-line sized bloom filter block.! Possibly requires multiple block expansions.! Worst case: O(k) string lookups.! Trie-based! Naturally requires linear search.! 5!
6 Performance Baseline! Can we provide a performance baseline regardless of the characteristics of the forwarding rules?! Researchers can choose the most efficient namespace design without concern for forwarding performance.! More efficient solutions can be engineered when NDN forwarding tables become available.! 6!
7 !! Binary Search of Hash Tables! Originally proposed for accelerating IP lookup.! Paper: Scalable High Speed IP Routing Lookups, SIGCOMM 1997.! Binary search of hash tables for name prefix lookup.! Organized by the numbers of name components in the prefixes.! Number of string lookups: O(log(k)).! Example: seven hash tables.! 4: /a/b/c/d 2: /a/b 6: /a/b/c/d/e/f 1: /a 3: /a/b/c 5: /a/b/c/d/e 7: /a/b/c/d/e/f/g 7!
8 Binary Search Example! Query: /a/b/c/d/e/ndn! Start from the root hash table node! Proceed to the right subtree if there is a match! Proceed to the left subtree if there is no match! 4: /a/b/c/d 2: /a/b 6: /a/b/c/d/e/f 1: /a 3: /a/b/c 5: /a/b/c/d/e 7: /a/b/c/d/e/f/g 8!
9 ! Implementation! Fingerprint-based hash tables.! Hash computation + memory access.! Hash bucket access.! Name prefix string access.! FP_1! Addr_1!!! FP_n! Addr_n! Hash bucket! /content/name/! Prefix string! String matching strategies when fingerprints match.! Always perform! string matching! Perform string matching only at the end! Worst case! 2 x log(k)! memory accesses! log(k) + 1! memory accesses! Hash function! Non-cryptographic! (CityHash)! Cryptographic! (SipHash)! 9!
10 When Tables Are Large! Large memory requirements and limited access locality.! Software optimization.! Our implementation benefited from existing works.! Cisco s NDN router work, ANCS 2013.! CMU s CuckooSwitch work, CoNext 2013.! Use large pages to reduce TLB misses.! 2 MB or 1 GB pages, rather than the default 4 KB pages.! Software prefetching.! Prefetch hash buckets.! Prefetch only the first-visited hash bucket.! Prefetch all of the k buckets.! 10!
11 Evaluation! Goal:demonstrate line-rate longest name prefix lookup is feasible with modest software optimization.! Datasets.! 1 billion randomly generated name prefixes.! Each name: 7 name components.! Each component: 6 to 8 characters.! Populated the hash tables in two phases to construct the worst case.! A general purpose multicore platform.! Intel Xeon E5-2630, 2.3 GHz, 192 GB of DDR3 DRAM.!! 11!
12 Large Pages & Software Prefetching! Larger pages.! From 4 KB to 2 MB: significant performance improvement.! From 2 MB to 1 GB: performance improved slightly.! Prefetching: small performance improvement.! Larger Pages! Prefetching (1 GB pages)! 12!
13 Datasets with 15 Name Components! Performance degraded due to higher hashing costs.! K hash values were all computed in a row.! Keys (name prefixes) were longer.! More efficient software hash function & hardware hashing units could be employed.! Precalculated hash values! - String lookup bounded by log(k)! - 4 lookups vs. 15 lookups! 13!
14 Evaluation with Real Network Traffic! Implementation.! DPDK as the underlying packet I/O and multicore framework.! Using Pktgen-DPDK to generate packets! Transferred on top of UDP! Packets were distributed by I/O threads to worker threads.! Example: 2 I/O threads & 4 worker threads on one NUMA node.! RTE Rings Core 4 RTE Rings DPDK! Pktgen! (sender)! NIC Port 0 Queue 0 Queue1 Core 0 Core 2 Core 6 Core 8 Core 2 NIC Port 1 DPDK! Pktgen! (receiver)! Core 10 Processor 0 14!
15 Results! One billion names with up to seven name components.! Four worker threads.! CityA! SipE! Prefetch! MPPS! Gbps! MPPS! Gbps! None! 4.1! 9.1! 3.8! 8.4! First! 4.2! 9.4! 4.0! 8.9! All! 4.4! 9.7! 4.1! 9.1! Eight worker threads (two NUMA nodes).! All achieved 10 Gbps throughput.! 15!
16 Conclusion & Future Work! A reliably scalable name prefix lookup design based on binary search of hash tables.! 10 Gbps throughput with one billion synthetic names, each containing up to seven components.!! Also in the paper:! Multicore performance evaluation.! Level pulling, a general method to reduce the number of string lookups.! Are there new characteristics in the URL datasets?! Store prefixes with large number of suffixes in cache.! Future work.! Integrate other NDN data plane components.! Support updates.! Code: 16!
17
Reliably Scalable Name Prefix Lookup
Reliably Scalable Name Prefix Lookup Haowei Yuan & Patrick Crowley Washington University Department of Computer Science & Engineering St. Louis, Missouri 63130 {hyuan, pcrowley}@wustl.edu ABSTRACT Name
Scalable Name-Based Packet Forwarding: From Millions to Billions. Tian Song, Beijing Institute of Technology
Scalable Name-Based Packet Forwarding: From Millions to Billions Tian Song, songtian@bit.edu.cn, Beijing Institute of Technology Haowei Yuan, Patrick Crowley, Washington University Beichuan Zhang, The
Learning with Purpose
Network Measurement for 100Gbps Links Using Multicore Processors Xiaoban Wu, Dr. Peilong Li, Dr. Yongyi Ran, Prof. Yan Luo Department of Electrical and Computer Engineering University of Massachusetts
Length Indexed Bloom Filter Based Forwarding In Content Centeric Networking
Length Indexed Bloom Filter Based Forwarding In Content Centeric Networking Vishal Manghnani Rochester Institute of Technology vjm1952@rit.edu Abstract Named Data Network (NDN) is a modern networking architecture
Fast Forwarding for NDN
Fast Forwarding for NDN Won So Ashok Narayanan Mark Stapp mjs@cisco.com Cisco Systems IETF ICNRG, 31/7/2013, Berlin CCN/NDN in Two Slides (1) Network forwards and caches named data 'objects'; no host addresses
PacketShader: A GPU-Accelerated Software Router
PacketShader: A GPU-Accelerated Software Router Sangjin Han In collaboration with: Keon Jang, KyoungSoo Park, Sue Moon Advanced Networking Lab, CS, KAIST Networked and Distributed Computing Systems Lab,
Performance Study of CCNx
Performance Study of CCNx Haowei Yuan Networking Research Seminar 3/18/2013 My Topic for Today Industry participation in content centric networking Emerging networks consortium Our performance study of
Scalable Enterprise Networks with Inexpensive Switches
Scalable Enterprise Networks with Inexpensive Switches Minlan Yu minlanyu@cs.princeton.edu Princeton University Joint work with Alex Fabrikant, Mike Freedman, Jennifer Rexford and Jia Wang 1 Enterprises
TOWARDS FAST IP FORWARDING
TOWARDS FAST IP FORWARDING IP FORWARDING PERFORMANCE IMPROVEMENT AND MEASUREMENT IN FREEBSD Nanako Momiyama Keio University 25th September 2016 EuroBSDcon 2016 OUTLINE Motivation Design and implementation
Switch and Router Design. Packet Processing Examples. Packet Processing Examples. Packet Processing Rate 12/14/2011
// Bottlenecks Memory, memory, 88 - Switch and Router Design Dr. David Hay Ross 8b dhay@cs.huji.ac.il Source: Nick Mckeown, Isaac Keslassy Packet Processing Examples Address Lookup (IP/Ethernet) Where
Be Fast, Cheap and in Control with SwitchKV. Xiaozhou Li
Be Fast, Cheap and in Control with SwitchKV Xiaozhou Li Goal: fast and cost-efficient key-value store Store, retrieve, manage key-value objects Get(key)/Put(key,value)/Delete(key) Target: cluster-level
Towards High-performance Flow-level level Packet Processing on Multi-core Network Processors
Towards High-performance Flow-level level Packet Processing on Multi-core Network Processors Yaxuan Qi (presenter), Bo Xu, Fei He, Baohua Yang, Jianming Yu and Jun Li ANCS 2007, Orlando, USA Outline Introduction
Hardware Acceleration in Computer Networks. Jan Kořenek Conference IT4Innovations, Ostrava
Hardware Acceleration in Computer Networks Outline Motivation for hardware acceleration Longest prefix matching using FPGA Hardware acceleration of time critical operations Framework and applications Contracted
NDN-NIC: Name-based Filtering on Network Interface Card
NDN-NIC: Name-based Filtering on Network Interface Card Junxiao Shi, Teng Liang, Beichuan Zhang (University of Arizona) Hao Wu, Bin Liu (Tsinghua University) Communication over shared media Each device
Design and Implementation of Virtual TAP for Software-Defined Networks
Design and Implementation of Virtual TAP for Software-Defined Networks - Master Thesis Defense - Seyeon Jeong Supervisor: Prof. James Won-Ki Hong Dept. of CSE, DPNM Lab., POSTECH, Korea jsy0906@postech.ac.kr
Modeling the impact of CPU properties to optimize and predict packet-processing performance
Case Study Modeling the impact of CPU properties to optimize and predict packet-processing performance Intel and AT&T have collaborated in a proof of concept (POC) to model and analyze the performance
Multi-core Implementation of Decomposition-based Packet Classification Algorithms 1
Multi-core Implementation of Decomposition-based Packet Classification Algorithms 1 Shijie Zhou, Yun R. Qu, and Viktor K. Prasanna Ming Hsieh Department of Electrical Engineering, University of Southern
The Power of Batching in the Click Modular Router
The Power of Batching in the Click Modular Router Joongi Kim, Seonggu Huh, Keon Jang, * KyoungSoo Park, Sue Moon Computer Science Dept., KAIST Microsoft Research Cambridge, UK * Electrical Engineering
OpenFlow Software Switch & Intel DPDK. performance analysis
OpenFlow Software Switch & Intel DPDK performance analysis Agenda Background Intel DPDK OpenFlow 1.3 implementation sketch Prototype design and setup Results Future work, optimization ideas OF 1.3 prototype
Ruler: High-Speed Packet Matching and Rewriting on Network Processors
Ruler: High-Speed Packet Matching and Rewriting on Network Processors Tomáš Hrubý Kees van Reeuwijk Herbert Bos Vrije Universiteit, Amsterdam World45 Ltd. ANCS 2007 Tomáš Hrubý (VU Amsterdam, World45)
A Comparison of Performance and Accuracy of Measurement Algorithms in Software
A Comparison of Performance and Accuracy of Measurement Algorithms in Software Omid Alipourfard, Masoud Moshref 1, Yang Zhou 2, Tong Yang 2, Minlan Yu 3 Yale University, Barefoot Networks 1, Peking University
Implemen'ng IPv6 Segment Rou'ng in the Linux Kernel
Implemen'ng IPv6 Segment Rou'ng in the Linux Kernel David Lebrun, Olivier Bonaventure ICTEAM, UCLouvain Work supported by ARC grant 12/18-054 (ARC-SDN) and a Cisco grant Agenda IPv6 Segment Rou'ng Implementa'on
P51: High Performance Networking
P51: High Performance Networking Lecture 6: Programmable network devices Dr Noa Zilberman noa.zilberman@cl.cam.ac.uk Lent 2017/18 High Throughput Interfaces Performance Limitations So far we discussed
PacketShader as a Future Internet Platform
PacketShader as a Future Internet Platform AsiaFI Summer School 2011.8.11. Sue Moon in collaboration with: Joongi Kim, Seonggu Huh, Sangjin Han, Keon Jang, KyoungSoo Park Advanced Networking Lab, CS, KAIST
P4 Pub/Sub. Practical Publish-Subscribe in the Forwarding Plane
P4 Pub/Sub Practical Publish-Subscribe in the Forwarding Plane Outline Address-oriented routing Publish/subscribe How to do pub/sub in the network Implementation status Outlook Subscribers Publish/Subscribe
Network Architecture Laboratory
Automated Synthesis of Adversarial Workloads for Network Functions Luis Pedrosa, Rishabh Iyer, Arseniy Zaostrovnykh, Jonas Fietz, Katerina Argyraki Network Architecture Laboratory Software NFs The good:
Decision Forest: A Scalable Architecture for Flexible Flow Matching on FPGA
Decision Forest: A Scalable Architecture for Flexible Flow Matching on FPGA Weirong Jiang, Viktor K. Prasanna University of Southern California Norio Yamagaki NEC Corporation September 1, 2010 Outline
Interdomain Routing Design for MobilityFirst
Interdomain Routing Design for MobilityFirst October 6, 2011 Z. Morley Mao, University of Michigan In collaboration with Mike Reiter s group 1 Interdomain routing design requirements Mobility support Network
Disclaimer This presentation may contain product features that are currently under development. This overview of new technology represents no commitme
NET1343BU NSX Performance Samuel Kommu #VMworld #NET1343BU Disclaimer This presentation may contain product features that are currently under development. This overview of new technology represents no
Agilio CX 2x40GbE with OVS-TC
PERFORMANCE REPORT Agilio CX 2x4GbE with OVS-TC OVS-TC WITH AN AGILIO CX SMARTNIC CAN IMPROVE A SIMPLE L2 FORWARDING USE CASE AT LEAST 2X. WHEN SCALED TO REAL LIFE USE CASES WITH COMPLEX RULES TUNNELING
NFVnice: Dynamic Backpressure and Scheduling for NFV Service Chains
NFVnice: Dynamic Backpressure and Scheduling for NFV Service Chains Sameer G Kulkarni 1, Wei Zhang 2, Jinho Hwang 3, Shriram Rajagopalan 3, K.K. Ramakrishnan 4, Timothy Wood 2, Mayutan Arumaithurai 1 &
Routing architecture and forwarding
DD2490 p4 2011 Routing architecture and forwarding & Intro to Homework 4 Olof Hagsand KTH /CSC 1 Connecting devices Connecting devices Networking devices Internetworking devices Hub/ Hub/ Repeater Bridge/
Efficient IP-Address Lookup with a Shared Forwarding Table for Multiple Virtual Routers
Efficient IP-Address Lookup with a Shared Forwarding Table for Multiple Virtual Routers ABSTRACT Jing Fu KTH, Royal Institute of Technology Stockholm, Sweden jing@kth.se Virtual routers are a promising
How to Build a 100 Gbps DDoS Traffic Generator
How to Build a 100 Gbps DDoS Traffic Generator DIY with a Single Commodity-off-the-shelf Server (COTS) Surasak Sanguanpong Surasak.S@ku.ac.th DISCLAIMER THE FOLLOWING CONTENTS HAS BEEN APPROVED FOR APPROPIATE
CS 268: Route Lookup and Packet Classification
Overview CS 268: Route Lookup and Packet Classification Packet Lookup Packet Classification Ion Stoica March 3, 24 istoica@cs.berkeley.edu 2 Lookup Problem Identify the output interface to forward an incoming
Improve Performance of Kube-proxy and GTP-U using VPP
Improve Performance of Kube-proxy and GTP-U using VPP Hongjun Ni (hongjun.ni@intel.com) Danny Zhou (danny.zhou@intel.com) Johnson Li (johnson.li@intel.com) Network Platform Group, DCG, Intel Acknowledgement:
PVPP: A Programmable Vector Packet Processor. Sean Choi, Xiang Long, Muhammad Shahbaz, Skip Booth, Andy Keep, John Marshall, Changhoon Kim
PVPP: A Programmable Vector Packet Processor Sean Choi, Xiang Long, Muhammad Shahbaz, Skip Booth, Andy Keep, John Marshall, Changhoon Kim Fixed Set of Protocols Fixed-Function Switch Chip TCP IPv4 IPv6
CSE 473 Introduction to Computer Networks. Exam 1. Your name here: 10/3/2012
CSE 473 Introduction to Computer Networks Jon Turner Exam 1 Your name here: 10/3/2012 1. (10 points). A user in St. Louis, connected to the internet via a 20 Mb/s (b=bits) connection retrieves a 250 KB
Growth of the Internet Network capacity: A scarce resource Good Service
IP Route Lookups 1 Introduction Growth of the Internet Network capacity: A scarce resource Good Service Large-bandwidth links -> Readily handled (Fiber optic links) High router data throughput -> Readily
Backend for Software Data Planes
The Case for a Flexible Low-Level Backend for Software Data Planes Sean Choi 1, Xiang Long 2, Muhammad Shahbaz 3, Skip Booth 4, Andy Keep 4, John Marshall 4, Changhoon Kim 5 1 2 3 4 5 Why software data
A Network-centric TCP for Interactive Video Delivery Networks (VDN)
A Network-centric TCP for Interactive Video Delivery Networks (VDN) MD Iftakharul Islam, Javed I Khan Department of Computer Science Kent State University Kent, OH 1 / 44 Outline 1 Interactive Video Network
EECS 122: Introduction to Computer Networks Switch and Router Architectures. Today s Lecture
EECS : Introduction to Computer Networks Switch and Router Architectures Computer Science Division Department of Electrical Engineering and Computer Sciences University of California, Berkeley Berkeley,
Computer Networks CS 552
Computer Networks CS 552 Routers Badri Nath Rutgers University badri@cs.rutgers.edu. High Speed Routers 2. Route lookups Cisco 26: 8 Gbps Cisco 246: 32 Gbps Cisco 286: 28 Gbps Power: 4.2 KW Cost: $5K Juniper
Lecture 11: Packet forwarding
Lecture 11: Packet forwarding Anirudh Sivaraman 2017/10/23 This week we ll talk about the data plane. Recall that the routing layer broadly consists of two parts: (1) the control plane that computes routes
Accelerating String Matching Using Multi-threaded Algorithm
Accelerating String Matching Using Multi-threaded Algorithm on GPU Cheng-Hung Lin*, Sheng-Yu Tsai**, Chen-Hsiung Liu**, Shih-Chieh Chang**, Jyuo-Min Shyu** *National Taiwan Normal University, Taiwan **National
Multiway Range Trees: Scalable IP Lookup with Fast Updates
Washington University in St. Louis Washington University Open Scholarship All Computer Science and Engineering Research Computer Science and Engineering Report Number: WUCS-99-28 1999-01-01 Multiway Range
IP Forwarding. CSU CS557, Spring 2018 Instructor: Lorenzo De Carli
IP Forwarding CSU CS557, Spring 2018 Instructor: Lorenzo De Carli 1 Sources George Varghese, Network Algorithmics, Morgan Kauffmann, December 2004 L. De Carli, Y. Pan, A. Kumar, C. Estan, K. Sankaralingam,
A FRESH LOOK AT SCALABLE FORWARDING THROUGH ROUTER FIB CACHING. Kaustubh Gadkari, Dan Massey and Christos Papadopoulos
A FRESH LOOK AT SCALABLE FORWARDING THROUGH ROUTER FIB CACHING Kaustubh Gadkari, Dan Massey and Christos Papadopoulos Problem: RIB/FIB Growth Global RIB directly affects FIB size FIB growth is a big concern:
High-Speed Forwarding: A P4 Compiler with a Hardware Abstraction Library for Intel DPDK
High-Speed Forwarding: A P4 Compiler with a Hardware Abstraction Library for Intel DPDK Sándor Laki Eötvös Loránd University Budapest, Hungary lakis@elte.hu Motivation Programmability of network data plane
The Logic of Physical Garbage Collection in Deduplicating Storage
The Logic of Physical Garbage Collection in Deduplicating Storage Fred Douglis Abhinav Duggal Philip Shilane Tony Wong Dell EMC Shiqin Yan University of Chicago Fabiano Botelho Rubrik 1 Deduplication in
High-Performance Holistic XML Twig Filtering Using GPUs. Ildar Absalyamov, Roger Moussalli, Walid Najjar and Vassilis Tsotras
High-Performance Holistic XML Twig Filtering Using GPUs Ildar Absalyamov, Roger Moussalli, Walid Najjar and Vassilis Tsotras Outline! Motivation! XML filtering in the literature! Software approaches! Hardware
Contents Overview of the Compression Server White Paper... 5 Business Problem... 7
P6 Professional Compression Server White Paper for On-Premises Version 17 July 2017 Contents Overview of the Compression Server White Paper... 5 Business Problem... 7 P6 Compression Server vs. Citrix...
Benchmarking of VPP. Arijit Pramanik RnD Project
Benchmarking of VPP Arijit Pramanik RnD Project Abstract Vector Packet Processing Technology, currently released under FD.io is a framework for high-speed packet processing in user-space. VPP is capable
DPDK Performance Report Release Test Date: Nov 16 th 2016
Test Date: Nov 16 th 2016 Revision History Date Revision Comment Nov 16 th, 2016 1.0 Initial document for release 2 Contents Audience and Purpose... 4 Test setup:... 4 Intel Xeon Processor E5-2699 v4 (55M
Housekeeping. Fall /5 CptS/EE 555 1
Housekeeping Lab access HW turn-in Jin? Class preparation for next time: look at the section on CRCs 2.4.3. Be prepared to explain how/why the shift register implements the CRC Skip Token Rings section
Generic Architecture. EECS 122: Introduction to Computer Networks Switch and Router Architectures. Shared Memory (1 st Generation) Today s Lecture
Generic Architecture EECS : Introduction to Computer Networks Switch and Router Architectures Computer Science Division Department of Electrical Engineering and Computer Sciences University of California,
Toward an ebpf-based clone of iptables
Toward an ebpf-based clone of iptables Matteo Bertrone, Sebastiano Miano, Jianwen Pi, Fulvio Risso, Massimo Tumolo Netdev 0x12, Montréal (Canada), July 12th, 2018 Objective Started in Nov 2017, with a
Much Faster Networking
Much Faster Networking David Riddoch driddoch@solarflare.com Copyright 2016 Solarflare Communications, Inc. All rights reserved. What is kernel bypass? The standard receive path The standard receive path
A 400Gbps Multi-Core Network Processor
A 400Gbps Multi-Core Network Processor James Markevitch, Srinivasa Malladi Cisco Systems August 22, 2017 Legal THE INFORMATION HEREIN IS PROVIDED ON AN AS IS BASIS, WITHOUT ANY WARRANTIES OR REPRESENTATIONS,
Fast packet processing in the cloud. Dániel Géhberger Ericsson Research
Fast packet processing in the cloud Dániel Géhberger Ericsson Research Outline Motivation Service chains Hardware related topics, acceleration Virtualization basics Software performance and acceleration
Be Fast, Cheap and in Control with SwitchKV Xiaozhou Li
Be Fast, Cheap and in Control with SwitchKV Xiaozhou Li Raghav Sethi Michael Kaminsky David G. Andersen Michael J. Freedman Goal: fast and cost-effective key-value store Target: cluster-level storage for
Computer Systems Architecture I. CSE 560M Lecture 19 Prof. Patrick Crowley
Computer Systems Architecture I CSE 560M Lecture 19 Prof. Patrick Crowley Plan for Today Announcement No lecture next Wednesday (Thanksgiving holiday) Take Home Final Exam Available Dec 7 Due via email
Problem Statement. Algorithm MinDPQ (contd.) Algorithm MinDPQ. Summary of Algorithm MinDPQ. Algorithm MinDPQ: Experimental Results.
Algorithms for Routing Lookups and Packet Classification October 3, 2000 High Level Outline Part I. Routing Lookups - Two lookup algorithms Part II. Packet Classification - One classification algorithm
Last Lecture: Network Layer
Last Lecture: Network Layer 1. Design goals and issues 2. Basic Routing Algorithms & Protocols 3. Addressing, Fragmentation and reassembly 4. Internet Routing Protocols and Inter-networking 5. Router design
Speeding Up IP Lookup Procedure in Software Routers by Means of Parallelization
2 Telfor Journal, Vol. 9, No. 1, 217. Speeding Up IP Lookup Procedure in Software Routers by Means of Parallelization Mihailo Vesović, Graduate Student Member, IEEE, Aleksandra Smiljanić, Member, IEEE,
Cuckoo Filter: Practically Better Than Bloom
Cuckoo Filter: Practically Better Than Bloom Bin Fan (CMU/Google) David Andersen (CMU) Michael Kaminsky (Intel Labs) Michael Mitzenmacher (Harvard) 1 What is Bloom Filter? A Compact Data Structure Storing
Show Me the $... Performance And Caches
Show Me the $... Performance And Caches 1 CPU-Cache Interaction (5-stage pipeline) PCen 0x4 Add bubble PC addr inst hit? Primary Instruction Cache IR D To Memory Control Decode, Register Fetch E A B MD1
Understanding The Performance of DPDK as a Computer Architect
Understanding The Performance of DPDK as a Computer Architect XIAOBAN WU *, PEILONG LI *, YAN LUO *, LIANG- MIN (LARRY) WANG +, MARC PEPIN +, AND JOHN MORGAN + * UNIVERSITY OF MASSACHUSETTS LOWELL + INTEL
Towards Effective Packet Classification. J. Li, Y. Qi, and B. Xu Network Security Lab RIIT, Tsinghua University Dec, 2005
Towards Effective Packet Classification J. Li, Y. Qi, and B. Xu Network Security Lab RIIT, Tsinghua University Dec, 2005 Outline Algorithm Study Understanding Packet Classification Worst-case Complexity
A Hybrid Approach to Scalable Name Prefix Lookup
A Hybrid Approach to Scalable Name Prefix Lookup Kun Huang and Zhaohua Wang Institute of Computing Technology, Chinese Academy of Sciences and University of Chinese Academy of Sciences Beijing, China {huangkun09,
Dynamic Fine Grain Scheduling of Pipeline Parallelism. Presented by: Ram Manohar Oruganti and Michael TeWinkle
Dynamic Fine Grain Scheduling of Pipeline Parallelism Presented by: Ram Manohar Oruganti and Michael TeWinkle Overview Introduction Motivation Scheduling Approaches GRAMPS scheduling method Evaluation
Ingo Brenckmann Jochen Kirsten Storage Technology Strategists SAS EMEA Copyright 2003, SAS Institute Inc. All rights reserved.
Intelligent Storage Results from real life testing Ingo Brenckmann Jochen Kirsten Storage Technology Strategists SAS EMEA SAS Intelligent Storage components! OLAP Server! Scalable Performance Data Server!
A Universal Dataplane. FastData.io Project
A Universal Dataplane FastData.io Project : A Universal Dataplane Platform for Native Cloud Network Services EFFICIENCY Most Efficient on the Planet Superior Performance PERFORMANCE Flexible and Extensible
Accelerating Pointer Chasing in 3D-Stacked Memory: Challenges, Mechanisms, Evaluation Kevin Hsieh
Accelerating Pointer Chasing in 3D-Stacked : Challenges, Mechanisms, Evaluation Kevin Hsieh Samira Khan, Nandita Vijaykumar, Kevin K. Chang, Amirali Boroumand, Saugata Ghose, Onur Mutlu Executive Summary
Stateless Network Functions:
Stateless Network Functions: Breaking the Tight Coupling of State and Processing Murad Kablan, Azzam Alsudais, Eric Keller, Franck Le University of Colorado IBM Networks Need Network Functions Firewall
ASPERA HIGH-SPEED TRANSFER. Moving the world s data at maximum speed
ASPERA HIGH-SPEED TRANSFER Moving the world s data at maximum speed ASPERA HIGH-SPEED FILE TRANSFER 80 GBIT/S OVER IP USING DPDK Performance, Code, and Architecture Charles Shiflett Developer of next-generation
15-744: Computer Networking. Routers
15-744: Computer Networking outers Forwarding and outers Forwarding IP lookup High-speed router architecture eadings [McK97] A Fast Switched Backplane for a Gigabit Switched outer Optional [D+97] Small
Best Practices for Setting BIOS Parameters for Performance
White Paper Best Practices for Setting BIOS Parameters for Performance Cisco UCS E5-based M3 Servers May 2013 2014 Cisco and/or its affiliates. All rights reserved. This document is Cisco Public. Page
Memory Hierarchy. Jinkyu Jeong Computer Systems Laboratory Sungkyunkwan University
Memory Hierarchy Jinkyu Jeong (jinkyu@skku.edu) Computer Systems Laboratory Sungkyunkwan University http://csl.skku.edu EEE3050: Theory on Computer Architectures, Spring 2017, Jinkyu Jeong (jinkyu@skku.edu)
Practical Near-Data Processing for In-Memory Analytics Frameworks
Practical Near-Data Processing for In-Memory Analytics Frameworks Mingyu Gao, Grant Ayers, Christos Kozyrakis Stanford University http://mast.stanford.edu PACT Oct 19, 2015 Motivating Trends End of Dennard
46PaQ. Dimitris Miras, Saleem Bhatti, Peter Kirstein Networks Research Group Computer Science UCL. 46PaQ AHM 2005 UKLIGHT Workshop, 19 Sep
46PaQ Dimitris Miras, Saleem Bhatti, Peter Kirstein Networks Research Group Computer Science UCL 46PaQ AHM 2005 UKLIGHT Workshop, 19 Sep 2005 1 Today s talk Overview Current Status and Results Future Work
CSCD 330 Network Programming
CSCD 330 Network Programming Network Superhighway Spring 2018 Lecture 13 Network Layer Reading: Chapter 4 Some slides provided courtesy of J.F Kurose and K.W. Ross, All Rights Reserved, copyright 1996-2007
PDP : A Flexible and Programmable Data Plane. Massimo Gallo et al.
PDP : A Flexible and Programmable Data Plane Massimo Gallo et al. Introduction Network Function evolution L7 Load Balancer TLS/SSL Server Proxy Server Firewall Introduction Network Function evolution Can
Experiences in Building a 100 Gbps (D)DoS Traffic Generator
Experiences in Building a 100 Gbps (D)DoS Traffic Generator DIY with a Single Commodity-off-the-shelf (COTS) Server March 31, 2018 Umeda Sky Building Escalators Surasak Sanguanpong Surasak.S@ku.ac.th About
Primavera Compression Server 5.0 Service Pack 1 Concept and Performance Results
- 1 - Primavera Compression Server 5.0 Service Pack 1 Concept and Performance Results 1. Business Problem The current Project Management application is a fat client. By fat client we mean that most of
Cisco ASR 1000 Series Routers Embedded Services Processors
Cisco ASR 1000 Series Routers Embedded Services Processors The Cisco ASR 1000 Series embedded services processors are based on the Cisco QuantumFlow Processor (QFP) for next-generation forwarding and queuing.
The dark powers on Intel processor boards
The dark powers on Intel processor boards Processing Resources (3U VPX) Boards with Multicore CPUs: Up to 16 cores using Intel Xeon D-1577 on TR C4x/msd Boards with 4-Core CPUs and Multiple Graphical Execution
CMU Introduction to Computer Architecture, Spring 2014 HW 5: Virtual Memory, Caching and Main Memory
CMU 18-447 Introduction to Computer Architecture, Spring 2014 HW 5: Virtual Memory, Caching and Main Memory Instructor: Prof. Onur Mutlu TAs: Rachata Ausavarungnirun, Varun Kohli, Xiao Bo Zhao, Paraj Tyle
Router Construction. Workstation-Based. Switching Hardware Design Goals throughput (depends on traffic model) scalability (a function of n) Outline
Router Construction Outline Switched Fabrics IP Routers Tag Switching Spring 2002 CS 461 1 Workstation-Based Aggregate bandwidth 1/2 of the I/O bus bandwidth capacity shared among all hosts connected to
소프트웨어기반고성능침입탐지시스템설계및구현
소프트웨어기반고성능침입탐지시스템설계및구현 KyoungSoo Park Department of Electrical Engineering, KAIST M. Asim Jamshed *, Jihyung Lee*, Sangwoo Moon*, Insu Yun *, Deokjin Kim, Sungryoul Lee, Yung Yi* Department of Electrical
LONGEST prefix matching (LPM) techniques have received
IEEE/ACM TRANSACTIONS ON NETWORKING, VOL. 14, NO. 2, APRIL 2006 397 Longest Prefix Matching Using Bloom Filters Sarang Dharmapurikar, Praveen Krishnamurthy, and David E. Taylor, Member, IEEE Abstract We
Reducing CPU and network overhead for small I/O requests in network storage protocols over raw Ethernet
Reducing CPU and network overhead for small I/O requests in network storage protocols over raw Ethernet Pilar González-Férez and Angelos Bilas 31 th International Conference on Massive Storage Systems
Software Routers: NetMap
Software Routers: NetMap Hakim Weatherspoon Assistant Professor, Dept of Computer Science CS 5413: High Performance Systems and Networking October 8, 2014 Slides from the NetMap: A Novel Framework for
DPDK Intel NIC Performance Report Release 18.02
DPDK Intel NIC Performance Report Test Date: Mar 14th 2018 Author: Intel DPDK Validation team Revision History Date Revision Comment Mar 15th, 2018 1.0 Initial document for release 2 Contents Audience
M7: Next Generation SPARC. Hotchips 26 August 12, Stephen Phillips Senior Director, SPARC Architecture Oracle
M7: Next Generation SPARC Hotchips 26 August 12, 2014 Stephen Phillips Senior Director, SPARC Architecture Oracle Safe Harbor Statement The following is intended to outline our general product direction.
Routers Technologies & Evolution for High-Speed Networks
Routers Technologies & Evolution for High-Speed Networks C. Pham Université de Pau et des Pays de l Adour http://www.univ-pau.fr/~cpham Congduc.Pham@univ-pau.fr Router Evolution slides from Nick McKeown,
DevoFlow: Scaling Flow Management for High Performance Networks
DevoFlow: Scaling Flow Management for High Performance Networks SDN Seminar David Sidler 08.04.2016 1 Smart, handles everything Controller Control plane Data plane Dump, forward based on rules Existing
Cascade Mapping: Optimizing Memory Efficiency for Flash-based Key-value Caching
Cascade Mapping: Optimizing Memory Efficiency for Flash-based Key-value Caching Kefei Wang and Feng Chen Louisiana State University SoCC '18 Carlsbad, CA Key-value Systems in Internet Services Key-value
WORKLOAD CHARACTERIZATION OF INTERACTIVE CLOUD SERVICES BIG AND SMALL SERVER PLATFORMS
WORKLOAD CHARACTERIZATION OF INTERACTIVE CLOUD SERVICES ON BIG AND SMALL SERVER PLATFORMS Shuang Chen*, Shay Galon**, Christina Delimitrou*, Srilatha Manne**, and José Martínez* *Cornell University **Cavium
Caesar: A Content Router for High-Speed Forwarding on Content Names
Caesar: A Content Router for High-Speed Forwarding on Content Names Diego Perino, Matteo Varvello, Leonardo Linguaglossa, Rafael Laufer, Roger Boislaigue To cite this version: Diego Perino, Matteo Varvello,