400 ma Low Noise and Low Supply Current LDO Regulator

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1 Series 4 ma Low Noise and Low Supply Current LDO Regulator OVERVIEW NO.EA The RP122x is a LDO regulator that provides low output noise, high ripple rejection and fast response characteristics, achieved by low supply current. This device is suitable not only for noise-sensitive applications such as high-performance analog circuits, but also for various applications. KEY BENEFITS Achieves Low Noise, High PSRR and Fast Response. Provides Saving Space by Adopting of 4-pin Small Package without Noise Bypass Capacitor. Provides Long-Duration of Operation for Battery-powered Equipment by Low Supply Current of 9.5 µa (Typ.), despite the low-noise LDO. KEY SPECIFICATIONS Input Voltage Range (Max.Rating):1.9 V to 5.5 V (6. V) Range: 1.2 V to 4.8 V (.1 V step) Accuracy: ±.8% (VSET 1.8 V, Ta = 25 C) Supply Current: Typ. 9.5 µa Output Noise: Typ. 8 µvrms (IOUT = 25 ma) Ripple Rejection: Typ. 9 db (f = 1kHz) Typ. 85 db (f = 1kHz) Typ. 65 db (f = 1kHz) Dropout Voltage: Typ..145 V (IOUT = 4 ma, VSET = 2.8 V, RP122Z) Typ..17 V (IOUT = 4 ma, VSET = 2.8 V, RP122K) Protection Features: Thermal Shutdown Protection (Detection Temp. Typ.165 C) Inrush Current Limit at Typ.25mA for appr.7μs period after startup Ceramic Capacitor (CIN, COUT): 1. µf or more (No Need of Noise Bypass Capacitor) TYPICAL APPLICATIONS PACKAGE VDD VOUT VOUT VIN CIN RP122x COUT CE Control CE GND Without a bypass capacitor for noise WLCSP-4-P8.64 mm x.64 mm, t =.4 mm (Max.) DFN(PLP) mm x 1. mm, t =.6 mm (Max.) APPLICATIONS Mobile Phones and Tablets, Digital Cameras, Audio Devices, and Battery-powered Equipment RF Modules Clock Generator: VCO, PLL, etc. Noise-sensitive Devices: ADC, DAC 1

2 NO.EA SELECTION GUIDE The set output voltage and the auto-discharge function (1) are user-selectable. Product Name Package Quantity per Reel Pb Free Halogen Free RP122Zxx1 -TR-F WLCSP-4-P8 5, pcs Yes Yes RP122Kxx1 -TR DFN(PLP)11-4 1, pcs Yes Yes xx: Specify the set output voltage (VSET) within the range of 1.2 V to 4.8 V in.1 V steps. The voltage in.5 V step is shown as follows. Ex V: RP122x181 5 : Specify whether with the auto-discharge or not. B: without the auto-discharge function D: with the auto-discharge function BLOCK DIAGRAMS VDD Vref Noise Reduction Thermal Shutdown VOUT VDD Vref Noise Reduction Thermal Shutdown VOUT Enable Control Current Limit Enable Control Current Limit CE GND CE GND RP122xxx1B Block Diagram RP122xxx1D Block Diagram (1) Auto-discharge function quickly lowers the output voltage to V, when the chip enable signal is switched from the active mode to the standby mode, by releasing the electrical charge accumulated in the external capacitor. 2

3 NO.EA PIN DESCRIPTIONS Top View Bottom View A B B RP122Z (WLCSP-4-P8) Pin Configuration A Top View 4 3 Bottom View RP122K (DFN(PLP)11-4) Pin Configuration RP122Z Pin Description Pin No. Symbol Description A1 VDD Input Pin A2 VOUT Output Pin B1 CE Chip Enable Pin, Active-high B2 GND Ground Pin RP122K Pin Description Pin. No. Symbol Description 1 VOUT Output Pin 2 GND Ground Pin 3 CE Chip Enable Pin, Active-high 4 VDD Input Pin The tab on the bottom of the package must be electrically connected to GND (substrate level) when mounted on the board. 3

4 NO.EA ABSOLUTE MAXIMUM RATINGS Symbol Item Rating Unit VIN Input Voltage.3 to 6. V VCE Input Voltage (CE pin).3 to 6. V VOUT.3 to VIN +.3 V IOUT Output Current 6 ma PD Power Dissipation (1) WLCSP-4-P8, JEDEC STD mw DFN(PLP) 11-4, JEDEC STD mw Tj Junction Temperature Range 4 to 125 C Tstg Storage Temperature Range 55 to 125 C ABSOLUTE MAXIMUM RATINGS Electronic and mechanical stress momentarily exceeded absolute maximum ratings may cause the permanent damages and may degrade the life time and safety for both device and system using the device in the field. The functional operation at or over these absolute maximum ratings are not assured. RECOMMENDED OPERATING CONDITIONS Symbol Item Rating Unit VIN Input Voltage 1.9 to 5.5 V Ta Operating Temperature Range 4 to 85 C RECOMMENDED OPERATING CONDITIONS All of electronic equipment should be designed that the mounted semiconductor devices operate within the recommended operating conditions. The semiconductor devices cannot operate normally over the recommended operating conditions, even if when they are used over such ratings by momentary electronic noise or surge. And the semiconductor devices may receive serious damage when they continue to operate over the recommended operating conditions. (1) Refer to POWER DISSIPATION for detailed information. 4

5 NO.EA ELECTRICAL CHARACTERISTICS VIN = VSET + 1 V (VIN = 5.5 V when VSET 4.5 V), IOUT = 1mA, CIN = COUT = 1μF, unless otherwise specified. The specifications surrounded by are guaranteed by design engineering at -4 C Ta 85 C. RP122xxx1x Electrical Characteristics (Ta = 25 C) Symbol Parameter Conditions Min. Typ. Max. Unit VOUT Ta = 25 C 4 C Ta 85 C VSET 1.8V x.992 x1.8 V VSET < 1.8V mv VSET 1.8V x.987 x1.12 V VSET < 1.8V Refer to PRODUCT-SPECIFIC ELECTRICAL CHARACTERISTICS IOUT Output Current 4 ma ΔVOUT/ ΔIOUT Load Regulation RP122Z 1 ma IOUT 4 ma VIN = VSET +.5 V, VIN 1.9 V 3 25 RP122K 1 ma IOUT 4 ma 13 4 VDIF Dropout Voltage IOUT = 4 ma mv Refer to PRODUCT-SPECIFIC ELECTRICAL CHARACTERISTICS ISS Supply Current IOUT = ma µa ISTANDBY Standby Current VCE = V.1.3 µa ΔVOUT/ ΔVIN RR Line Regulation Ripple Rejection 1.2V VSET<1.4V 1.4V VSET<4.3V 4.3V VSET 4.8V Ripple.2 Vp-p, IOUT = 2 ma 1.9V VIN 5.5V VSET+.5V VIN 5.5V VSET+.3V VIN 5.5V f = 1 khz 9 f = 1 khz 85 f = 1 khz %/V ISC Short Current Limit VOUT = V 7 ma IPD CE Pull-down Current.25.5 µa VCEH CE Input Voltage, high 1. V VCEL CE Input Voltage, low.4 V db en TTSD TTSR RLOW Output Noise Thermal Shutdown Temperature, detection Thermal Shutdown Temperature, released Auto-discharge NMOS On-resistance (RP122xxx1D only) BW IOUT = 1 ma 12 =1Hz to 1kHz IOUT = 25 ma 8 µvrms Junction Temperature 165 ºC Junction Temperature 11 ºC VIN = 5. V, CE = V, 5 Ω All test items listed under Electrical Characteristics are done under the pulse load condition (Tj Ta = 25 C) except Ripple Rejection and Output Noise. 5

6 NO.EA The specifications surrounded by are guaranteed by design engineering at - 4 C Ta 85 C RP122Kxx1x Product-specific Electrical Characteristics VOUT [V] VDIF [V] Product Name Ta = 25 C 4 C Ta 85 C RP122Z RP122K Min. Typ. Typ. Max. Typ. Max. Typ. Max. Typ. Max. RP122x121x (1) (1) (1) (1) RP122x121x (1) (1) (1) (1) RP122x131x (1) (1) (1) (1) RP122x141x (1) (1) (1) (1) RP122x151x (1).43 (1).47 RP122x161x (1).385 (1).425 RP122x171x RP122x181x RP122x181x RP122x191x RP122x21x RP122x211x RP122x221x RP122x231x RP122x241x RP122x251x RP122x261x RP122x271x RP122x281x RP122x281x RP122x291x RP122x291x RP122x31x RP122x311x RP122x311x RP122x321x RP122x331x RP122x341x RP122x351x RP122x361x RP122x371x RP122x381x RP122x391x RP122x41x (1) Input voltage should be equal or more than the minimum operating voltage of 1.9 V. 6

7 NO.EA The specifications surrounded by are guaranteed by design engineering at - 4 C Ta 85 C RP122Kxx1x Product-specific Electrical Characteristics VOUT [V] VDIF [V] Product Name Ta = 25 C 4 C Ta 85 C RP122Z RP122K Min. Typ. Typ. Max. Typ. Max. Typ. Max. Typ. Max. RP122x411x RP122x421x RP122x431x RP122x441x RP122x451x RP122x451x RP122x461x RP122x471x RP122x481x

8 NO.EA THEORY OF OPERATION Inrush Current Limit The inrush current limit value at start-up increases in proportion to the capacitance of COUT. If not flow the load current (ILOAD) except the charge current to COUT, the inrush current reaches 25mA when the effective capacitance of COUT becomes appr.6. μf or more, and the inrush current limit protection runs. During appr.7 µs after the CE pin becomes "H", the inrush current, which occurs at charging the capacitor of COUT, is limited at appr.25 ma. The power-on time (ton) can be calculated from the following equation. If the capacitance value of COUT is too much, the time-out occurs and the inrush current increases. ton = td + COUT VSET / ILIM_START td : Delay Time at Start-up Typ.5 μs VSET : Set ILIM_START : Limit Current at Start-up Typ.25 ma If flow the load current (ILOAD) except the charge current to COUT during start-up, the start-up time becomes longer. The load current over ILIM_START cannot be applied. Minimum Operating Voltage The RP122x does not include an UVLO circuit. To make the internal circuit operate normally and to ensure good output regulation, VIN has to be: VIN VSET + VDIF (Min.1.9 V). To bring out the best characteristics of the output noise voltage, the ripple rejection and the load transient response, VIN has to be VIN = VSET + 1. V. Thermal Shutdown Protection Thermal shutdown deactivates a circuit when the junction temperature exceeds the thermal shutdown threshold (TTSD) of Typ. 165 C, and reactivates it when the junction temperature falls below the thermal shutdown release threshold (TTSR) of Typ. 11 C. During the reactivation, the inrush current limit is in operation. Note that deactivation and activation cycle can be repeated due to load, heat dissipation and ambient temperature conditions. Thermal shutdown cannot be used for the purpose of heat sink, so the repetitive cycles of deactivation and activation may affect the reliability of the device. 8

9 NO.EA APPLICATION INFORMATION Typical Application Circuit VDD VOUT VOUT CIN 1.µF RP122x COUT 1.µF CE Control CE GND RP122x Typical Application Circuit Technical Notes Related to External Components Ensure the VDD and GND lines are sufficiently robust. If their impedances are too high, noise pickup or unstable operation may result. Connect a 1. µf or more input capacitor (CIN) between the VDD and GND pins with shortest-distance wiring. It is recommended to use a ceramic capacitors of 6.3 V and more such as the X7R and the X5R having small temperature dependence to ESR, ESL, and capacitance. Phase compensation is provided to secure stable operation even when the load current is varied. For this purpose, use a ceramic capacitor of 1. µf or more with ESR (Equivalent Series Resistance) of up to 3 mω to connect an output capacitor (COUT) between the VOUT and GND pins with shortest-distance wiring. Besides, set for the output capacitor to ensure the following effective capacitance in consideration of the dependence of temperature, DC bias, and package size. Set (VSET) Effective Capacitance 1.2 V VSET < 2. V.75 µf and more 2. V VSET < 3.4 V.7 µf and more 3.4 V VSET 4.8 V.6 µf and more In case of using a tantalum type capacitor with a large ESR, the output might become unstable. Evaluate your circuit including consideration of frequency characteristics with a parallel connection the above ceramic and the tantalum type capacitors. 9

10 NO.EA TYPICAL CHARACTERISTICS Typical Characteristics are intended to be used as reference data, they are not guaranteed. 1) vs. Temperature (CIN = Ceramic 1. µf, COUT = Ceramic 1. µf) RP122x121x, VIN = 2.2 V, IOUT = 1 ma RP122x281x, VIN = 3.8 V, IOUT = 1 ma Temperature Ta [ºC] Temperature Ta [ºC] RP122x481x, VIN = 5.5 V, IOUT = 1 ma Temperature Ta [ºC] 2) Supply Current vs. Temperature (CIN = Ceramic 1. µf, COUT = Ceramic 1. µf) RP122x121x, VIN = 2.2 V RP122x281x, VIN = 3.8 V Supply Current I SS [μa] Temperature Ta [ºC] Supply Current I SS [μa] Temperature Ta [ºC] 1

11 NO.EA Supply Current I SS [μa] RP122x481x, VIN = 5.5 V Temperature Ta [ºC] 3) Dropout Voltage vs. Output Current (CIN = Ceramic 1. µf, COUT = Ceramic 1. µf) RP122Z181x RP122K181x Dropout Voltage V DIF [mv] Ta=85 C Ta=25 C Ta=-4 C Dropout Voltage V DIF [mv] Ta=85 C Ta=25 C Ta=-4 C RP122Z281x RP122K281x 2 Ta=85 C 2 Ta=85 C Dropout Voltage V DIF [mv] Ta=25 C Ta=-4 C Dropout Voltage V DIF [mv] Ta=25 C Ta=-4 C

12 NO.EA RP122Z481x RP122K481x 2 Ta=85 C 2 Ta=85 C Dropout Voltage V DIF [mv] Ta=25 C Ta=-4 C Dropout Voltage V DIF [mv] Ta=25 C Ta=-4 C ) Dropout Voltage vs. Temperature (CIN = Ceramic 1. µf, COUT = Ceramic 1. µf) RP122Z181x RP122K181x Dropout Voltage V DIF [mv] mA 25mA 1mA 5mA 3mA 1mA 1mA Dropout Voltage V DIF [mv] mA 25mA 1mA 5mA 3mA 1mA 1mA Temperature Ta [ºC] RP122Z281x Temperature Ta [ºC] RP122K281x Dropout Voltage V DIF [mv] mA 25mA 1mA 5mA 3mA 1mA 1mA Dropout Voltage V DIF [mv] mA 25mA 1mA 5mA 3mA 1mA 1mA Temperature Ta [ºC] Temperature Ta [ºC] 12

13 NO.EA RP122Z481x RP122K481x Dropout Voltage V DIF [mv] mA 25mA 1mA 5mA 3mA 1mA 1mA Dropout Voltage V DIF [mv] mA 25mA 1mA 5mA 3mA 1mA 1mA Temperature Ta [ºC] Temperature Ta [ºC] 5) Dropout Voltage vs. Set (CIN = Ceramic 1. µf, COUT = Ceramic 1. µf, Ta = 25 C) RP122Zxx1x RP122Kxx1x Dropout Voltage V DIF [mv] mA 25mA 1mA 5mA 3mA 1mA Dropout Voltage V DIF [mv] mA 25mA 1mA 5mA 3mA 1mA Set V SET [V] Set V SET [V] 6) vs. Output Current (CIN = Ceramic 1. µf, COUT = Ceramic 1. µf, Ta = 25 C) RP122x121x RP122x281x V IN =1.9V V IN =2.2V V IN =3.2V V IN =3.3V V IN =3.8V V IN =4.8V

14 NO.EA RP122x481x V IN =5.25V V IN =5.5V 7) vs. Input Voltage (CIN = Ceramic 1. µf, COUT = Ceramic 1. µf, Ta = 25 C) RP122x121x RP122x281x I OUT =1mA I OUT =3mA I OUT =15mA I OUT =1mA I OUT =3mA I OUT =15mA RP122x481x I OUT =1mA I OUT =3mA I OUT =15mA 14

15 NO.EA ) Supply Current vs. Input Voltage (CIN = Ceramic 1. µf, COUT = Ceramic 1. µf, Ta = 25 C) RP122x121x RP122x281x Supply Current I SS [μa] Supply Current I SS [μa] RP122x481x Supply Current I SS [μa] ) Supply Current vs. Output Current (CIN = Ceramic 1. µf, COUT = Ceramic 1. µf, Ta = 25 C) RP122x121x, VIN = 2.2 V RP122x281x, VIN = 3.8 V 2 2 Supply Current I SS [μa] Supply Current I SS [μa]

16 NO.EA RP122x481x, VIN = 5.5 V Supply Current I SS [μa] ) Ripple Rejection vs. Frequency (COUT = Ceramic 1. µf, Ripple =.2 Vp-p, Ta = 25 C) RP122x121x, VIN = 2.2 V RP122x281x, VIN = 3.8 V Ripple Rejection RR [db] Ripple Rejection RR [db] I OUT =1mA 2 I OUT =2mA I OUT =1mA I OUT =25mA Frequency [khz] RP122x481x, VIN = 5.5 V 4 I OUT =1mA 2 I OUT =2mA I OUT =1mA I OUT =25mA Frequency [khz] Ripple Rejection RR [db] I OUT =1mA 2 I OUT =2mA I OUT =1mA I OUT =25mA Frequency [khz] 16

17 NO.EA ) Ripple Rejection vs. Input Voltage (COUT = Ceramic 1. µf, Ripple =.2 Vp-p, Ta = 25 C) RP122x121x, IOUT = 1 ma RP122x121x, IOUT = 2 ma Ripple Rejection RR [db] Ripple Rejection RR [db] kHz 2 1kHz 1kHz 1kHz RP122x281x, IOUT = 1 ma 4.1kHz 2 1kHz 1kHz 1kHz RP122x481x, IOUT = 1 ma Ripple Rejection RR [db] Ripple Rejection RR [db] kHz 2 1kHz 1kHz 1kHz RP122x281x, IOUT = 2 ma 4.1kHz 2 1kHz 1kHz 1kHz RP122x481x, IOUT = 2 ma Ripple Rejection RR [db] kHz 2 1kHz 1kHz 1kHz Ripple Rejection RR [db] kHz 2 1kHz 1kHz 1kHz

18 NO.EA RP122x121x, IOUT = 1 ma RP122x121x, IOUT = 25 ma Ripple Rejection RR [db] kHz 2 1kHz 1kHz 1kHz RP122x281x, IOUT = 1 ma Ripple Rejection RR [db] kHz 2 1kHz 1kHz 1kHz RP122x281x, IOUT = 25 ma Ripple Rejection RR [db] Ripple Rejection RR [db] kHz 2 1kHz 1kHz 1kHz RP122x481x, IOUT = 1 ma 4.1kHz 2 1kHz 1kHz 1kHz Ripple Rejection RR [db] Ripple Rejection RR [db] kHz 2 1kHz 1kHz 1kHz RP122x481x, IOUT = 25 ma 4.1kHz 2 1kHz 1kHz 1kHz

19 RP122x NO.EA ) Output Noise Spectral Density vs. Frequency (CIN=Ceramic 1.µF, COUT=Ceramic 1.µF, Ta=25 C) RP122x121x, VIN = 2.2 V RP122x281x, VIN = 3.8 V 1 IOUT=1mA IOUT=2mA IOUT=25mA IOUT=4mA 1 Output Noise Spectral Density [μv/ Hz] Output Noise Spectral Density [μv/ Hz] IOUT=1mA IOUT=2mA IOUT=25mA IOUT=4mA Frequency [khz] Frequency [khz] RP122x481x, VIN = 5.5 V Output Noise Spectral Density [μv/ Hz] 1 IOUT=1mA IOUT=2mA IOUT=25mA IOUT=4mA Frequency [khz] 13) Input Transient Response (CIN = Ceramic 1. µf, COUT = Ceramic 1. µf, tr = tf = 5 μs, Ta = 25 C) RP122x121x, IOUT = 1 ma RP122x121x, IOUT = 2 ma Input Voltage Input Voltage VIN [V] VOUT [V] 2.5 Input Voltage Input Voltage VIN [V] VOUT [V]

20 NO.EA RP122x281x, IOUT = 1 ma Input Voltage RP122x481x, IOUT = 1 ma Input Voltage RP122x281x, IOUT = 2 ma Input Voltage RP122x481x, IOUT = 2 ma Input Voltage ) Load transient Response (CIN = Ceramic 1. µf, COUT = Ceramic 1. µf, Ta = 25 C) RP122x121x, VIN = 2.2 V, RP122x121x, VIN = 2.2 V, IOUT = 1 ma <=> 25 ma, tr = tf = 1 μs IOUT = => 4 ma, tr =.5 μs Output Current Output Current

21 NO.EA RP122x281x, VIN = 3.8 V, IOUT = 1 ma <=> 25 ma, tr = tf = 1 μs RP122x281x, VIN = 3.8 V, IOUT = => 4 ma, tr =.5 μs Output Current Output Current RP122x481x, VIN = 5.5 V, IOUT = 1 ma <=> 25 ma, tr = tf = 1 μs RP122x481x, VIN = 5.5 V, IOUT = => 4 ma, tr =.5 μs Output Current Output Current ) Turn On Speed with CE Pin (CIN = Ceramic 1. µf, COUT = Ceramic 1. µf, Ta = 25 C) RP122x121x, VIN = 2.2 V RP122x281x, VIN = 3.8 V CE Input Voltage.5 I OUT =ma I OUT =2mA I OUT =15mA CE Input Voltage V CE [V] CE Input Voltage I OUT =ma I OUT =2mA.5 I OUT =15mA CE Input Voltage V CE [V] 22

22 NO.EA RP122x481x, VIN = 5.5V CE Input Voltage I OUT =ma 1. I OUT =2mA. I OUT =15mA CE Input Voltage V CE [V] 16) Turn Off Speed with CE Pin (CIN = Ceramic 1. µf, COUT = Ceramic 1. µf, Ta = 25 C) RP122x121D, VIN = 2.2 V RP122x281D, VIN = 3.8 V CE Input Voltage I OUT =ma I OUT =2mA I OUT =15mA CE Input Voltage V CE [V] CE Input Voltage I OUT =ma I OUT =2mA I OUT =15mA CE Input Voltage V CE [V] RP122x481D, VIN = 5.5V 6. CE Input Voltage I OUT =ma I OUT =2mA I OUT =15mA 2.. CE Input Voltage V CE [V]

23 NO.EA ) Inrush Current (CIN = Ceramic 1. µf, IOUT = ma, Ta = 25 C) RP122x121x, VIN = 2.2 V / CE Input Voltage V CE [V] / CE Input Voltage V CE [V] / CE Input Voltage V CE [V] Inrush Current CE Input Voltage C OUT =1μF C OUT =2.2μF C OUT =4.7μF C OUT =1μF C OUT =22μF C OUT =47μF C OUT =1μF RP122x281x, VIN = 3.8 V CE Input Voltage C OUT =1μF C OUT =2.2μF C OUT =4.7μF C OUT =1μF C OUT =22μF C OUT =47μF RP122x481x, VIN = 5.5 V Inrush Current CE Input Voltage Inrush Current C OUT =1μF C OUT =2.2μF C OUT =4.7μF C OUT =1μF C OUT =22μF Inrush Current I RUSH [ma] Inrush Current I RUSH [ma] Inrush Current I RUSH [ma] / CE Input Voltage V CE [V] / CE Input Voltage V CE [V] / CE Input Voltage V CE [V] Inrush Current CE Input Voltage C OUT =22μF CE Input Voltage C OUT =1μF Inrush Current CE Input Voltage Inrush Current C OUT =47μF Inrush Current I RUSH [ma] Inrush Current I RUSH [ma] Inrush Current I RUSH [ma] 24

24 POWER DISSIPATION WLCSP-4-P8 Ver. A The power dissipation of the package is dependent on PCB material, layout, and environmental conditions. The following measurement conditions are based on JEDEC STD Measurement Conditions Item Environment Board Material Board Dimensions Copper Ratio Measurement Conditions Mounting on Board (Wind Velocity = m/s) Glass Cloth Epoxy Plastic (Four-Layer Board) 11.5 mm x mm x 1.6 mm Outer Layer (First Layer): 6% Inner Layers (Second and Third Layers): 1% Outer Layer (Fourth Layer): 6% Measurement Result Item Power Dissipation Thermal Resistance (θja) θja: Junction-to-Ambient Thermal Resistance (Ta = 25 C, Tjmax = 125 C) Measurement Result 52 mw θja = 192 C/W Power Dissipation (mw) Ambient Temperature ( C) Power Dissipation vs. Ambient Temperature Measurement Board Pattern i

25 PACKAGE DIMENSIONS WLCSP-4-P8 Ver. A WLCSP-4-P8 Package Dimensions (Unit: mm) i

26 Visual Inspection Criteria WLCSP VI No. Inspection Items Inspection Criteria Figure 1 Package chipping A.2mm is rejected B.2mm is rejected C.2mm is rejected And, Package chipping to Si surface and to bump is rejected. 2 Si surface chipping A.2mm is rejected B.2mm is rejected C.2mm is rejected But, even if A.2mm, B.1mm is acceptable. 3 No bump No bump is rejected. 4 Marking miss To reject incorrect marking, such as another product name marking or another lot No. marking. 5 No marking To reject no marking on the package. 6 Reverse direction of marking To reject reverse direction of marking character. 7 Defective marking To reject unreadable marking. (Microscope: X15/ White LED/ Viewed from vertical direction) 8 Scratch To reject unreadable marking character by scratch. (Microscope: X15/ White LED/ Viewed from vertical direction) 9 Stain and Foreign To reject unreadable marking character by stain and foreign material. material (Microscope: X15/ White LED/ Viewed from vertical direction) i

27 POWER DISSIPATION DFN(PLP)11-4 Ver. B The power dissipation of the package is dependent on PCB material, layout, and environmental conditions. The following measurement conditions are based on JEDEC STD Measurement Conditions Item Environment Board Material Board Dimensions Copper Ratio Through-holes Measurement Conditions Mounting on Board (Wind Velocity = m/s) Glass Cloth Epoxy Plastic (Four-Layer Board) 76.2 mm mm.8 mm Outer Layer (First Layer): Less than 95% of 5 mm Square Inner Layers (Second and Third Layers): Approx. 1% of 5 mm Square Outer Layer (Fourth Layer): Approx. 1% of 5 mm Square.2 mm 11 pcs Measurement Result Item Power Dissipation Thermal Resistance ( ja) Thermal Characterization Parameter (ψjt) ja: Junction-to-Ambient Thermal Resistance ψjt: Junction-to-Top Thermal Characterization Parameter (Ta = 25 C, Tjmax = 125 C) Measurement Result 55 mw ja = 18 C/W ψjt = 15 C/W Power Dissipation (mw) Ambient Temperature ( C) Power Dissipation vs. Ambient Temperature Measurement Board Pattern i

28 PACKAGE DIMENSIONS DFN(PLP)11-4 Ver. A * DFN(PLP)11-4 Package Dimensions (Unit: mm) The tab on the bottom of the package shown by blue circle is a substrate potential (GND). It is recommended that this tab be connected to the ground plane on the board but it is possible to leave the tab floating. i

29 Halogen Free Ricoh is committed to reducing the environmental loading materials in electrical devices with a view to contributing to the protection of human health and the environment. Ricoh has been providing RoHS compliant products since April 1, 26 and Halogen-free products since April 1,

30 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Ricoh Electronics: RP122K291D-TR RP122K331D-TR RP122K311D-TR RP122K121D-TR RP122K281D-TR RP122K451D-TR RP122K181D-TR

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