R1524x Series. 200 ma 36 V Input Ultra Low Supply Current VR OUTLINE FEATURES APPLICATIONS. No. EA

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1 Series 2 ma 36 V Input Ultra Low Supply Current VR OUTLINE No. EA The R1524x is an ultra-low supply current voltage regulator featuring 2 ma output current and 36 V input voltage. This device consists of an Output Short-circuit Protection Circuit, an Over-current Protection Circuit, and a Thermal Shutdown Circuit in addition to the basic regulator circuits. The operating temperature range is from 4 C to 15 C, and the maximum input voltage is 36 V. All these features allow the R1524x to become an ideal power source of electric home appliances. The output voltages are internally fixed at either of the following: 1.8 V, 2.5 V, 2.8 V, 3. V, 3.3 V, 3.4 V, 5. V, 5.5 V, 6. V, 6.4 V, 8. V, 8.5 V and 9. V. The output voltage accuracy is ±.6%. The packages for this device range from high-density mounting to ultra high wattage. The R1524x is offered in five packages; a 5-pin SOT-23-5, a 5-pin SOT-89-5, a 6-pin HSOP-6J, a 6-pin DFN(PLP)182-6, and an 8- pin HSOP-8E package. FEATURES Input Voltage Range (Maximum Rating) 3.5 V to 36 V (5 V) Operating Temperature Range 4 C to 15 C Supply Current Typ. 2.2 µa Standby Current Typ..1 µa Dropout Voltage Typ..6 V (IOUT = 2 ma, VOUT = 5. V) Range 1.8 V / 2.5 V / 2.8 V / 3. V / 3.3 V / 3.4V / 5. V / 5.5 V / 6. V / 6.4 V / 8. V / 8.5 V / 9. V *Contact Ricoh sales representatives for other voltages. Accuracy ±.6% (Ta = 25 C) Temperature-Drift Coefficient Typ. ±6 ppm/ C Line Regulation Typ..1%/V (VSET + 1 V VIN 36 V) Built-in Output Short-circuit Protection Circuit Typ. 8 ma Built-in Over-current Protection Circuit Typ. 35 ma Built-in Thermal Shutdown Circuit Thermal Shutdown Temperature: Typ. 16 C Ceramic capacitors are recommended to be used with this device COUT =.1 μf or more Packages SOT-23-5, SOT-89-5, HSOP-6J, DFN(PLP)182-6, HSOP-8E APPLICATIONS Power source for home appliances such as refrigerators, rice cookers, and electric hot-water pot. Power source for notebook PCs, digital TVs, cordless phones, and private LAN system. Power source for office equipment machines such as copiers, printers, facsimiles, scanners, and projectors. 1

2 No. EA SELECTION GUIDE The set output voltage and the package type are user-selectable. Selection Guide Product Name Package Quantity per Reel Pb Free Halogen Free R1524NxxxB-TR-FE SOT , pcs Yes Yes R1524HxxxB-T1-FE SOT , pcs Yes Yes R1524SxxxB-E2-FE HSOP-6J 1, pcs Yes Yes R1524KxxxB-TR DFN(PLP) , pcs Yes Yes R1524SxxxH-E2-FE HSOP-8E 1, pcs Yes Yes xxx: Specify the set output voltage (VSET) 1.8 V (18) / 2.5 V (25) / 2.8 V (28) / 3. V (3) / 3.3 V (33) / 3.4 V (34) / 5. V (5) / 5.5 V (55) / 6. V (6) / 6.4 V (64) / 8. V (8) / 8.5 V (85) / 9. V (9) *Contact Ricoh sales representatives for other voltages. BLOCK DIAGRAM Thermal Shutdown Circuit VDD VOUT Vref CE Short Protection Current Limit GND R1524x Block Diagram 2

3 PIN DESCRIPTIONS R1524x No. EA (mark side) SOT-23-5 Pin Configuration SOT-89-5 Pin Configuration HSOP-6J Pin Configuration Top View Bottom View Top View Bottom View (1) (1) DFN(PLP)182-6 Pin Configuration HSOP-8E Pin Configuration SOT-23-5 Pin Descriptions Pin No. Symbol Description 1 GND (2) Ground Pin 2 GND (2) Ground Pin 3 CE Chip Enable Pin (Active-high) 4 VOUT Output Pin 5 VDD Input Pin SOT-89-5 Pin Descriptions Pin No. Symbol Description 1 VOUT Output Pin 2 GND (3) Ground Pin 3 CE Chip Enable Pin (Active-high) 4 GND (3) Ground Pin 5 VDD Input Pin (1) The tab on the bottom of the package enhances thermal performance and is electrically connected to GND (substrate level). It is recommended that the tab be connected to the ground plane on the board, or otherwise be left open. (2) The GND pin must be wired together when it is mounted on board. (3) The GND pin must be wired together when it is mounted on board. 3

4 No. EA HSOP-6J Pin Descriptions Pin No. Symbol Description 1 VOUT Output Pin 2 GND (1) Ground Pin 3 CE Chip Enable Pin (Active-high) 4 GND (1) Ground Pin 5 GND (1) Ground Pin 6 VDD Input Pin DFN(PLP)182-6 Pin Descriptions Pin No. Symbol Description 1 CE Chip Enable Pin (Active-high) 2 NC No Connection 3 GND Ground Pin 4 VDD Input Pin 5 NC No Connection 6 VOUT Output Pin HSOP-8E Pin Descriptions Pin No. Symbol Description 1 VOUT Output Pin 2 NC No Connection 3 NC No Connection 4 CE Chip Enable Pin (Active-high) 5 GND Ground Pin 6 NC No Connection 7 NC No Connection 8 VDD Input Pin PIN EQUIVALENT CIRCUIT DIAGRAMS Driver CE VOUT V OUT Pin CE Pin (1) The GND pin must be wired together when it is mounted on board. 4

5 No. EA ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings Symbol Item Rating Unit VIN Input Voltage.3 to 5 V VIN Peak Input Voltage (1) 6 V VCE Input Voltage (CE Pin).3 to 5 V VOUT.3 to VIN V IOUT Output Current 3 ma PD Power Dissipation (2) (JEDEC STD.51-7 Test Land Pattern) SOT SOT HSOP-6J 27 DFN(PLP) HSOP-8E 29 Tj Junction Temperature Range 4 to 125 C Tstg Storage Temperature Range 55 to 125 C mw ABSOLUTE MAXIMUM RATINGS Electronic and mechanical stress momentarily exceeded absolute maximum ratings may cause the permanent damages and may degrade the lifetime and safety for both device and system using the device in the field. The functional operation at or over these absolute maximum ratings are not assured. RECOMMENDED OPERATING CONDITIONS Recommended Operating Conditions Symbol Item Rating Unit VIN Input Voltage 3.5 to 36 V Ta Operating Temperature Range 4 to 15 C RECOMMENDED OPERATING CONDITIONS All of electronic equipment should be designed that the mounted semiconductor devices operate within the recommended operating conditions. The semiconductor devices cannot operate normally over the recommended operating conditions, even if when they are used over such conditions by momentary electronic noise or surge. And the semiconductor devices may receive serious damage when they continue to operate over the recommended operating conditions. (1) Duration time: 2 ms (2) Refer to POWER DISSIPATION for detailed information. 5

6 No. EA ELECTRICAL CHARACTERISTICS CIN = COUT =.1 μf, unless otherwise noted. The specifications surrounded by R1524x Electrical Characteristics are guaranteed by design engineering at -4 C Ta 15 C. (Ta = 25 C) Symbol Item Conditions Min. Typ. Max. Unit ISS Supply Current VIN = 14 V IOUT = ma VSET 5. V V < VSET Istandby Standby Current VIN = 36 V, VCE = V.1 1. μa VOUT VOUT / IOUT VOUT / VIN Load Regulation Line Regulation VSET + 1 V VIN 36 V IOUT = 1 ma VIN = VSET + 3. V 1 ma IOUT 2 ma VSET + 1 V VIN 36 V, IOUT = 1 ma VDIF Dropout Voltage IOUT = 2 ma ILIM ISC VCEH VCEL IPD TTSD TTSR Output Current Limit Short Current Limit CE Input Voltage H CE Input Voltage L CE Pull-down Current Thermal Shutdown Temparature Thermal Shutdown Released Temperature Ta = 25 C C Ta 15 C μa Refer to the Product-specific Electrical Characteristics VSET < 3.3 V mv 3.3 V VSET %/V V Refer to the Product-specific Electrical Characteristics VIN = VSET + 3. V ma VOUT = V 6 8 ma V 1. V.2.6 μa Junction Temperature 16 C Junction Temperature 135 C All test items listed under Electrical Characteristics are done under the pulse load condition (Tj Ta = 25 C). 6

7 No. EA The specifications surrounded by are guaranteed by design engineering at -4 C Ta 15 C. R1524x Product-specific Electrical Characteristics (Ta = 25 C) V OUT (V) V OUT (V) Product V (Ta = 25 C) ( 4 C Ta 15 C) OUT/ I OUT (mv) V DIF (V) Name MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX. TYP. MAX. R1524x18x R1524x25x R1524x28x R1524x3x R1524x33x R1524x34x R1524x5x R1524x55x R1524x6x R1524x64x R1524x8x R1524x85x R1524x9x

8 No. EA THEORY OF OPERATION Thermal Shutdown R1524x has a built-in thermal shutdown circuit, which stops the regulator operation if the junction temperature of this device increases to 16 C (Typ.) or higher. If the temperature drops to 135 C (Typ.) or lower, the regulator restarts the operation. Unless eliminating the overheating problem, the regulator turns on and off repeatedly and as a result, a pulse shaped output voltage is generated. APPLICATION INFORMATION TYPICAL APPLICATIONS VDD VOUT VOUT C1 R1524x C2 CE Control CE GND R1524x Typical Applications C1 = Ceramic.1 µf C2 = Ceramic.1 µf 8

9 No. EA TECHNICAL NOTES Phase Compensation In the R1524x, phase compensation is provided to secure stable operation even when the load current is varied. For this purpose, make sure to use.1 μf or more of a capacitor (C2). In case of using a tantalum type capacitor and the ESR (Equivalent Series Resistance) value of the capacitor is large, the output might be unstable. Evaluate the circuit including consideration of frequency characteristics. Connect.1 μf or more of a capacitor (C1) between VDD and GND, and as close as possible to the pins. PCB Layout For SOT-23-5 package type, wire the following GND pins together: No. 1 and No. 2 For SOT-89-5 package type, wire the following GND pins together: No. 2 and No. 4. For HSOP-6J package type, wire the following GND pins together: No. 2, No. 4, and No. 5. 9

10 No. EA TYPICAL CHARACTERISTICS Note: Typical Characteristics are intended to be used as reference data; they are not guaranteed. 1) vs. Output Current (Ta = 25 C) R1524x18B R1524x33B V OUT (V) VIN=3.8V VIN=4.8V Output Current IOUT (ma) VIN=5.3V 6.3V Output Current IOUT (ma) 4 R1524x5B R1524x9B VIN=7V 8V Output Current IOUT (ma) VIN=11V 12V Output Current IOUT (ma) 2) vs. Input Voltage (Ta = 25 C) R1524x18B R1524x33B V OUT (V) mA 1mA Input Voltage V IN (V) mA 1mA

11 No. EA R1524x5B mA 1mA R1524x9B 5mA 1mA ) Supply Current vs. Temperature R1524x18B R1524x33B VIN = 14V 4.5 VIN = 14V Supply Current Iss (μa) Supply Current Iss (μa) Ta ( C) Ta ( C) R1524x5B R1524x9B VIN = 14V 4.5 VIN = 14V Supply Current Iss (μa) Supply Current Iss (μa) Ta ( C) Ta ( C) 11

12 No. EA ) Supply Current vs. Input Voltage R1524x18B R1524x33B Supply Current I SS (μa) Ta=- 4 C 25 C Supply Current Iss (μa) Ta=-4 C 25 C 15 C Input Voltage V IN (V) ) vs. Temperature (I OUT = 1 ma) R1524x18B R1524x33B VIN = 14V VIN = 14V Ta ( C) Ta ( C) R1524x5B R1524x9B 5.1 VIN = 14V 9.18 VIN = 14V Ta ( C) Ta ( C) 12

13 No. EA ) Dropout Voltage vs. Output Current R1524x18B R1524x33B Dropout Voltage V DIF [V] Ta=-4 C 25 C 15 C Dropout Voltage VDIF (V) Ta=-4 C 25 C 15 C Output Current IOUT (ma) Output Current IOUT (ma) R1524x5B R1524x9B 1.5 Ta=-4 C 1. Ta=-4 C Dropout Voltage VDIF (V) C 15 C Dropout Voltage VDIF (V) C 15 C Output Current IOUT (ma) Output Current IOUT (ma) 7) Dropout Voltage vs. (Ta = 25 C) 1.8 Dropout Voltage V DIF (V) mA 1mA 2mA 13

14 No. EA ) Ripple Rejection vs. Input Voltage (Ta = 25 C, Ripple =.2 Vpp) R1524x18B R1524x33B Ripple Rejection RR (db) IOUT=5mA f=1hz 1kHz 1kHz 1kHz R1524x5B Ripple Rejection Ratio RR (db) 7 IOUT=5mA 6 f=1hz 5 4 1kHz 3 1kHz 2 1 1kHz R1524x9B Ripple Rejection Ratio RR (db) 7 IOUT=5mA 6 f=1hz 5 4 1kHz 3 1kHz 2 1 1kHz Ripple Rejection Ratio RR (db) 7 IOUT=5mA 6 5 f=1hz 4 3 1kHz 2 1kHz 1 1kHz ) Ripple Rejection vs. Frequency (Ta = 25 C, Ripple =.2 Vpp) R1524x18B R1524x33B Ripple Rejection (db) V IN = 3.8V 5mA 1mA Frequency (khz) Ripple Rejection Ratio RR (db) 8 7 VIN = 5.3V 6 5 5mA 1mA Frequency (khz) 14

15 No. EA Ripple Rejection Ratio RR (db) R1524x5B 8 7 VIN = 7.V 6 5 5mA 1mA Frequency (khz) Ripple Rejection Ratio RR (db) R1524x9B 8 7 VIN = 11.V 6 5 5mA 1mA Frequency (khz) 1) Input Transient Response (Ta = 25 C) R1524x18B R1524x33B V OUT (V) Input Voltage C2 =.1 μf 1 μf Input Voltage V IN (V) Input Voltage tr=tf=1μs C2=.1μF μF R1524x5B R1524x9B Input Voltage tr=tf=1μs C2=.1μF 1μF Input Voltage tr=tf=1μs C2=.1μF 1μF

16 No. EA ) Load Transient Response (Ta = 25 C) V OUT (V) R1524x18B Output Current tr=tf=.5μs 1.5 1μF 1.2 C2=.1μF R1524x5B 1mA Output Current (ma) R1524x33B Output Current tr=tf=.5μs C2=.1μF 1μF Time (µs) R1524x9B 1mA 4 2 Output Current IOUT (ma) Output Current tr=tf=.5μs C2=.1μF 1μF Time (µs) 1mA 4 2 Output Current IOUT (ma) Output Current tr=tf=.5μs C2=.1μF 1μF Time (µs) 1mA 4 2 Output Current IOUT (ma) 12) CE Transient Response (Ta = 25 C) R1524x18B V CE Input Voltage 8 V OUT (V) V C2=.1μF C2=1μF Inrush Current Inrush Current (ma) V OUT (V) V V CE Input Voltage C2=1μF, I OUT =1mA C2=.1μF, I OUT =1mA C2=.1μF, I OUT =1mA C2=1μF, I OUT =1mA Input Voltage CE (V) 16

17 No. EA R1524x33B V 5V CE Input Voltage C2=.1μF 1μF 1μF Inrush Current Inrush Current (ma) V V CE Input Voltage C2=1μF C2=1μF, & C2=.1μF, C2=.1μF V 8. V R1524x5B 9 CE Input Voltage C2=.1μF 5 1μF 4 1μF Inrush Current Inrush Current (ma) V V CE Input Voltage C2=1μF C2=1μF, & C2=.1μF, C2=.1μF R1524x9B V 5V CE Input Voltage C2=.1μF 1μF 1μF Inrush Current Inrush Current (ma) V V CE Input Voltage C2=1μF C2=1μF, & C2=.1μF, C2=.1μF

18 No. EA ) Power-on Transient Response (Ta = 25 C, V CE = 5 V) V OUT (V) V 3.8V R1524x18B C2=.1μ F C2=1μF Inrush Current Input Voltage Output Voltage R1524x5B Inrush Current (ma) R1524x33B 8. 9 Input Voltage V C2=.1μF 5 V. 4 1μF 3 1μF 2 1 Inrush Current R1524x9B Inrush Current (ma) V 7V Input Voltage C2=.1μF 1μF 1μF Inrush Current Inrush Current (ma) V 11V Input Voltage Output C2=.1μF 1μF 1μF Inrush Current Inrush Current (ma) ) Load Dump (Ta = 25 C) 18 R1524x18B Input Voltage R1524x33B Input Voltage C2=.1μF 1μF

19 No. EA R1524x5B Input Voltage time (ms) C2=.1μF 1μF R1524x9B Input Voltage C2=.1μF 1μF 15) Cranking (Ta = 25 C) R1524x5B R1524x9B Input Voltage C2=.1μF 1μF Input Voltage C2=.1μF 1μF

20 No. EA Input Transient/Load Transient vs. Output Capacity (C2) R1524 performs a stable operation by using.1 µf of ceramic capacitor as the output capacitor. However, the variation of output voltage may not meet the demand of the system when input voltage and load current vary. In such cases, the variation of output voltage can be minimized significantly by using 1 µf or higher ceramic capacitor. When using an electrolytic capacitor for the output line, place the electrolytic capacitor outer side of the ceramic capacitor arranged close to the IC. Input Transient Response Load Transient Response R1524x33B R1524x33B Input Voltage tr=tf=1μs C2=.1μF 1μF Output Current tr=tf=.5μs C2=.1μF 1μF 1mA 4 2 Output Current IOUT (ma) Time (µs) 2

21 No. EA ESR vs. Output Current It is recommended that a ceramic type capacitor be used for this device. However, other types of capacitors having lower ESR can also be used. The relation between the output current (IOUT) and the ESR of output capacitor is shown below. C1 VDD VOUT R1524xxxxB CE GND C2 IOUT ESR C1 = Ceramic.1 μf, C2 = Ceramic.1 μf Measurement Conditions Frequency Band: 1 Hz to 2 MHz Measurement Temperature: 4 C to 15 C Hatched area: Noise level is 4 μv (average) or below Ceramic Capacitors: C1 =.1 μf, C2 =.1 μf R1524x18B R1524x33B 1 Equivalent Series Resistance ESR (Ω) VIN=3.5V to 36V Equivalent Series Resistance ESR (Ω) VIN=3.5V to 36V Output Current IOUT (ma) Output Current IOUT (ma) R1524x5B R1524x9B 1 Equivalent Series Resistance ESR (Ω) VIN=5V to 36V Equivalent Series Resistance ESR (Ω) VIN=9V to 36V Output Current IOUT (ma) Output Current IOUT (ma) 21

22 POWER DISSIPATION SOT-23-5 Ver. A The power dissipation of the package is dependent on PCB material, layout, and environmental conditions. The following measurement conditions are based on JEDEC STD Measurement Conditions Item Environment Board Material Board Dimensions Copper Ratio Through-holes Measurement Conditions Mounting on Board (Wind Velocity = m/s) Glass Cloth Epoxy Plastic (Four-Layer Board) 76.2 mm mm.8 mm Outer Layer (First Layer): Less than 95% of 5 mm Square Inner Layers (Second and Third Layers): Approx. 1% of 5 mm Square Outer Layer (Fourth Layer): Approx. 1% of 5 mm Square φ.3 mm 7 pcs Measurement Result Item Power Dissipation Thermal Resistance (θja) Thermal Characterization Parameter (ψjt) θja: Junction-to-Ambient Thermal Resistance ψjt: Junction-to-Top Thermal Characterization Parameter (Ta = 25 C, Tjmax = 125 C) Measurement Result 66 mw θja = 15 C/W ψjt = 51 C/W Power Dissipation P D (mw) Ambient Temperature ( C) Power Dissipation vs. Ambient Temperature Measurement Board Pattern The above graph shows the power dissipation of the package at Tjmax = 125 C and Tjmax = 15 C. Operating the device in the hatched range might have a negative influence on its lifetime. The total hours of use and the total years of use must be limited as follows: Total Hours of Use Total Years of Use (4 hours/day) 13, hours 9 years i

23 PACKAGE DIMENSIONS SOT-23-5 Ver. A 2.9±.2 1.9±.2 (.95) (.95) 1.1±.1.8± ±.3 ~.1.2min ± SOT-23-5 Package Dimensions i

24 POWER DISSIPATION SOT-89-5 Ver. A The power dissipation of the package is dependent on PCB material, layout, and environmental conditions. The following measurement conditions are based on JEDEC STD Measurement Conditions Item Environment Board Material Board Dimensions Copper Ratio Through-holes Measurement Conditions Mounting on Board (Wind Velocity = m/s) Glass Cloth Epoxy Plastic (Four-Layer Board) 76.2 mm mm.8 mm Outer Layer (First Layer): Less than 95% of 5 mm Square Inner Layers (Second and Third Layers): Approx. 1% of 5 mm Square Outer Layer (Fourth Layer): Approx. 1% of 5 mm Square φ.3 mm 13 pcs Measurement Result Item Power Dissipation Thermal Resistance (θja) Thermal Characterization Parameter (ψjt) θja: Junction-to-Ambient Thermal Resistance ψjt: Junction-to-Top Thermal Characterization Parameter (Ta = 25 C, Tjmax = 125 C) Measurement Result 26 mw θja = 38 C/W ψjt = 13 C/W 4 Power Dissipation P D (mw) Ambient Temperature ( C) Power Dissipation vs. Ambient Temperature Measurement Board Pattern The above graph shows the power dissipation of the package at Tjmax = 125 C and Tjmax = 15 C. Operating the device in the hatched range might have a negative influence on its lifetime. The total hours of use and the total years of use must be limited as follows: Total Hours of Use Total Years of Use (4 hours/day) 13, hours 9 years i

25 PACKAGE DIMENSIONS SOT-89-5 Ver. A 1.±.2 4.5±.1 1.6±.2.42± φ1. 2.5±.1.4± ±.1 1.5±.1.4± ± S.4± ±.2 S.42±.1.42±.1.47±.1 1.5±.1 1.5±.1 SOT-89-5 Package Dimensions i

26 POWER DISSIPATION HSOP-6J Ver. A The power dissipation of the package is dependent on PCB material, layout, and environmental conditions. The following measurement conditions are based on JEDEC STD Measurement Conditions Item Environment Board Material Board Dimensions Copper Ratio Through-holes Measurement Conditions Mounting on Board (Wind Velocity = m/s) Glass Cloth Epoxy Plastic (Four-Layer Board) 76.2 mm mm.8 mm Outer Layer (First Layer): Less than 95% of 5 mm Square Inner Layers (Second and Third Layers): Approx. 1% of 5 mm Square Outer Layer (Fourth Layer): Approx. 1% of 5 mm Square φ.3 mm 28 pcs Measurement Result Item Power Dissipation Thermal Resistance (θja) Thermal Characterization Parameter (ψjt) θja: Junction-to-Ambient Thermal Resistance ψjt: Junction-to-Top Thermal Characterization Parameter (Ta = 25 C, Tjmax = 125 C) Measurement Result 27 mw θja = 37 C/W ψjt = 7 C/W 4 Power Dissipation P D (mw) Ambient Temperature ( C) Power Dissipation vs. Ambient Temperature Measurement Board Pattern The above graph shows the power dissipation of the package at Tjmax = 125 C and Tjmax = 15 C. Operating the device in the hatched range might have a negative influence on its lifetime. The total hours of use and the total years of use must be limited as follows: Total Hours of Use Total Years of Use (4 hours/day) 13, hours 9 years i

27 PACKAGE DIMENSIONS HSOP-6J Ver. A HSOP-6J Package Dimensions i

28 POWER DISSIPATION DFN(PLP)182-6 Ver. B The power dissipation of the package is dependent on PCB material, layout, and environmental conditions. The following measurement conditions are based on JEDEC STD Measurement Conditions Item Environment Board Material Board Dimensions Copper Ratio Through-holes Measurement Result Item Power Dissipation Thermal Resistance (θja) Thermal Characterization Parameter (ψjt) Measurement Conditions Mounting on Board (Wind Velocity = m/s) Glass Cloth Epoxy Plastic (Four-Layer Board) 76.2 mm mm.8 mm Outer Layer (First Layer): Less than 95% of 5 mm Square Inner Layers (Second and Third Layers): Approx. 1% of 5 mm Square Outer Layer (Fourth Layer): Approx. 1% of 5 mm Square φ.2 mm 34 pcs θja: Junction-to ambient thermal resistance. ψjt: Junction to-top of package thermal characterization parameter. (Ta = 25 C, Tjmax = 125 C) Measurement Result 22 mw θja = 45 C/W ψjt = 18 C/W Power Dissipation P D (mw) Ambient Temperature ( C) Power Dissipation vs. Ambient Temperature Measurement Board Pattern The above graph shows the power dissipation of the package at Tjmax = 125 C and Tjmax = 15 C. Operating the device in the hatched range might have a negative influence on its lifetime. The total hours of use and the total years of use must be limited as follows: Total Hours of Use Total Years of Use (4 hours/day) 13, hours 9 years i

29 PACKAGE DIMENSIONS DFN(PLP)182-6 Ver. A A 1.8 B 1.6± ±.1.5 M AB X ±.1.25±.1.25±.1 INDEX MAX..1NOM..3±.1 S.5 S Bottom View.5min * DFN(PLP)182-6 Package Dimensions (Unit: mm) The tab on the bottom of the package is substrate level (GND). It is recommended that the tab be connected to the ground plane on the board, or otherwise be left floating. i

30 POWER DISSIPATION HSOP-8E Ver. B The power dissipation of the package is dependent on PCB material, layout, and environmental conditions. The following measurement conditions are based on JEDEC STD Measurement Conditions Item Measurement Conditions Environment Board Material Board Dimensions Copper Ratio Through-holes Measurement Result Item Power Dissipation Thermal Resistance (θja) Thermal Characterization Parameter (ψjt) Mounting on Board (Wind Velocity = m/s) Glass Cloth Epoxy Plastic (Four-Layer Board) 76.2 mm mm.8 mm Outer Layer (First Layer): Less than 95% of 5 mm Square Inner Layers (Second and Third Layers): Approx. 1% of 5 mm Square Outer Layer (Fourth Layer): Approx. 1% of 5 mm Square φ.3 mm 21 pcs θja: Junction-to ambient thermal resistance. ψjt: Junction to-top of package thermal characterization parameter. (Ta = 25 C, Tjmax = 125 C) Measurement Result 29 mw θja = 34.5 C/W ψjt = 1 C/W Power Dissipation P D (mw) Ambient Temperature ( C) Power Dissipation vs. Ambient Temperature Measurement Board Pattern The above graph shows the power dissipation of the package at Tjmax = 125 C and Tjmax = 15 C. Operating the device in the hatched range might have a negative influence on its lifetime. The total hours of use and the total years of use must be limited as follows: Total Hours of Use Total Years of Use (4 hours/day) 13, hours 9 years i

31 PACKAGE DIMENSIONS HSOP-8E HSOP-8E Package Dimensions The tab on the bottom of the package shown by blue circle is substrate potential (GND). It is recommended that this tab be connected to the ground plane on the board but it is possible to leave the tab floating. i

32 Halogen Free Ricoh is committed to reducing the environmental loading materials in electrical devices with a view to contributing to the protection of human health and the environment. Ricoh has been providing RoHS compliant products since April 1, 26 and Halogen-free products since April 1,