Interfacing to Digital Potentiometers

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1 Interfacing to Digital Potentiometers Date: January The Low Power Analog Solution Welcome to the Interfacing to Digital Potentiometer's presentation We will cover material which should give you a better understanding of the different interfaces that are used to interface to Digital Potentiometer s and some special features that Microchip supports on the Serial Interface 1

2 Digital Potentiometer Block Diagram Three main blocks: Serial Interface System Control Resistor Network Three Common Serial Interfaces: Up/Down SPI I 2 C Date: January The Low Power Analog Solution The Digital Potentiometer Device has three main functional blocks. These are: The Serial Interface, the System Control, and the Resistor Network. Today We will be focusing on the Serial Interface. There are three common Serial Interfaces. These are: A simple Up / Down interface, the SPI interface and the I 2 C interface. 2

3 Serial Interface Up/Down Uses two pins An Up/Down (U/D) pin A Chip Select (CS) pin CS is used to enable/disable the operation of the interface When CS goes active, the level (state) of the U/D pin determines if each U/D pin rising edge increments (up) or Decrements (down) the wiper setting Date: January The Low Power Analog Solution The Up / Down interface is the simplest of the three interfaces. The wiper setting is only moved one position, either Up or Down, from the current position. This occurs on the rising edge of the Up / Down (U/D) pin, when the device's CS signal is active. This is ok for many applications. This includes when a non-volatile device is being used for calibration at the manufacturing step. The test hardware would monitor the appropriate resistor network node and send commands (increment/decrement) until the unit is calibrated to within specifications. To go to a known wiper position, the "Controller" must force the wiper to either the full scale or zero scale position. The the "Controller" must count the desired number of steps from the full scale or zero scale position. 3

4 Selecting Up or Down Operation Date: January The Low Power Analog Solution This figure highlights the starting state of the U/D pin when the CS pin goes active. This starting state determines if each rising edge of the U/D pin causes the wiper setting to increment or decrement. 4

5 Serial Interface SPI Uses three or four pins A Serial In (SI) pin A Serial Clock (SCK) pin A Chip Select (CS) pin A Serial Out (SO) pin not on all devices CS is used to enable/disable the operation of the interface SO pin is only needed when the device supports reads or device chaining Small packages may lose the SO pin Date: January The Low Power Analog Solution The SPI interface is also an easy interface. The device requires a minimum of three pins. These are the Serial In pin, or SI, the Serial Clock Pin, or SCK, and the Chip Select pin, or cs. The Serial Out pin, or SO, is not required to be implemented, but then the ability to read the contents of the device, or serial chain devices is lost. Digital Potentiometers packaged in small pin-out packages, such as a SOT-23, do not have enough pins to offer the full serial interface and the required resistor network Terminal pins, so a trade-off will be taken. Each additional device on the SPI bus requires it s own CS pin. The SPI interface can allow fast communication between the Host Controller and the Digital Potentiomenter. 5

6 Serial Interface I 2 C Uses a minimum of two pins Serial Data (SDA) pin Serial Clock (SCL) pin Up to three additional pins may be present A0, A1, A2: I 2 C hardware address pins SDA and SCL are open drain Each device on bus is individually addressable Immunity to bus noise is increased Microchip plans future devices with the I 2 C interface Date: January The Low Power Analog Solution The I2C interface adds some complexity to the Host Controller firmware but allows the interface to be as few as two pins while still being able to read and write to the device. Multiple devices can easily be added to the bus, and due to the open-drain outputs for the clock (SCL) and data (SDA) signals, all master devices can initiate serial communication. Address pins are used to differentiate multiple of the same device being used on the I2C bus. The I2C interface also has better noise immunity then SPI and the U/D interfaces. 6

7 Comparison of I 2 C to SPI Serial Interface Comparison of I 2 C to SPI Speed: SPI can be much faster Host Controller firmware: SPI is simpler I/O Requirements: I 2 C and SPI can interface with two I/O pins Ease of multiple devices on bus: I 2 C Bus noise immunity: I 2 C Date: January The Low Power Analog Solution Here is a comparison between the I2C and SPI interfaces. With respect to bus speed, SPI is much faster. This is because the common I2C bus rates are 100kHz and 400kHz, while SPI has much faster bus rates. The I2C protocol recently added a specification for ahigh Speed Mode with a 3.4MHz bus rate. But at this time I am not aware of any digital potentiometer devices that support this High Speed mode. With respect to Host Controller firmware overhead, the I2C protocol is a much more involved protocol. This is due to features such as Multi-Master support, Bus Arbitration, clock streching, the acknowledgement bit, and others. Supprting these features requires much more Host Controller Firmware (and processing) then the SPI protocol. With respect to I/O requirements, both SPI and I2C can be done with two I/O pins, but the SPI interface would not be at full functionality since the Host Controller could not read the device, since the SO pin was not connected and the device would alway be selected, since the CS signal would need to be tied active. The I2C protocol only requires two signals. These are the SDA and SCL pins. The address pins, A0, A1, and A2, can be tied to the desired state. With respect to Bus Noise Immunity, I2C was designed to address automotive applications which are noisy environments. The use of the open drain bus, data only h i h h SCL i i l d h h i i k i f 7

8 Special Features Microchip has a special feature for our devices with Non-Volatile wiper settings WiperLock Technology WiperLock Technology requires a high voltage (>8.5V) on the CS pin to lock and unlock the Wiper setting When locked normal commands can not modify the wiper setting. Only High Voltage commands (CS > 8.5V) can modify the wiper setting When unlocked all commands can modify the non-volatile wiper setting Date: January The Low Power Analog Solution Microchip Technologies WiperLock Technology allows the non-volatile wiper setting to be locked. That is inhibited from being modified by normal commands. Normal commands are commands whose interface signals range from VIL to VIH. High Voltage commands can be used to modify the wiper setting value or lock and unlock the wiper protection. A High Voltage command requires the CS pin goes to VIHH, instead of VIL for the command cycle. VIHH has a minimum voltage of 8.5V. WiperLock is useful in many applications including: Manufacturing calibration: where the application system should not modify the calibrated wiper setting during operation (digital replacement of the mechanical Pot). 8

9 Special Features Benefits of WiperLock Technology: Flexibility to modify the wiper setting, when required (manufacturing calibration, system calibration, system updates, ) Protect the wiper setting from being changed during normal operation Date: January The Low Power Analog Solution WiperLock Technology offers several benefits to the application circuit. Some of the benefits include: The default wiper setting is protected from being corrupted by the Host Controller. So when the digital potentiometer has either a Power-On Reset or Brown-Out Reset condition, the default wiper setting of the device will be loaded. Normally, once this value is set, the system "forgets" about this value. But this flexibility to reprogram the default wiper settings allows the system to be recalibrated as needed. This recalibration could be done to address the shift in charactisics of other system components during servicing of the system. Recalibration could also be done to address an update of the application firmware, which may require a change to the default digipot wiper value. 9

10 Thank You for your time Date: January The Low Power Analog Solution 10

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