EXPRESSCARD COMPLIANCE CHECKLISTS. Release 1.2 Revision 1

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1 EXPRESSCARD COMPLIANCE CHECKLISTS Release 1.2 Revision 1

2 RELEASE 1.2 EXPRESSCARD COMPLIANCE CHECKLISTS REVISION HISTORY Date Specification Version Revisions September 17, Release Initial Release December 19, Release Proposal 005: Module Thermal Requirements Proposal 015: Removing Host System PE4 Proposal 016: Support for PCI Bridges on Modules Proposal 021: CLKREQ# Dynamic Protocol Proposal 022: Enabling Additional Use of SMBus Pins March 30, Release Proposal 033: Implementing Proper USB Data Line Termination in Bus Suspend Mode Proposal 034: Active State Power Management Disable Default June 22, Release, Revision 1 Added power management state verification method to ExpressCard Module Compliance Checklist item PE5 Note: In Release 1.2 of the ExpressCard Compliance Checklists, content deleted from Release 1.1 is shown as, while content added as of Release 1.2 is shown in underline USB Implementers Forum All rights reserved ii

5 RELEASE 1.2 EXPRESSCARD COMPLIANCE CHECKLISTS INTRODUCTION Purpose This document covers the USB-IF ExpressCard compliance checklists to be used by component, module and system developers to establish their compliance to the ExpressCard Standard, Release 1.0. The primary methodology of the compliance program is to qualify an ExpressCard-based product for the USB-IF Integrators List based on the successful completion and registration of an approved compliance checklist and the successful participation in a compatibility/interoperability testing. Scope This document is organized into four appendices: Module Design Compliance Checklist System Design Compliance Checklist Power Switch Compliance Checklist Connector Compliance Checklist The Module Design Compliance Checklist covers the ExpressCard module functional, electrical and physical checklist requirements that are necessary to be registered as an ExpressCard-compliant module product. The System Design Compliance Checklist covers the ExpressCard system functional, electrical and physical checklist requirements that are necessary to be registered as an ExpressCard-compliant system product. The Power Switch Compliance Checklist covers the ExpressCard host electrical and functional checklist requirements that are necessary to be registered as an ExpressCard-compliant power switch component. The Connector Compliance Checklist covers the ExpressCard host and module connector physical, electrical and environmental checklist requirements that are necessary to be registered as an ExpressCard-compliant connector product. Related Documents The following reference documents provide normative requirements as specified in this document. ExpressCard Standard, Release 1.2 Personal Computer Memory Card International Association (PCMCIA)/Japan Electronics and Information Technology Industries Association (JEITA) PCI Express Base Specification 1.1 PCI Special Interest Group (PCI-SIG) USB Specification, Release 2.0 Universal Serial Bus Implementers Forum (USB-IF) System Management Bus (SMBus) Specification, Version Smart Battery System Implementer's Forum (SBS-IF) PCI Express Card Electromechanical Specification 1.1 PCI Special Interest Group (PCI-SIG) EIA : Environmental Test Methodology for Assessing the Performance of Electrical Connectors and Sockets Used in Business Office Applications Advanced Configuration and Power Interface (ACPI) Specification, Revision 3.0b Compaq Computer Corporation, Intel Corporation, Microsoft Corporation, Phoenix Technologies Ltd., Toshiba Corporation 2007 USB Implementers Forum All rights reserved 1

7 RELEASE 1.2 EXPRESSCARD COMPLIANCE CHECKLISTS A. E X P R E S SCARD MODULE COMPLIANCE CHECKLIST This appendix covers the ExpressCard compliance program checklist requirements specific to modules. The checklist is to be filled in by the product manufacturer and submitted as a signed affidavit for the verification of product compliance to these specified requirements. It is acceptable to have the checklists completed by a third-party service provider on their behalf although the affidavit must be signed by, and the accuracy of the information is the responsibility of, the original manufacturer. It is the intent of this program that the checklist items be verified by detailed inspection or testing of actual production-representative product. ExpressCard Module Product Information Date TID (if known) Vendor Name Vendor Street Address Vendor City, State, Zip Vendor Phone Number Vendor Contact, Title Vendor address Product Name Product Model Number Product Revision Level ExpressCard Standard Revision Level Applicable Interfaces and Revision Levels Product Description (brief description of product function) PCI Express: USB: (circle all applicable) (fill in revision level) Note that ExpressCard modules must contain compliant components in order to have a passing checklist. Use item PE1/UB1 (on following page) to indicate which component is used USB Implementers Forum All rights reserved 3

8 EXPRESSCARD MODULE COMPLIANCE CHECKLIST RELEASE 1.2 For each of the following checklist items, appropriate ExpressCard Standard, Release 1.0 references are provided in the reference column. PCI Express Interface Requirements Module does not implement the PCI Express interface, this section is NA PE1. All PCI Express signals are driven by a compliant component? yes no Compliant PCI Express Component Identification: PE2. PE3. PE4. PE5. AC coupling capacitors: Verified that the module has the required coupling capacitors on its transmitter differential pair (PERp0 and PERn0)? Transmitter eye diagram compliance: Verified that the module meets the required transmit eye diagram per the Standard? Minimum receiver path sensitivity: Verified that the module meets the required receiver sensitivity per the Standard? Support for PCI Express active-state link power management (L0s and L1) is implemented? In order to answer yes, the PCI Express Link Capabilities Register (Offset 0Ch) in bit locations 11:10 must decode as 11b. yes no yes no , Table 4-3 yes no , Table 4-4 yes no USB Interface Requirements Module does not implement the USB interface, this section is NA UB1. All USB signals are driven by a compliant component? yes no Compliant USB 2.0 Component Identification: UB2. When enabled for wake-up from bus suspend, proper USB data bus operation (including bus connection state) is maintained on the USBD+ and USBD- signal lines whenever necessary power to the slot is available? yes no NA UB3. If this module does not support wake-up functionality, this checklist item is NA. USBD+ and USBD- signal lines are never active whenver the host system is not supplying power (i.e. +3.3V and +3.3VAUX are not present.) yes no Hot-Plug Requirements HP1. HP2 Verified that the appropriate card presence pin (CPPE# and/or CPUSB#) is tied to ground? Verified that modules that implement both PCI Express and USB interfaces implement the eject dependency serial number requirement? yes no yes no n/a All rights reserved 2007 USB Implementers Forum

9 RELEASE 1.2 EXPRESSCARD COMPLIANCE CHECKLISTS HP3. If dynamic clock protocol is implemented, verified that CLKREQ# dynamic protocol is enabled by default? yes no Power Requirements PW1. PW2. PW3. PW4. PW5. PW6. Verified that power supply current limits are met for Average and Max conditions? Verified that isolation between +3.3V and +3.3VAUX power planes on the module is maintained throughout all operational states? Verified that the maximum input capacitance for each power rail is no greater than 80 µf effective capacitance? Verified that modules that do not support the wakeup feature during D3 power saving modes do not connect +3.3VAUX as a power source to the module? Verified that the module s average combined current draw across the 3.3V and 3.3Vaux power rails does not exceed the limit of 1.0 A? Verified that the module s maximum combined current draw across all power rails does not exceed the limit of 1.75 A? yes no yes no yes no yes no yes no Table 3-7 yes no Table 3-7 SMBus Module does not implement the SMBus interface SM1. Verified that the module does not exceed the electrical characteristics of an un-powered SMBus node as required within the SMBus specification yes no SMBus 2.0 Module does implement the SMBus interface SM2. SM3. SM4. Verified that the module meets the timing requirements specified in the SMBus Specification version 2.0? Verified that the module meets the electrical requirements specified in the SMBus Specification version 2.0? Verified that the module supports a dynamically assigned slave address and related requirements of the Address Resolution Protocol as specified in the SMBus Specification version 2.0? yes no SMBus 2.0 section yes no SMBus 2.0 section yes no SMBus 2.0 section 5.6 Module Connector Requirements Note: Modules that are manufactured with a commercially available connector that is registered as an ExpressCard compliance component do not have to complete a separate connector compliance checklist. Otherwise, the module must also pass the separate connector compliance checklist for the connector used USB Implementers Forum All rights reserved 5

10 EXPRESSCARD MODULE COMPLIANCE CHECKLIST RELEASE 1.2 CN1. Is the module connector used a compliant component? yes no 5.1, 5.3, 5.4, 5.5, 5.6 Compliant Module Connector Component Identification: CN2 If the answer to CN1 is no, then included with this submission is a completed connector compliance checklist (Appendix D)? yes no Module Frame/Cover Requirements FC1. FC2. FC3. FC4. Verified that the module dimensions meet the relevant module type requirements? Verified that the module EMI contacts (if implemented) meets dimensional and location requirements? Verified that the module EMI contacts (if implemented) meet the electrical contact resistance requirements? Marking: Verified that required module direction for insertion is properly marked and visible on the top surface of the module? yes no 4.1 yes no 4.1 yes no yes no 4.6 Module Thermal Requirements MT1. Verified that the TDP for ExpressCard modules should be less than 2.1 W per slot under reasonable but high performance usage conditions. yes no Which method was used to verify compliance? Measure Touch Temperature Perform a calculation Module Environmental Requirements ME1. ME2. ME3. Operating Temperature: Verified that the module will successfully operate over the temperature range from 0ºC to +55ºC with a 95% maximum relative humidity (noncondensing)? Storage Temperature: Verified that the module can safely be stored over the temperature range from -20ºC to +65ºC with a 95% maximum relative humidity (non-condensing)? Thermal Shock: Verified that the module functions normally as required following the thermal shock testing requirements? yes no , , and yes no , , and yes no All rights reserved 2007 USB Implementers Forum

11 RELEASE 1.2 EXPRESSCARD COMPLIANCE CHECKLISTS ME4. ME5. ME6. ME7. Moisture Resistance: Verified that the module functions normally as required following the moisture resistance testing requirements? Vibration and High Frequency: Verified that the module functions normally as required following the vibration and high frequency testing requirements? Shock: Verified that the module functions normally as required following the shock testing requirements? Drop Test: Verified that the module functions normally as required following the drop testing requirements? yes no yes no yes no yes no USB Implementers Forum All rights reserved 7

12 EXPRESSCARD MODULE COMPLIANCE CHECKLIST RELEASE 1.2 Explanations This section should be used to explain any no answers or clarify answers on checklist items above. Please key entries to the appropriate checklist question. Affidavit This section needs to be completed by an authorized representative of the vendor applying for product compliance certification. This signature affirms that the product being submitted for compliance registration meets the stated requirements of this checklist and that it is understood that given any changes are made to the product that may potentially impact the product s ability to continue to meet these requirements that the modified product should be re-verified to these requirements and resubmitted for a new registration. Name: Signature: Job Title: Date: 8 All rights reserved 2007 USB Implementers Forum

13 RELEASE 1.2 EXPRESSCARD COMPLIANCE CHECKLISTS B. E X P R E S SCARD SYSTEM COMPLIANCE CHECKLIST This appendix covers the ExpressCard compliance program checklist requirements specific to systems implementing ExpressCard slots. The checklist is to be filled in by the product manufacturer and submitted as a signed affidavit for the verification of product compliance to these specified requirements. It is acceptable to have the checklists completed by a third-party service provider on their behalf although the affidavit must be signed by, and the accuracy of the information is the responsibility of, the original manufacturer. It is the intent of this program that the checklist items be verified by detailed inspection or testing of actual production-representative product. ExpressCard System Product Information Date TID (if known) Vendor Name Vendor Street Address Vendor City, State, Zip Vendor Phone Number Vendor Contact, Title Vendor address Product Name Product Model Number Product Revision Level ExpressCard Standard Revision Level Product Description (brief description of product function) 2007 USB Implementers Forum All rights reserved 9

14 EXPRESSCARD SYSTEM COMPLIANCE CHECKLIST RELEASE 1.2 For each of the following checklist items, appropriate ExpressCard Standard, Release 1.0 references are provided in the reference column. PCI Express Interface Requirements PE1. All PCI Express signals are driven by a compliant component? yes no Compliant PCI Express Component Identification: PE2. PE3. PE4. PE5. PE6. AC coupling capacitors: Verified that the system has the required coupling capacitors on its transmitter differential pair (PETp0 and PETn0)? Transmitter eye diagram compliance: Verified that the slot meets the required transmit eye diagram per the Standard? Verified that the PCI Express Slot Capabilities Register is supported? Support in the slot for PCI Express active-state link power management (L0s and L1) is implemented? When a PCI Express module is present in the slot, entry into each active-state link power management state (L0s and L1) are enabled by host system software for both the slot and the module given no unacceptable exit latencies exist for that particular state? yes no yes no , Table 4-5 yes no 6.2 yes no 6.5 yes no 6.5 USB Interface Requirements UB1. All USB signals are driven by a compliant component? yes no Compliant USB 2.0 Component Identification: UB2. UB3. Verified that the USB signals meet the USB 2.0 electrical testing requirements per USB-IF defined testing specification? Verified that the host-side USB data lines (USBD+ and USBD-) can safely tolerate being actively driven (including bus connect termination) by a USB-based module whenever +3.3VAUX and/or +3.3V is supplying power at the module interface? yes no yes no 6.1 Hot-Plug Requirements HP1. HP2. Verified that the host system provides pull-up resistors to the 3.3Vaux power source on the module presence pins? Verified that ejection dependency ACPI table entries are present and accurate? yes no Table 3-2 yes no 6.3 HP3 Verified that REFCLK to PERST# start-up timing is met? yes no , Table All rights reserved 2007 USB Implementers Forum

15 RELEASE 1.2 EXPRESSCARD COMPLIANCE CHECKLISTS HP4 HP5 HP6 HP7 For each ExpressCard slot in the platform, verified that the specified minimum resource allocations are assigned when no module is present at boot time? For each ExpressCard slot in the platform, verified that adequate resource allocations are assigned when modules with resource requirements greater than the minimum leels specified are present at boot time? For each ExpressCard slot in the platform, verified that at least the specified minimum resource allocations are assigned when modules with resource requirements less than the minimum levels specified are present at boot time? For each ExpressCard slot in the platform, verified that complex hierarchies (two or more parallel bridges) are enumerated properly on a module present at boot time? yes no yes no yes no yes no 6.3.2, Table 6-2 Power Requirements PW1. PW2. PW3. Verified that the host system meets the voltage tolerance requirements on all three power rails under maximum allowed module loads? Verified that the host system provides the required current on each power rail for the Average and Max conditions? Given that a power switch component is used, is the power switch used a compliant component? Compliant Power Switch Component Identification: yes no Table 3-6, yes no yes no n/a 6.1 If the answer to PW3 is no or n/a, then the following additional checklist items must be completed at the host system level? Note: References to Power Switch Checklist items (PSx) are provided as the test procedures in the power switch checklist may be informative. PW4 PW5 PW6 PW7 Verified that PERST# startup timing is being met? [Power Switch Checklist reference: PS3] Verified that PERST# is asserted per defined timing whenever any of the voltage rails are removed (or fall out of tolerance)? [Power Switch Checklist reference: PS7, PS8, PS9] Verified that no voltages are applied and PERST# is asserted to the module slot when a module is not present? [Power Switch Checklist reference: PS1] Verified that when no module is present in the slot, system reset transitions do not cause supply voltage transitions in the slot? [Power Switch Checklist reference: PS2] yes no Figure 3-2 yes no 3.3.3, Figure 3-4 yes no 3.3.3, 6.1 yes no 6.1, Table USB Implementers Forum All rights reserved 11

16 EXPRESSCARD SYSTEM COMPLIANCE CHECKLIST RELEASE 1.2 PW8 PW9 PW10 PW11 PW12 PW13 Verified the design such that voltages supplied to the slot are in proper state on loss of 3.3V host source when entering a system sleep state? [Power Switch Checklist reference: PS4] Verified the design such that voltages supplied to the slot are in proper state on loss of 1.5V host source when entering a system sleep state? [Power Switch Checklist reference: PS5] Verified the design such that voltages supplied to the slot are in proper state on loss of 3.3Vaux host source when entering a power down state? [Power Switch Checklist reference: PS6] Verified the design such that operation of PERST# meet requirements of a long system reset sequence? [Power Switch Checklist reference: PS10] Verified operation with PCI Express-based module insertion during power saving mode? [Power Switch Checklist reference: PS11] Verified operation with USB-based module insertion during power saving mode? [Power Switch Checklist reference: PS12] yes no , 6.1, Table 6-1 yes no , 6.1, Table 6-1 yes no , 6.1, Table 6-1 yes no 3.3.3, 6.1, Table 6-1 yes no 6.1, Table 6-1 yes no 6.1, Table 6-1 SMBus System doesn t implement the SMBus interface, this section is NA SM1. SM2. SM3. SM4. Verified that the host system provides individual ~5K ohm pullup resistors, tied to 3.3Vaux, on the SMBCLK and SMBDAT signals? Verified that the host system meets the timing requirements specified in the SMBus Specification version 2.0? Verified that the host system meets the electrical requirements specified in the SMBus Specification version 2.0? Verified that the host system meets the requirements of the Address Resolution Protocol as specified in the SMBus Specification version 2.0? yes no yes no SMBus 2.0 section yes no SMBus 2.0 section yes no SMBus 2.0 section Host Connector Requirements Note: Systems that are manufactured with a commercially available connector that is registered as an ExpressCard compliance component do not have to complete a separate connector compliance checklist. Otherwise, the system must also pass the separate connector compliance checklist for the connector used. CN1. Is the slot connector used a compliant component? yes no 5.2, 5.3, 5.4, 5.5, All rights reserved 2007 USB Implementers Forum

17 RELEASE 1.2 EXPRESSCARD COMPLIANCE CHECKLISTS Compliant Slot Connector Component Identification: CN2. If the answer to CN1 is no, then included with this submission is a completed connector compliance checklist (Appendix D)? yes no Module Slot Requirements FC1. FC2. Verified that the slot meets the dimensional requirements to assure proper guidance and retention of compliant modules? Verified that the maximum ambient temperature surrounding the slot with an un-powered module inserted in the slot does not exceed 65 C under reasonable but high performance usage conditions? Was the BAPCo SYSmark performance metric used? If yes, which version? If no, describe what performance metric was used. yes no yes no yes no version 4.1 as applicable 2007 USB Implementers Forum All rights reserved 13

18 EXPRESSCARD SYSTEM COMPLIANCE CHECKLIST RELEASE 1.2 Explanations This section should be used to explain any no answers or clarify answers on checklist items above. Please key entries to the appropriate checklist question. Affidavit This section needs to be completed by an authorized representative of the vendor applying for product compliance certification. This signature affirms that the product being submitted for compliance registration meets the stated requirements of this checklist and that it is understood that given any changes are made to the product that may potentially impact the product s ability to continue to meet these requirements that the modified product should be re-verified to these requirements and resubmitted for a new registration. Name: Signature: Job Title: Date: 14 All rights reserved 2007 USB Implementers Forum

19 RELEASE 1.2 EXPRESSCARD COMPLIANCE CHECKLISTS C. E X P R E S SCARD POWER SWITCH CHECKLIST This appendix covers the ExpressCard compliance program checklist requirements specific to host power switch components as an ingredient in designing and manufacturing ExpressCard-compliant host systems. The checklist is to be filled in by the product manufacturer and submitted as a signed affidavit for the verification of product compliance to these specified requirements. It is acceptable to have the checklists completed by a third-party service provider on their behalf although the affidavit must be signed by, and the accuracy of the information is the responsibility of, the original manufacturer. It is the intent of this program that the checklist items be verified by detailed inspection or testing of actual production-representative product. ExpressCard Power Switch Product Information Date TID (if known) Vendor Name Vendor Street Address Vendor City, State, Zip Vendor Phone Number Vendor Contact, Title Vendor address Product Name Product Model Number Product Revision Level ExpressCard Standard Revision Level Product Description (brief description of product function) 2007 USB Implementers Forum All rights reserved 15

20 EXPRESSCARD POWER SWITCH CHECKLIST RELEASE 1.2 For each of the following checklist items, appropriate ExpressCard Standard, Release 1.0 references are provided in the reference column. Performance Requirements Test conditions and procedures are provided for each of the following requirements (See the Test Conditions and Procedures section following the checklist). PS1. Verified that no voltages are applied and PERST# is asserted to the module slot when a module is not present? yes no 3.3.3, 6.1, Table 6-1 PS2 Verified that when no module is present in the slot, system yes no 6.1, Table 6-1 reset transitions do not cause supply voltage transitions in the slot? PS3 Verified that PERST# start-up timing is met? yes no , 3.3.3, PS4 PS5 PS6 PS7 PS8 PS9 Verified voltages supplied to the slot are in proper state on loss of 3.3V host source when entering a system sleep state? Verified voltages supplied to the slot are in proper state on loss of 1.5V host source when entering a system sleep state? Verified voltages supplied to the slot are in proper state on loss of 3.3Vaux host source when entering a power down state? Verified voltages supplied to the slot are in proper state on 3.3V host source falling out of tolerance? Verified voltages supplied to the slot are in proper state on 1.5V host source falling out of tolerance? Verified voltages supplied to the slot are in proper state on 3.3Vaux host source falling out of tolerance? yes no , 6.1, Table 6-1 yes no , 6.1, Table 6-1 yes no , 6.1, Table 6-1 yes no , 6.1, Table 6-1 yes no , 6.1, Table 6-1 yes no , 6.1, Table 6-1 PS10 Verified operation during a long system reset sequence? yes no 3.3.3, 6.1, Table 6-1 PS11 Verified operation with PCI Express-based module insertion yes no 6.1, Table 6-1 during power saving mode? PS12 Verified operation with USB-based module insertion during power saving mode? yes no 6.1, Table 6-1 Test Conditions and Procedures This section provides test setup and procedure information necessary to verify power switch performance checklist items. It should be noted that some of the checklist items are intended to confirm proper power switch behavior to certain conditions that may or may not actually occur in a compliant system implementation. Figure C-1 provides the signal reference for purposes of the following conditions and procedures. This figure is not intended to represent any particular power switch device, it is provided only as a generic illustration to aid in understanding the conditions and procedure descriptions. The SysReset# signal input represents the PCI Express system power reset/fundamental reset. It should be noted that the SysReset# signal is an implementation specific function and that its polarity might vary from the negative logic representation given here and should be adjusted accordingly in the procedure to match the design of the product being tested. 16 All rights reserved 2007 USB Implementers Forum

21 RELEASE 1.2 EXPRESSCARD COMPLIANCE CHECKLISTS CPPE# 1 I I 7 3.3V CPUSB# 3.3V 3.3Vaux I O O Unit Under Test I I I Vaux 1.5V SysReset# 1.5V 5 O PERST# 6 O Figure C-1: Signal reference ID: PS1. PS2 Procedure: Test that no voltages are applied to the slot and PERST# is asserted when module is not present. Procedure a. Starting conditions: 3.3V (7), 3.3Vaux (8) and 1.5V (9) are on. CPPE#, CPUSB# and SysReset# (10) are de-asserted. b. Verify outputs 3.3V (3), 3.3Vaux (4), 1.5V (5) and PERST# (6) remain low When a module is not present, test that transitions of system reset do not cause supply voltage transitions at the slot. Procedure a. Starting conditions: 3.3V (7), 3.3Vaux (8) and 1.5V (9) are on. CPPE# (1), CPUSB# (2) and SysReset# (10) are de-asserted. Outputs 3.3V (3), 3.3Vaux (4), and 1.5V (5) should be off and PERST# (6) asserted. b. Assert SysReset# (10) c. Verify outputs 3.3V (3), 3.3Vaux (4), and 1.5V (5) remain off and PERST# (6) remains asserted d. De-assert SysReset# (10) e. Verify outputs 3.3V (3), 3.3Vaux (4), and 1.5V (5) remain off and PERST# (6) remains asserted 2007 USB Implementers Forum All rights reserved 17

22 EXPRESSCARD POWER SWITCH CHECKLIST RELEASE 1.2 ID: Procedure: PS3 When a module insertion is detected, test that inputs are within specified limits within specified time of module being inserted. Test that slot is reset properly upon module being inserted Procedure a. Starting conditions: 3.3V (7), 3.3Vaux (8) and 1.5V (9) are on. CPPE# (1), CPUSB# (2) and SysReset# (10) are de-asserted. Outputs 3.3V (3), 3.3Vaux (4), and 1.5V (5) should be off and PERST# (6) asserted. b. Assert CPPE# (1) c. Verify outputs 3.3V (3), 3.3Vaux (4), and 1.5V (5) turn on d. Verify PERST# (6) remains asserted for no less than 1 ms following all of the voltage outputs reaching tolerance and before transitioning to deasserted 18 All rights reserved 2007 USB Implementers Forum

23 RELEASE 1.2 EXPRESSCARD COMPLIANCE CHECKLISTS ID: Procedure: PS4 Test losing the 3.3V (7) supply voltage for when the host platform is entering a power saving state. The intent of this test is to verify that both 3.3V and 1.5V outputs are turned off as the result of the 3.3V voltage source turning off in advance and independently of when the 1.5V voltage source is removed. Procedure a. Starting conditions: 3.3V (7), 3.3Vaux (8) and 1.5V (9) are on. CPPE# (1) is asserted. CPUSB# (2) and SysReset# (10) are de-asserted. Outputs 3.3V (3), 3.3Vaux (4), and 1.5V (5) should be on and PERST# (6) de-asserted. b. Assert SysReset# (10) c. Verify PERST# (6 if applicable) is asserted d. Remove 3.3V (7) e. Verify outputs 3.3V (3) and 1.5V (5) are off and 3.3Vaux (4) remains on Repeat procedure substituting CPUSB# (2) for CPPE# (1) and ignoring PERST# operation USB Implementers Forum All rights reserved 19

24 EXPRESSCARD POWER SWITCH CHECKLIST RELEASE 1.2 ID: Procedure: The following diagram represents the procedure for CPPE# assertion. The following diagram represents the procedure for CPUSB# assertion. Note that the PERST# signal may remain asserted at all times for USB-based modules. 20 All rights reserved 2007 USB Implementers Forum

25 RELEASE 1.2 EXPRESSCARD COMPLIANCE CHECKLISTS ID: PS5 Procedure: Test losing the 1.5V (9) supply voltage for when the host platform is entering a power saving state. The intent of this test is to verify that both 3.3V and 1.5V outputs are turned off as the result of the 1.5V voltage source turning off in advance and independently of when the 3.3V voltage source is removed. Procedure a. Starting conditions: 3.3V (7), 3.3Vaux (8) and 1.5V (9) are on. CPPE# (1) is asserted. CPUSB# (2) and SysReset# (10) are de-asserted. Outputs 3.3V (3), 3.3Vaux (4), and 1.5V (5) should be on and PERST# (6) de-asserted. b. Assert SysReset# (10) c. Verify PERST# (6 if applicable) is asserted d. Remove 1.5V (9) e. Verify 3.3V (3) and 1.5V (5) are off and 3.3Vaux (4) remains on Repeat procedure substituting CPUSB# (2) for CPPE# (1) and ignoring PERST# operation. The following diagram represents the procedure for CPPE# assertion USB Implementers Forum All rights reserved 21

26 EXPRESSCARD POWER SWITCH CHECKLIST RELEASE 1.2 ID: Procedure: The following diagram represents the procedure for CPUSB# assertion. Note that the PERST# signal may remain asserted at all times for USB-based modules. PS6 Test losing the 3.3Vaux (8) supply voltage for when the host system entering a power down state. The intent of this test is to verify that all voltage outputs are turned off as the result of the 3.3Vaux voltage source turning off in advance and independently of when either the 3.3V or 1.5V voltage sources are removed. Procedure a. Starting conditions: 3.3V (7), 3.3Vaux (8) and 1.5V (9) are on. CPPE# (1) is asserted. CPUSB# (2) and SysReset# (10) are de-asserted. Outputs 3.3V (3), 3.3Vaux (4), and 1.5V (5) should be on and PERST# (6) de-asserted. b. Assert SysReset# (10) c. Verify PERST# (6 if applicable) is asserted d. Remove 3.3Vaux (8) e. Verify 3.3Vaux (4), 3.3V (3) and 1.5V (5) are off Repeat procedure substituting CPUSB# (2) for CPPE# (1) and ignoring PERST# operation. 22 All rights reserved 2007 USB Implementers Forum

27 RELEASE 1.2 EXPRESSCARD COMPLIANCE CHECKLISTS ID: Procedure: The following diagram represents the procedure for CPPE# assertion. The following diagram represents the procedure for CPUSB# assertion. Note that the PERST# signal may remain asserted at all times for USB-based modules USB Implementers Forum All rights reserved 23

28 EXPRESSCARD POWER SWITCH CHECKLIST RELEASE 1.2 ID: PS7 Procedure: Test losing the 3.3V (7) supply voltage due to falling out of tolerance. Procedure a. Starting conditions: 3.3V (7), 3.3Vaux (8) and 1.5V (9) are on. CPPE# (1) is asserted. CPUSB# (2) and SysReset# (10) are de-asserted. Outputs 3.3V (3), 3.3Vaux (4), and 1.5V (5) should be on and PERST# (6) de-asserted. b. Remove 3.3V (7) c. Verify PERST# (6 if applicable) is asserted within 500ns of the first of either 3.3V (3) or 1.5V (5) falling below specified tolerance d. Verify outputs 3.3V (3) and 1.5V (5) are off and 3.3Vaux (4) remains on Repeat procedure substituting CPUSB# (2) for CPPE# (1) and ignoring PERST# operation. The following diagram represents the procedure for CPPE# assertion. 24 All rights reserved 2007 USB Implementers Forum

29 RELEASE 1.2 EXPRESSCARD COMPLIANCE CHECKLISTS ID: Procedure: The following diagram represents the procedure for CPUSB# assertion. Note that the PERST# signal may remain asserted at all times for USB-based modules. PS8 Test losing the 1.5V (9) supply voltage due to falling out of tolerance. Procedure a. Starting conditions: 3.3V (7), 3.3Vaux (8) and 1.5V (9) are on. CPPE# (1) is asserted. CPUSB# (2) and SysReset# (10) are de-asserted. Outputs 3.3V (3), 3.3Vaux (4), and 1.5V (5) should be on and PERST# (6) de-asserted. b. Remove 1.5V (9) c. Verify PERST# (6 if applicable) is asserted within 500ns of the first of either 3.3V (3) or 1.5V (5) falling below specified tolerance. d. Verify 3.3V (3) and 1.5V (5) are off and 3.3Vaux (4) remains on Repeat procedure substituting CPUSB# (2) for CPPE# (1) and ignoring PERST# operation 2007 USB Implementers Forum All rights reserved 25

30 EXPRESSCARD POWER SWITCH CHECKLIST RELEASE 1.2 ID: Procedure: The following diagram represents the procedure for CPPE# assertion. The following diagram represents the procedure for CPUSB# assertion. Note that the PERST# signal may remain asserted at all times for USB-based modules. 26 All rights reserved 2007 USB Implementers Forum

31 RELEASE 1.2 EXPRESSCARD COMPLIANCE CHECKLISTS ID: PS9 Procedure: Test losing the 3.3Vaux (8) supply voltage due to falling out of tolerance. Procedure a. Starting conditions: 3.3V (7), 3.3Vaux (8) and 1.5V (9) are on. CPPE# (1) is asserted. CPUSB# (2) and SysReset# (10) are de-asserted. Outputs 3.3V (3), 3.3Vaux (4), and 1.5V (5) should be on and PERST# (6) de-asserted. b. Remove 3.3Vaux (8) c. Verify PERST# (6 if applicable) is asserted within 500ns of the first of either 3.3V (3), 3.3Vaux (4) or 1.5V (5) outputs falling below specified tolerance. d. Verify 3.3Vaux (4), 3.3V (3) and 1.5V (5) are off Repeat procedure substituting CPUSB# (2) for CPPE# (1) and ignoring PERST# operation The following diagram represents the procedure for CPPE# assertion USB Implementers Forum All rights reserved 27

32 EXPRESSCARD POWER SWITCH CHECKLIST RELEASE 1.2 ID: Procedure: The following diagram represents the procedure for CPUSB# assertion. Note that the PERST# signal may remain asserted at all times for USB-based modules. PS10 Test that PERST# responds correctly to a long SysReset# sequence. This verifies the requirement that the PERST# is extended for the length of the system reset input to the power switch if this longer than the power outputs to the slots being stable. Procedure a. Starting conditions: 3.3V (7), 3.3Vaux (8) and 1.5V (9) are on. CPPE# (1), CPUSB# (2) are de-asserted. SysReset# (10) is asserted. Outputs 3.3V (3), 3.3Vaux (4), and 1.5V (5) should be off and PERST# (6) asserted. b. Assert CPPE# (1) c. Verify 3.3V (3), 3.3Vaux (4) and 1.5V (5) are turned on and PERST# (6) remains asserted d. Maintain SysReset# (10) asserted for a minimum of 100 ms following previous step before de-asserting e. Verify PERST# (6) is de-asserted as the result of SysReset (10) transitioning to the de-asserted state. 28 All rights reserved 2007 USB Implementers Forum

33 RELEASE 1.2 EXPRESSCARD COMPLIANCE CHECKLISTS ID: Procedure: PS11 Test that Power Switch performs correctly for the insertion of a PCI Express-based module when the system is in a power saving state. Procedure a. Starting conditions: 3.3V (7) and 1.5V (9) are off. 3.3Vaux (8) is on. CPPE# (1), CPUSB# (2) are de-asserted. SysReset# (10) is asserted. Outputs 3.3V (3), 3.3Vaux (4), and 1.5V (5) should be off and PERST# (6) asserted. b. Assert CPPE# (1) c. Verify 3.3V (3), 3.3Vaux (4) and 1.5V (5) outputs remain off and PERST# (6) remains asserted 2007 USB Implementers Forum All rights reserved 29

34 EXPRESSCARD POWER SWITCH CHECKLIST RELEASE 1.2 ID: Procedure: PS12 Test that Power Switch performs correctly for the insertion of a USB-based module when the system is in a power saving state. Procedure a. Starting conditions: 3.3V (7) and 1.5V (9) are off. 3.3Vaux (8) is on. CPPE# (1), CPUSB# (2) are de-asserted. SysReset# (10) is asserted. Outputs 3.3V (3), 3.3Vaux (4), and 1.5V (5) should be off and PERST# (6) asserted. b. Assert CPUSB# (2) c. Verify 3.3V (3), 3.3Vaux (4) and 1.5V (5) outputs remain off 30 All rights reserved 2007 USB Implementers Forum

36 EXPRESSCARD POWER SWITCH CHECKLIST RELEASE 1.2 Explanations This section should be used to explain any no answers or clarify answers on checklist items above. Please key entries to the appropriate checklist question. Affidavit This section needs to be completed by an authorized representative of the vendor applying for product compliance certification. This signature affirms that the product being submitted for compliance registration meets the stated requirements of this checklist and that it is understood that given any changes are made to the product that may potentially impact the product s ability to continue to meet these requirements that the modified product should be re-verified to these requirements and resubmitted for a new registration. Name: Signature: Job Title: Date: 32 All rights reserved 2007 USB Implementers Forum

37 RELEASE 1.2 EXPRESSCARD COMPLIANCE CHECKLISTS D. EXPRESSCARD CONNECTOR CHECKLIST This appendix covers the ExpressCard compliance program checklist requirements specific to host and module connectors as an ingredient in designing and manufacturing ExpressCard-compliant host systems and modules. The checklist is to be filled in by the product manufacturer and submitted as a signed affidavit for the verification of product compliance to these specified requirements. It is acceptable to have the checklists completed by a third-party service provider on their behalf although the affidavit must be signed by, and the accuracy of the information is the responsibility of, the original manufacturer. It is the intent of this program that the checklist items be verified by detailed inspection or testing of actual production-representative product. ExpressCard Connector Product Information Date TID (if known) Vendor Name Vendor Street Address Vendor City, State, Zip Vendor Phone Number Vendor Contact, Title Vendor address Product Name Product Model Number Product Revision Level ExpressCard Standard Revision Level Application Host connector Module connector (circle all applicable) Product Description (brief description of product function) 2007 USB Implementers Forum All rights reserved 33

38 EXPRESSCARD CONNECTOR CHECKLIST RELEASE 1.2 For each of the following checklist items, appropriate ExpressCard Standard, Release 1.0 references are provided in the reference column. Mechanical Requirements CM1. Verified that the connector meet dimensional and feature requirements? Performance Requirements yes no 5.1 or 5.2 as applicable CP1. CP2. CP3. CP4. CP5. CP6. CP7. CP8. CP9. CP10. CP11. CP12. Insertion loss: Verified that the connector meets insertion loss requirements? Return loss: Verified that the connector meets return loss requirements? Crosstalk (NEXT): Verified that the connector meets nearend crosstalk requirements? Current rating: Verified that the connector meets current rating requirements? Contact Resistance: Verified that the connector meets contact resistance requirements? Withstanding voltage: Verified that the connector meets withstanding voltage requirements? Durability: Verified that the connector meets durability requirements? What durability rating applies to this connector? Insertion force: Verified that the connector meets insertion force requirements? Removal force: Verified that the connector meets removal force requirements? Physical shock: Verified that the connector meets physical shock requirements? Flammability: Verified that the connector meets flammability requirements? Lead-free solder: Confirmation that the connector meets lead-free soldering requirements? yes no 5.3, Table 5-1 yes no 5.3, Table 5-1 yes no 5.3, Table 5-1 yes no 5.3, Table 5-1 yes no 5.3, Table 5-1 yes no 5.3, Table 5-1 yes no 5.4 5K 10K yes no yes no yes no , Tables 5-2 & , Tables 5-2 & 5-3 yes no 5.5, Table 5-4 yes no 5.5, Table All rights reserved 2007 USB Implementers Forum

39 RELEASE 1.2 EXPRESSCARD COMPLIANCE CHECKLISTS Explanations This section should be used to explain any no answers or clarify answers on checklist items above. Please key entries to the appropriate checklist question. Affidavit This section needs to be completed by an authorized representative of the vendor applying for product compliance certification. This signature affirms that the product being submitted for compliance registration meets the stated requirements of this checklist and that it is understood that given any changes are made to the product that may potentially impact the product s ability to continue to meet these requirements that the modified product should be re-verified to these requirements and resubmitted for a new registration. Name: Signature: Job Title: Date: 2007 USB Implementers Forum All rights reserved 35

EXPRESSCARD STANDARD. Release 2.0 February 2009

EXPRESSCARD STANDARD. Release 2.0 February 2009 EXPRESSCARD STANDARD Release 2.0 February 2009 PCMCIA 2009 PCMCIA All rights reserved. Printed in the United States of America. PCMCIA (Personal Computer Memory Card International Association) 2635 North