S1C17M12/M13 (rev1.0)

Transcription

1 (rev1.0) DESCRIPTIONS 16-bit Single Chip Microcontroller 16KB Flash ROM: Read/program protection function, 2KB RAM Supports 1.8V to 5.5V wide range operating voltage. Five-digit seven-segment LED controller (8SEG 1 5COM (max.)) Supports various kinds of interfaces (UART, SPI, I 2 C) The S1C17M12/M13 is a 16-bit embedded Flash MCU that features low power consumption. It includes various serial interfaces and a seven-segment LED controller on the compact die. It is suitable for control panels with a sevensegment display for housing equipment and FA equipment. FEATURES Model S1C17M12 S1C17M13 CPU CPU core Seiko Epson original 16-bit RISC CPU core S1C17 Other On-chip debugger Embedded Flash memory Capacity 16K bytes (for both instructions and data) Erase/program count 1,000 times (min.) Other Security function to protect from reading/programming by ICDmini On-board programming function using ICDmini Embedded RAM Capacity 2K bytes Clock generator (CLG) System clock source 3 sources (IOSC/OSC3/EXOSC) System clock frequency (operating frequency) 16.8 MHz (max.) IOSC oscillator circuit (boot clock source) 700 khz (typ.) embedded oscillator 23 µs (max.) starting time (time from cancelation of SLEEP state to vector table read by the CPU) OSC3 oscillator circuit 16.8 MHz (max.) crystal/ceramic oscillator 4, 8, 12, and 16 MHz-switchable embedded oscillator EXOSC clock input 16.8 MHz (max.) square or sine wave input Other Configurable system clock division ratio Configurable system clock used at wake up from SLEEP state Operating clock frequency for the CPU and all peripheral circuits is selectable. I/O port (PPORT) Number of general-purpose I/O ports Input/output port: 38 bits (max.) Output port: 1 bit (max.) Pins are shared with the peripheral I/O. Number of input interrupt ports 34 bits (max.) Number of ports that support universal port multiplexer (UPMUX) 21 bits A peripheral circuit I/O function selected via software can be assigned to each port. Number of high drive-capability Nch outputs 8 bits (max.) 7 ma output (max.) Number of high drive-capability Pch outputs 5 bits (max.) 56 ma output (max., Total sum of 5 bits) Timers Watchdog timer (WDT2) Generates NMI or watchdog timer reset. Programmable NMI/reset generation cycle 16-bit timer (T16) 4 channels Generates the SPIA master clock and the ADC12A trigger signal. 16-bit PWM timer (T16B) 1 channel Event counter/capture function PWM waveform generation function Number of PWM output or capture input ports: 2 ports/channel Supply voltage detector (SVD3) Detection voltage or external voltage (two external voltage input ports are provided.) Detection level : 28 levels (1.8 to 5.0 V)/external voltage: 32 levels (1.2 to 5.0 V) Other Intermittent operation mode Generates an interrupt or reset according to the detection level evaluation.

2 Model S1C17M12 S1C17M13 Serial interfaces UART (UART3) 4 channels Baud-rate generator included, IrDA1.0 supported Open drain output, signal polarity, and baud rate division ratio are configurable. Infrared communication carrier modulation output function Serial interfaces Synchronous serial interface (SPIA) I 2 C (I2C) IR remote controller (REMC2) Number of transmitter channels Other Seven-segment LED controller (LEDC) LED control output 2 channels 2 to 16-bit variable data length The 16-bit timer (T16) can be used for the baud-rate generator in master mode. 1 channel Baud-rate generator included 1 channel EL lamp drive waveform can be generated for an application example. Seven-segment LED outputs up to five digits (8SEG 1 5COM(max.)) COM time-division dynamic drive control Software configurable anode/cathode common mode and off-state pin status Four-level brightness adjustment function 12-bit A/D converter (ADC12A) Conversion method Successive approximation type Resolution 12 bits Number of conversion channels 1 channel Number of analog signal inputs 8 ports/channel Multiplier/divider (COPRO2) Arithmetic functions 16-bit 16-bit multiplier 16-bit 16-bit + 32-bit multiply and accumulation unit 32-bit 32-bit divider Reset pin Reset when the reset pin is set to low. Power-on reset Reset at power on. Brownout reset Reset when the power supply voltage drops. Key entry reset Reset when the P00 to P01/P02/P03 keys are pressed simultaneously (can be enabled/ disabled using a register). Watchdog timer reset Reset when the watchdog timer overflows (can be enabled/disabled using a register). Supply voltage detector reset Reset when the supply voltage detector detects the set voltage level (can be enabled/disabled using a register). Interrupt Non-maskable interrupt 4 systems (Reset, address misaligned interrupt, debug, NMI) Programmable interrupt External interrupt: 1 system (8 levels) Internal interrupt: 14 systems (8 levels) Power supply voltage operating voltage 1.8 to 5.5 V operating voltage for Flash programming 1.8 to 5.5 V ( = 7.5 V external power supply is required.) Operating temperature Operating temperature range -40 to 85 C Current consumption (Typ. value) SLEEP mode 0.5 µa (TBD) IOSC = OFF, OSC3 = OFF HALT mode 180 µa (TBD) OSC3 = 4 MHz (internal oscillator) RUN mode 600 µa (TBD) OSC3 = 4 MHz (internal oscillator), CPU = OSC3 (1 wait cycle) 1,700 µa (TBD) OSC3 = 16 MHz (internal oscillator), CPU = OSC3 (2 wait cycles) Shipping form 1 TQFP12-48pin (Lead pitch: 0.5 mm) 2 Seiko Epson Corporation

3 BLOCK DIAGRAM Coprocessor bus Multiplier/divider (COPRO2) DCLK DSIO DST2 CPU core & debugger (S1C17) 32-bit RAM bus Internal RAM 2K bytes Instruction bus Flash memory 16K bytes System clock Interrupt request 16-bit internal bus Interrupt signal FOUT Clock generator (CLG) IOSC oscillator Interrupt controller (ITC) UART (UART3) 1 Ch. USIN0 USOUT0 OSC3 OSC4 EXOSC OSC3 oscillator EXOSC input circuit System reset controller (SRC) Power-on reset (POR) Brownout reset (BOR) I/O port (PPORT) Watchdog timer (WDT2) Supply voltage detector (SVD3) P00 07 P10 17 P20 24 P40 47 P50 54 PD0 D1 PD3 D4 PD2 EXSVD0 1 Synchronous serial interface (SPIA) 2 Ch. I 2 C (I2C) 1 Ch. IR remote controller (REMC2) 1 Ch. Seven-segment LED controller (LEDC) SDI0 1 SDO0 1 SPICLK0 1 #SPISS0 1 SDA0 SCL0 REMO CLPLS COM0 4 SEG0 7 Power generator (PWG) 16-bit timer (T16) 4 Ch. 12-bit A/D converter (ADC12A) 1 Ch. ADIN00 07 #ADTRG0 VREFA0 16-bit PWM timer (T16B) 1 Ch. TOUT00 01 CAP00 01 EXCL00 01 * Not available in the S1C17M12. Seiko Epson Corporation 3

4 4 Seiko Epson Corporation PIN CONFIGURATION DIAGRAMS S1C17M12 pin configuration diagram (TQFP12-48pin) P52 P53 P54 P00 P01 P02 P03 P04 P05 P06 P07 P52/COM2 P53/COM3 P54/COM4 P00/UPMUX P01/UPMUX P02/UPMUX P03/UPMUX P04/UPMUX P05/UPMUX P06/UPMUX P07/UPMUX P24 P23 P22 P21 P20 PD2 PD1 PD0 P24/UPMUX P23/UPMUX P22/UPMUX P21/UPMUX P20/UPMUX DCLK/PD2 DSIO/PD1 DST2/PD S1C17M12 PD4 PD3 P17 P16 P15 P14 P13 P12 P11 P10 PD4/OSC4 PD3/OSC3 P17/UPMUX P16/FOUT/UPMUX P15/EXCL01/UPMUX P14/EXCL00/UPMUX P13/EXOSC/UPMUX P12/UPMUX/EXS P11/UPMUX/EXSVD0 P10/UPMUX Pin name P40 P41 P42 P43 P44 P45 P46 P47 P50 P51 Port function or signal assignment P40/SEG0 P41/SEG1 P42/SEG2 P43/SEG3 P44/SEG4 P45/SEG5 P46/SEG6 P47/SEG7 P50/REMO/COM0 P51/CLPLS/COM1

5 Seiko Epson Corporation 5 S1C17M13 pin configuration diagram (TQFP12-48pin) P52 P53 P54 P00 P01 P02 P03 P04 P05 P06 P07 P52/COM2 P53/COM3 P54/COM4 P00/UPMUX/ADIN07 P01/UPMUX/ADIN06 P02/UPMUX/ADIN05 P03/UPMUX/ADIN04 P04/UPMUX/ADIN03 P05/UPMUX/ADIN02 P06/UPMUX/ADIN01 P07/UPMUX/ADIN00 P24 P23 P22 P21 P20 PD2 PD1 PD0 P24/UPMUX P23/UPMUX P22/UPMUX P21/UPMUX P20/UPMUX DCLK/PD2 DSIO/PD1 DST2/PD S1C17M13 PD4 PD3 P17 P16 P15 P14 P13 P12 P11 P10 PD4/OSC4 PD3/OSC3 P17/#ADTRG0/UPMUX P16/FOUT/UPMUX P15/EXCL01/UPMUX P14/EXCL00/UPMUX P13/EXOSC/UPMUX P12/UPMUX/EXS P11/UPMUX/EXSVD0 P10/UPMUX/VREFA0 Pin name P40 P41 P42 P43 P44 P45 P46 P47 P50 P51 Port function or signal assignment P40/SEG0 P41/SEG1 P42/SEG2 P43/SEG3 P44/SEG4 P45/SEG5 P46/SEG6 P47/SEG7 P50/REMO/COM0 P51/CLPLS/COM1

6 PIN DESCRIPTIONS Symbol meanings Assigned signal: The signal listed at the top of each pin is assigned in the initial state. The pin function must be switched via software to assign another signal (see the I/O Ports chapter). I/O: I = Input O = Output I/O = Input/output P = Power supply A = Analog signal Hi-Z = High impedance state Initial state: I (Pull-up) = Input with pulled up I (Pull-down) = Input with pulled down Hi-Z = High impedance state O (H) = High level output O (L) = Low level output Tolerant fail-safe structure: = Over voltage tolerant fail-safe type I/O cell included (see the I/O Ports chapter) The over voltage tolerant fail-safe type I/O cell allows interfacing without passing unnecessary current even if a voltage exceeding is applied to the port. Also unnecessary current is not consumed when the port is externally biased without supplying. Pin/pad name Assigned signal I/O Initial state Tolerant fail-safe structure Function P Power supply (+), I/O power supply (except for P50 54) P I/O power supply (P50 54) P GND (except for P40 47, P50 54) P GND (P40 47, P50 54) P Power supply for Flash programming A regulator output I I (Pull-up) Reset input P00 P00 I/O Hi-Z I/O port ADIN07 A 12-bit A/D converter Ch.0 analog signal input 7 P01 P01 I/O Hi-Z I/O port ADIN06 A 12-bit A/D converter Ch.0 analog signal input 6 P02 P02 I/O Hi-Z I/O port ADIN05 A 12-bit A/D converter Ch.0 analog signal input 5 P03 P03 I/O Hi-Z I/O port ADIN04 A 12-bit A/D converter Ch.0 analog signal input 4 P04 P04 I/O Hi-Z I/O port ADIN03 A 12-bit A/D converter Ch.0 analog signal input 3 P05 P05 I/O Hi-Z I/O port ADIN02 A 12-bit A/D converter Ch.0 analog signal input 2 P06 P06 I/O Hi-Z I/O port ADIN01 A 12-bit A/D converter Ch.0 analog signal input 1 P07 P07 I/O Hi-Z I/O port ADIN00 A 12-bit A/D converter Ch.0 analog signal input 0 P10 P10 I/O Hi-Z I/O port VREFA0 A 12-bit A/D converter Ch.0 reference voltage input P11 P11 I/O Hi-Z I/O port EXSVD0 A External power supply voltage detection input Ch.0 S1C17M12 S1C17M13 6 Seiko Epson Corporation

7 Pin/pad name Assigned signal I/O Initial state Tolerant fail-safe structure Function P12 P12 I/O Hi-Z I/O port EXS A External power supply voltage detection input Ch.1 P13 P13 I/O Hi-Z I/O port EXOSC I Clock generator external clock input P14 P14 I/O Hi-Z I/O port EXCL00 I 16-bit PWM timer Ch.0 event counter input 0 P15 P15 I/O Hi-Z I/O port EXCL01 I 16-bit PWM timer Ch.0 event counter input 1 P16 P16 I/O Hi-Z I/O port FOUT O Clock external output P17 P17 I/O Hi-Z I/O port #ADTRG0 I 12-bit A/D converter Ch.0 trigger input P20 P20 I/O Hi-Z I/O port P21 P21 I/O Hi-Z I/O port P22 P22 I/O Hi-Z I/O port P23 P23 I/O Hi-Z I/O port P24 P24 I/O Hi-Z I/O port P40 P40 I/O Hi-Z I/O port High drive-capability SEG0 O LED segment output Nch output P41 P41 I/O Hi-Z I/O port High drive-capability SEG1 O LED segment output Nch output P42 P42 I/O Hi-Z I/O port High drive-capability SEG2 O LED segment output Nch output P43 P43 I/O Hi-Z I/O port High drive-capability SEG3 O LED segment output Nch output P44 P44 I/O Hi-Z I/O port High drive-capability SEG4 O LED segment output Nch output P45 P45 I/O Hi-Z I/O port High drive-capability SEG5 O LED segment output Nch output P46 P46 I/O Hi-Z I/O port High drive-capability SEG6 O LED segment output Nch output P47 P47 I/O Hi-Z I/O port High drive-capability SEG7 O LED segment output Nch output P50 P50 I/O Hi-Z I/O port High drive-capability REMO O IR remote controller transmit data output Pch output COM0 O LED common output P51 P50 I/O Hi-Z I/O port High drive-capability CLPLS O IR remote controller clear pulse output Pch output COM1 O LED common output P52 P50 I/O Hi-Z I/O port High drive-capability COM2 O LED common output Pch output P53 P50 I/O Hi-Z I/O port High drive-capability COM3 O LED common output Pch output P54 P50 I/O Hi-Z I/O port High drive-capability COM4 O LED common output Pch output PD0 DST2 O O (L) On-chip debugger status output PD0 I/O I/O port PD1 DSIO I/O I (Pull-up) On-chip debugger data input/output PD1 I/O I/O port PD2 DCLK O O (H) On-chip debugger clock output PD2 O Output port S1C17M12 S1C17M13 Seiko Epson Corporation 7

8 Pin/pad name Assigned signal I/O Initial state Tolerant fail-safe structure Function PD3 PD3 I/O Hi-Z I/O port OSC3 A OSC3 oscillator circuit input PD4 PD4 I/O Hi-Z I/O port OSC4 A OSC3 oscillator circuit output Universal port multiplexer (UPMUX) The universal port multiplexer (UPMUX) allows software to select the peripheral circuit input/output function to be assigned to each pin from those listed below. Note, however, that a function cannot be assigned to two or more pins simultaneously. Peripheral circuit Signal to be assigned I/O Channel number n Function Synchronous serial interface SDIn I n = 0, 1 SPIA Ch.n data input (SPIA) SDOn O SPIA Ch.n data output SPICLKn I/O SPIA Ch.n clock input/output #SPISSn I SPIA Ch.n slave-select input I 2 C SCLn I/O n = 0 I2C Ch.n clock input/output (I2C) SDAn I/O I2C Ch.n data input/output UART USINn I n = 0 UART3 Ch.n data input (UART3) USOUTn O UART3 Ch.n data output 16-bit PWM timer (T16B) TOUTn0/CAPn0 I/O n = 0 T16B Ch.n PWM output/capture input 0 TOUTn1/CAPn1 I/O T16B Ch.n PWM output/capture input 1 S1C17M12 S1C17M13 8 Seiko Epson Corporation

9 Basic External Connection Diagram COM4 COM3 COM2 COM1 COM0 EXSVDn External voltage SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 SEG0 REMO DCLK IR transmitter module RDBG ( ) DSIO DST2 ICDmini V CPW1 + ( ) CG3 ( ) CD3 CPW3 X'tal3/ Ceramic OSC3 OSC4 S1C17M12/M13 [The potential of the substrate (back of the chip) is.] Pxy SDIn SDOn SPICLKn #SPISSn SCL0 SDA0 C I/O SPI I 2 C V CPW2 USIN0 USOUT0 TOUT00/CAP00 TOUT01/CAP01 UART PWM/Capture + 2 ADIN00 07 #ADTRG0 VREFA0 A/D conversion inputs *1: When OSC3 crystal/ceramic oscillator is selected *2: Available only in the S1C17M13 ( ): Do not mount components if unnecessary. Sample external components Symbol Name Recommended components X tal3 Crystal resonator CA-301 (4 MHz) manufactured by Seiko Epson Corporation Ceramic Ceramic resonator CSBLA_J (1 MHz) manufactured by Murata Manufacturing Co., Ltd. CG3 OSC3 gate capacitor Ceramic capacitor CD3 OSC3 drain capacitor Ceramic capacitor CPW1 Bypass capacitor between and Ceramic capacitor or electrolytic capacitor CPW2 Bypass capacitor between and Ceramic capacitor or electrolytic capacitor CPW3 Capacitor between and Ceramic capacitor RDBG DSIO pull-up resistor Thick film chip resistor C Capacitor between and Ceramic capacitor Seiko Epson Corporation 9

10 NOTICE: No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party. When exporting the products or technology described in this material, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations. You are requested not to use, to resell, to export and/or to otherwise dispose of the products (and any technical information furnished, if any) for the development and/or manufacture of weapon of mass destruction or for other military purposes. All brands or product names mentioned herein are trademarks and/or registered trademarks of their respective companies. Seiko Epson Corporation 2016, All rights reserved MICRODEVICES OPERATIONS DIVISION Device Sales & Marketing Department Hino, Hino-shi, Tokyo , JAPAN Phone: FAX: EPSON semiconductor website Document Code: Issue June 2016 in JAPAN L