Design for a digital, assignable multi-function mixing desk

Transcription

1 Design for a digital, assignable multi-function mixing desk SAE thesis by Richard Bennett March Tonmeister TDD design Page 1

2 With the advent of the digital domain, recording studio desks have started to include features derived more from the computing than recording industry. However, the desks are still being designed for the recording engineer, by technicians rooted in the audio engineering and analogue electronics industries. The result is typically an analogue desk with digital hardware assists, based on analogue technology or outdated digital electronics. This document is an attempt to outline a rough design for a desk fully capable of utilising the latest computing technology, designed by a technician grounded in the software engineering and design and digital engineering fields. The result should be a fully digital desk with minimal analogue assists, and easily and cheaply upgradable with subsequent software engineering, from herein known as the TDD, or Totally Digital Desk.. All hexadecimal values in this document are preceded by a dollar sign, to indicate their base. TDD design Page 2

3 OVERVIEW HARDWARE The system consists of a lightweight frame containing the channel strips and access controls. The audio and main control hardware are rack mounted, and can thus be moved to a separate machine room. The frame, or desk surface, acts purely as a remote control for the hardware in the rack. The basic hardware consists of an average looking mixing desk, with no physical channel strips containing components. The width of the desk is designed for ease of access, and is not a limitation on the number of channels available. In this sense, it is your typical assignable desk. The desk surface consists of multiple vertical display screens, layed out as if they were typical channel modules. Although many configurations are available, these displays can be made to look like a pure graphical representation of a typical channel strip. The meter bridge may contain analogue VUs, or digital graphs, depending on the preference at installation time. These can also be changed at a later date via the online configuration. The meter bridge contains a meter for each physical channel path, so that a 48 channel desk with 10 logical channels, will still have a 48 meter bridge. On the end of the desk, is a keyboard and various desk navigation tools. Above this is the main control screen, angled toward the centre of the desk, and in reach of the engineer. This and the channel strips, are touch screens, and are used for navigation through the various components of the desk. An access panel on the back gives access to expansion slots, I/O ports and audio connections. A main bus cable links the desk with the physical components in the rack. The system is run by a single central processor, which monitors and controls the other processors in the system. Other processors include the DSPs used for FX (effects) control, one per software driven channel, the signal transformation chips, such as DACs and ADCs, and the I/O sub-system. Additional processors may be added through sockets supplied. The operating system allocates these resources to tasks as required, so it is unnecessary to have a device for each audio channel. TDD design Page 3

4 OVERVIEW AUDIO All audio is stored inside the desk digitally, and can be optionally stored on disk. Pre-emptive page logic in software, combined with multiprocessing DMA I/O modules, make real time audio transfer between the desk and disk possible, without loss of data. Additional recording time is thus only dependant on the number of active channels in the current system configuration, and the combined capacity of the connected hard drives. Audio is digitised at 50KHz with 24 bit resolution. OVERVIEW SOFTWARE & LAYOUT Memory inside the desk is linear 32-bit, providing 2 gigabytes of RAM. Sections are reserved for the system software and processor memory requirements, and the rest for the digitised audio. The memory is managed by the system software, and may be optionally paged to disk in real time, utilising pre-emptive page logic through DMA processors. Desk upgrades can therefore be performed by simple software engineering enhancements, mailed or couriered to customers, without costly down time and technician availability problems. The desk layout consists of ten logical channel strips, in which only the faders are physical controls. The upper section of the channel contains a flat panel touch screen display, which represents the controls which the channel has access to. See fig. 1. Below that is a touch sensitive scribble strip, which is digitised and stored digitally with the channel information. A special pen is used to write or scribble on the strip. When a real (physical) channel is represented by one of the desk (logical) channels, the scribble strip information is also restored. An alternative could be to use GO technology pen based screens, or the new VSC technology from Flux Research. VSC multi-channel representation technology could also be used to monitor channels not currently mapped to a desk channel path. Next to the faders are the real controls, which control the currently active module. The controls include infinite rotation (vector output) pots and switches, which are mapped into each module as it is used. Because all the controls are in a central point, and are used for every module, the engineer very quickly becomes used to the layout of the controls, and can make changes to a module very quickly. Modules in the channel strips are made active simply by touching them. From then until the next module is touched, the physical controls take immediate effect. By changing the value of a module, say adjusting the centre frequency of an EQ, the touch display also changes to reflect the new value. ie. its graphical representation changes. Modules are icons representing features such as Pan, Phase reversal, From FX, To FX, To Channel, Insert, EQ. etc. When initialised, each channel assumes the setup saved to the 3.5" floppy diskette in the desk's floppy drive. Setups can be recalled later from other disks, by using the recall function from the main display. Saved channel setups are called user setups. The system setup is TDD design Page 4

5 saved to one of the connected hard drives, and includes the current patch bay layout and name information, as well as a master channel setup in the case where no diskette is inserted in the floppy drive when the desk is powered up. All setups reflect EXACTLY what the desk looked like when the setup was saved. To insert a new module into the channel path, you touch the module you wish to add, from the main display, then touch the two modules in the channel where you wish the module to be inserted. To add an FX send, touch the To FX modules on the main display, then a list of available FX will be displayed, with an icon next to each indicating whether input or output of the device is already being used. Again, touch the two modules where you wish to insert the module. Fig.1 gives an example channel strip. Above the fader is the scribble strip. Above that is a To BUS module, sending the signal from the fader to the stereo bus, panned slightly to the left. Above that is an FX send to a stereo SPX. The two indicators are showing the level being sent to the left and right input channels of the SPX. Above the SPX is an EQ module, which is currently selected. The EQ module's graphical display shows the amount of cut or boost in the form of a graphical function curve. At the top is a From TAPE module, with the input gain set to roughly three quarters. Fig. 2 shows the layout of the physical controls. The large wheel is used to decide which channels are represented by the logical channels. Rotating the wheel has the effect of sliding the real channels underneath a 10 logical channel template. The other generic controls include rotary potentiometers, and a switch, for phase reversal for example. Auto-patching is handled by the desk software. When an FX is inserted in the channel path, the software signals the patch bay to redirect the signal to the appropriate connection. The system configuration determines whether the patch is digital or analogue, and auto-routes through appropriate DAC and ADC devices as necessary. FX units are known only by name. Because of the autorouting facility, no numeric patch numbers can be used. If you want the SPX1000, for example, simply touch the module marked "SPX1000". DSP chips are included for internal FX processing in software, as well as the auto-patching to external FX units. The DSP programming, and thus the number and quality of the available internal FX, is upgradable through software, making maintenance a breeze, with minimal down time. Use of DAC/ADC devices and EQ are optimised by the system. Instead of having one per channel, devices are allocated for use as required. This in turn reduces the cost of the desk, and in particular the number of DAC/ADC units and EQ required. TDD design Page 5

6 AUDIO CONTROL INTERNALS Each physical channel path has a dedicated microprocessor, which shares the main memory space with all other channels. One independent processor then controls general system tasks. At powerup time, the operating system is loaded from hard disk into memory, starting at bank 2 (ie. memory location $20000). At the end of the operating system, channel tables are built for each audio channel within the system. Following that are miscellaneous system tables for the main processor, and then the audio memory, which can be allocated for use by any channel requiring it. Although the amount of memory in the system should decide how many real channels there are, pre-emptive paging effectively removes this limitation. System information is kept in bank 0 (ie. the first 64K of memory, which contains locations $0 through $FFFF), at fixed locations. This memory is called the system table. Channel processors may access this memory directly as required. Bank 1 (ie. the second 64K of memory, which contains locations $10000 through $1FFFF) is mapped to the hardware. This includes touch screen feedback data, DAC/ADC functions, and other miscellaneous I/O information. After the channel tables have been built the independent processor starts each channel processor. At this stage, the desk is fully powered up, with each channel processor sitting in a soft wait, spinning on CHT_Mode. For the sake of a description of the internal logic, assume the following tables are correct. Other operating values will be necessary, however I have only included value relevant to the description of the software logic. Each channel table is 4K long, and the layout begins as follows: CHT_LinkNext longword pointer CHT_LinkLast longword pointer CHT_Mode word flag CHT_Num word value continued... CHT_LinkNext contains a longword pointer to the next channel table in memory. Although channel tables are normally kept sequentially in memory, they may be moved in future releases of the software, socht_linknext can be used to walk the tables until the correct TDD design Page 6

7 channel table is found. A longword of $ indicates the end of the list. ie. the last channel table. CHT_LinkLast contains a longword pointer to the previous channel table in memory. A longword of $ indicates the beginning of the list. The address of the first channel table can be found at SYST_Channels in the system table. CHT_Mode contains a word indicating the current operating mode. A value of $0000 effectively de-activates the channel, by placing the processor into a spin wait. The presence of audio down the channel path usually re-activates the channel by changing this value. CHT_Num contains a word indicating the channel number that this table belongs to. The rest of the channel table is used a scratch space by the channel processor. The system table layout is as follows: SYST_Version word value SYST_Channels longword pointer SYST_IO longword pointer SYST_MemTables longword pointer continued... SYST_Version contains a word version number of the operating system. The first release would be $0100, indicating version 1.0. SYST_Channels contains a longword pointer to the first channel table in memory. SYST_IO contains a longword pointer to first IO_Block in the system. IO_Blocks are defined for every device within the system, including the DACs, ADCs and attached hard drives. SYST_MemTables contains a longword pointer to the first memory table. The memory tables are a linked list which together describe all of the available memory and who it belongs to. When a channel processor requests an amount of memory, a memory table is built describing it, and inserted into the list of tables. The table link fields TDD design Page 7

8 are sorted by memory address, so that while the memory blocks are not physically in the correct order, walking the linked list is. As each channel is started, it is told which channel table it owns, the address of which is kept in one of its addressing registers. This provides direct access to its channel table and scratch space. Interrupts are then enabled for each channel's digital inputs, and the main processor starts accepting commands from the various displays on the desk surface. When audio appears at the head of a channel path, post-ad conversion, an interrupt is generated. The main processor then activates the appropriate channel processor by changing CHT_Mode in its channel table. Interrupts for that channel are then disabled, and the channel processor takes over data gathering via its ADC in bank 1. When the channel processor is unspun, it allocates a megabyte of memory for buffering, and spins on its ADC in bank 1. See section DATA ACQUISITION for more details. As data is acquired through the ADC, it is stored in the allocated buffer. When the buffer becomes 50% full, a DMA request is issued. At this stage, the channel processor must check not only the ADC, but the system call flag as well. Once the system is free, it makes a DMA system call and continues on. The main processor will pass the request on to the hardware for DMA of the memory directly to disk. The main processor maintains the layout of each hard drive in memory, in the IO_Blocks. As audio flows in and out of the desk, the channel processors monitor and control all the audio data. As DACs are allocated for use for audio to tape, or to an effect send for example, the channel processor must also be in control. Depending on the channel setup, audio may be entering the channel path via disk or ADC, and exiting via almost any number of DACs or via DMA. As long as DACs are available in bank 1, they can be allocated by the system for use, and the appropriate channel processor can take over their management. TDD design Page 8

9 SCREEN CONTROL USING THE MENUS Whenever modules are selected on the desk surface, the menus on the main display immediately change to those most appropriate. The default screen on powerup shows typical maintenance functions, such as save/restore setup, patch bay definition etc. If there is a disk in the floppy drive, the setup also contains which screen was last used. CONCLUSION In the case of pure surface design, the desk could be used to control virtually any rack mount unit, whether it contains digital or analogue devices. Device manufacturers can build components ready to connect to the system, thus creating an industry standard. This document is only a guide to pure digital desk design, specifically relating to graphical surface representation as an industry standard input device. Because all of the technology described is currently available, such a desk could be built, and as the cost of this technology falls, it could provide an economical answer to the problem of expensive analogue devices, as well as creating an industry standard desk or desk surface, thus giving all engineers equal footing in the world of audio production. TDD design Page 9

10 APPENDIX 1 DATA ACQUISITION ADC output is read by each channel processor, and the data is stored in memory. The standard model for acquisition is that the processor involved will go into a spin wait on a flag. Once the flag is set, the hardware has finished conversion of the next wave sample, and the data value is read from a hardware register which is mapped into the processor's memory space. Reading the value from the data register resets the flag, ready for the next sample. In the case of the TDD, the data register and the register full flag are mapped into bank 1. The data register is 24 bits long. Data is read from the data register and stored sequentially in the allocated memory space. TDD design Page 10

11 APPENDIX 2 MULTITASKING ANOMALIES Because of the heavily used spin methodology, channel processors need to know when they have set a spin flag for exclusive access, as opposed to another channel processor having made the request. A test and set instruction reads the spin flag and checks it for the value $0000. If not, the next instruction is executed. Normally the next instruction would check the status of the previous instruction, and spin on it if the flag was not set. If the test and set instruction finds that the flag contains the value $0000, it stores a register containing the channel number into the flag. Because the read and write are single threaded by the MMU, other channels attempting to execute test and set instructions are protected from overwriting the value in the flag if it is non-zero. The channel processor which successfully sets the flag then reads the flag back to see if its test and set was successful. If the value matches, then the channel processor can continue on with the task while being protected by other channel processors also wanting access to the task. TDD design Page 11

12 APPENDIX 3 SYSTEM CALLS All system calls are made through the hardware registers in bank 1. The channel processor first spins on a system call flag, until it is reset. When this occurs, there is no other pending system call. The processor then sets this flag, to indicate that it is going to make a system call. This causes all other channel processors who wish to make a system call to go into a spin wait. The channel processor then stores the address of the system call parameter block in a hardware register in bank 1. Storing the parameter block address generates an interrupt, which is serviced by the main processor. The main processor reads the parameter block address from the hardware register, and performs the function contained within it. The first word of the parameter block indicates when the call has completed. The channel processor spins on this flag until the main processor clears it. An example of a system call would be a channel processor allocating memory for its own use. It would build a parameter block at the end of its channel table, containing the amount of storage required. After the system call, empty locations within the parameter block will be filled with the starting location of the block of memory, and a return code indicating whether the memory was actually available. If the memory is not available, the channel processor will make a subsequent call with a smaller memory size request. TDD design Page 12

13 APPENDIX 4 GLOSSARY OF TERMS ADC Analogue to Digital Converter. DAC Digital to Analogue Converter. DMA Direct Memory Access. I/O ICs which are able to access main memory for reading and writing without intervention from a processor, use DMA. LONGWORD a 32 bit value MMU Memory Management Unit. This IC controls access to the RAM within the system. At the logic level, RAM reads and writes are synchronised with the main timing crystal. SINGLE THREAD When only one processor or task occurs at one time, the task is being single threaded. Multithreading is where more than one code path is being executed at the same time. In multitasking, single threading is used to protect non-re-entrant code from being executed by more than one task or processor. When single processors are involved, threading can be simulated by time-slicing. SPIN When a processor continually checks a location in memory for a particular value. In multi-processing systems, non-re-entrant code halts other processors by setting a flag in memory. At exit time, the flag is rest. All other processors attempting to call the code must wait until the flag is cleared before proceeding into the non-re-entrant routine. This is called a spin wait, as the processing virtually spins on the flag until it is cleared. WALK When using linked lists, as in the case of channel tables, a processor may walk through the list by using the link pointer of each table to find the location of the next. TDD design Page 13

14 WORD a 16 bit value TDD design Page 14

15 APPENDIX 5 FIGURES AND TABLES From TAPE EQ To SPX To BUS L R Scribble Strip Fig. 1 Fig. 2 TDD design Page 15