PDIUSBD11 USB Peripheral with I 2 C Serial Interface

Transcription

1 PDIUSBD USB Peripheral with I C Serial Interface Features The PDIUSBD USB Device with Serial Interface from Philips Semiconductor allows almost any microcontroller the option of having a USB Interface. Being a full speed device, it allows all possible USB Transfer Modes including Control, Isochronous, Bulk and Interrupt Modes. It s I C Interface can be clocked at a maximum of Mbit/s with a theoretical maximum transfer of 568KB/s, thus makes communication between the microcontroller and PDIUSBD quite a bit slower than the Mbits/s achievable with a full speed USB Device. The PDIUSBD is a.v device with 5V tolerant I/O. Don t let this put you off, when considering your design. A small low powered.volt regulator is all that is needed to interface to your 5V logic. The I/O pins are open drain, thus using pull up resistors to 5V, a 0 to 5v logic output is obtainable. Unlike other USB Peripheral IC s such as National s USBN960 which require a 48Mhz crystal, the PDIUSBD uses a in-built PLL to derive it s internal 48Mhz from a Mhz Crystal. Not only does this make it cheaper, as 48Mhz crystals are hard to obtain, it also helps reduce EMI. Oscillator But with all these positives, there must be some negatives. Lack of documentation is one. Philips gives no sample circuits in their data sheet, and makes little effort to describe any supporting passive components around it and assumes you will consult the USB Spec for most data. After numerous contacts, and reading between the lines a basic circuit can be sought. What is more worrying is the software. Philips has left out critical initialisation information regarding the disabling of the HUB, and has repeatedly specified wrong commands for the clearing of interrupts. It would be almost impossible to get the PDIUSBD going from just the data sheet alone. As discussed, the clock is generated by a Mhz Crystal. The data sheet suggests that no external components other than the crystal are needed. This is true in many cases, however Guy Jaumotte from Philips states they are not needed, but are used to guarantee start-up. It s definitely much easier to add them, rather than argue and have oscillator problems later down the track. When designing a board, it s wise to place pads for the capacitors even if you do not add them during manufacture. USB Termination Resistors V BUS The data sheet would suggest some series termination resistors are required to connect the transceiver to the USB Cable. This is the classic case where Philips expects you to look up the USB Spec, with little knowledge of what s actually in the PDIUSBD. ohm % resistors have been used in this example, but it s suggested that anything from ohms to 44ohms can be used. Their purpose is impedance matching of the bus. The analog input pins, have an internal pull down resistor of approximately 5k and a software selectable Pull Up esistor to D+, known as SoftConnect TM. V BUS is used to detect the presence of the USB Bus. Without a presence, the PDIUSBD doesn t generate any interrupts or returns a status. V BUS is also used to enable SoftConnect should SoftConnect be enabled using the Set Mode Command. The PDIUSBD, being 5v tolerant will allow the V BUS pin to be connected directly to the 5V Bus Power Supply. However being a.v device, it s wise to use a Voltage Divider network to obtain.v for the V BUS Pin. However as we will discover complications will result in suspend. The PDIUSBD is 5.5 Volt tolerant (see Data sheet) so you can connect directly the Bus power supply line to the VBUS pin. However the device Vcc is. Volt so it make sense to connect the Bus power line via a divider network. Any combination of resistor will do providing that take into account the maximum voltage drop allowed on Vbus(See USB specs), the minimum voltage that is recognised as a HIGH in.volt technology (approx Volt) and the maximum consumption allowed in suspend mode (500microAmp). In a Self power mode, the pin consumes microamp and you have to take into account the bus divider network consumption [Vbus -.5KOhm - D+ - 5KOhm - GND] Guy.Jaumotte@Philips.com While every effort is made to ensure the information is correct, should any discrepancy occur between this document and the Philip s PDIUSBD Data Sheet or the USB Specification, the PDIUSBD Data Sheet and USB Specification should be observed. Please report any suspected errors to Craig.Peacock@senet.com.au

2 PDIUSBD Pin Descriptions Pin Pin Name Type Description Test Input For normal operation connect to ground. Reset_N Schmitt Trigger Input Reset. PDIUSBD provides internal reset circuit, thus may be tied directly to VCC should an external reset not be needed. XTAL Input Connect to Mhz Crystal. While the PDIUSBD is designed not to require any additional circuitry, a capacitor (~pf) to ground will help guarantee start-up. 4 XTAL Output Connect to Mhz Crystal. While the PDIUSBD is designed not to require any additional circuitry, a capacitor (~pf) to ground will help guarantee start-up. 5 ClkOut ma Output Programmable Clock Output. This output defaults to 4MHz which can be used to clock a microcontroller. This pin will stabilise after ms from power-on and 0S after suspend. If this output is used to control a microcontroller, care should be taken to ensure the C comes out of reset after ms by using a suitably timed RC network. 6 V CC Power Connect to a.v supply with a tolerance of 0.Volts. 7 Suspend Bi-Directional OD 6mA Sink This pin is bi-directional, not an output only as the PDIUSBD data sheet states. This line can be tied low to prevent the PDIUSBD from going into suspend, or pulled low during suspend to wake up the PDIUSBD. 8 INT_N OD Out 6mA Sink Interrupt Output. Interrupt is level sensitive and will go low on an interrupt occurring and return high once all interrupts have been cleared. Most microcontrollers will accept only an Edge Sensitive Interrupt, thus care should be taken at the end of the Interrupt Service Routine, to check that all interrupts have been dealt with before returning from interrupt. The other option is to poll the INT_N Pin. 9 SDA OD I/O 6mA Sink I C Serial Data. Bi-directional pin. Use a pull up resistor if talking directly to a C or follow the I C Specifications for connection to an I C Bus. 0 SCL OD I/O 6mA Sink I C Serial Clock. Bi-directional pin. Use a pull up resistor if talking directly to a C or follow the I C Specifications for connection to an I C Bus. GND Power Ground. DP AI/O USB D+ Connection. Series termination resistors ( %) are required for impedance matching of USB Bus. The USB Spec. states that the impedance of each driver is required to be between 8 and 44. The PDIUSBD s Drive Output Resistance is 9 to 44 max provided % series resistors are used. DM AI/O USB D- Connection. Series termination resistors ( %) are required for impedance matching of USB Bus. The USB Spec. states that the impedance of each driver is required to be between 8 and 44. The PDIUSBD s Drive Output Resistance is 9 to 44 max provided % series resistors are used. 4 AGND Power Analog ground 5 AV CC Power Analog Supply.V 0.Volts. Normally connect to V CC through some suppression to isolate any digital noise. 6 V BUS Input USB Power Sense. Full speed devices are identified by pulling D+ to.v 0. Volts via a.5k 5% resistor. This is build into the PDIUSBD as part of Philip s SoftConnect TM Technology. However any USB device is not allowed to supply power to the USB Data lines when the power has been removed, Thus the requirement of the PDIUSBD to sense the USB Power line. While this pin is 5V tolerant, it is normally connected to V BUS via a divider network to reduce it to.volts. Recommended values are 680k & 0k.

3 Example Schematic.V R6 0K Ferrite Bead C5 0.uF VCC VCC VCC VCC USB 4 Type B VCC D- D+ GND Contact No. 4 SoftConnect TM Signal Name VCC - Data + Data GND USB Contact Numbers per USB. Spec Receptacle Series A 4 R7 680K Receptical Series B 4 C 0.uF R4 R5 C6 uf X Mhz C pf C pf U PDIUSBD VCC AVCC VBUS D+ D- AGND OSC OSC RESET CLKOUT SUSPEND INT SDA SCL TEST GND +.V 5 Note that the USB Specification calls for a.5k 5% (45 to 575) Pull Up resistor on D+. Philips specifies a SoftConnect pull up resistor with a tolerance of.k minimum and a maximum of.9k which has a tolerance closer to 0%, than the USB Spec s 5%. Philips specifies this in their data sheet ensuring the design engineer that V SE voltage specification can still be meet and the end designer lies with the option of using it or not. Essentially, if you use SoftConnect, it is out of spec and not USB Compliant. You could use you own termination resistor, but you have to find a.volt source to connect it too, bearing in mind that the V BUS is 5 volts. However as you will need a. Volt 0.V supply for the PDIUSBD in bus powered designs this should not be a problem. The other consequence of using an external pull up resistor is that it can only be connected when V BUS is present. The USB specification states that no power can be applied to the data lines in the absence of V BUS. This is once again not a problem for bus powered designs as you can still connect it to your regulated.v supply which is derived from VBUS O.D. O.D. O.D. O.D. R8 4K7 R9 4K7 R0 4K7 VCC U 78L0.V Vin Vout + C8 0uF G + C7 0uF R 0K C4 0.uF Suspend INT Data Clock Self Powered or Bus Powered? Current Budgeting The PDIUSBD doesn t mention much about power consumption. Power consumption is big business with USB, if you draw too much current, you violate the USB Spec. The PDIUSBD draws around 5mA during normal operation. The data sheet specifies no minimum, maximum or typical values for power consumption in fully operational nor suspends states. A USB device specifies its power consumption expressed in ma units in the configuration descriptor. A device cannot increase its power consumption, greater than what it specifies during enumeration, even if it loses external power. There are three classes of USB functions, low power bus powered functions, high power bus powered functions, and self powered functions.

4 Bus Powered Low power bus powered functions draw all it s power from the V BUS and cannot draw any more than one unit load. USB defines a unit load as 00mA. High power bus powered functions draw all it s power from the bus and cannot draw more than one unit load until they have been configured, after which it can then drain 5 unit loads (500mA Max) Self power functions may draw up to unit load from the bus and derive the rest of it s power from an external source. Should this external source fail, it must have provisions in place to draw no more than unit load from the bus. Self powered functions are easier to design to spec as there is not so much of an issue with power consumption. During initialisation and enumeration the maximum power drain that USB. permits is 00mA. As the PDIUSBD consumes approximately 5mA, there is a 75mA excess for the microcontroller and support circuitry. A low powered device must be capable of operating on a minimum 4.40V to maximum 5.5v at the plug of the USB device. However during suspend, additional constrains come into force. The maximum suspend current is proportional to the unit load. For a unit load devices (default) the maximum suspend current is 500uA. This includes current from the pull up and pull down resistors on the bus. The PDIUSBD drains approximately 0uA during suspend. Of this approximately 00uA is due to the internal pull up resistor on D+. This leaves approximately 90uA to play with. However this is dependent on what we have done with V BUS. If you have used the 680K/0K voltage divider then you are sinking 5mA into the divider network. The input leakage current of V BUS being a digital I/O pin is 5A max. Guy Jaumotte suggests this figure is closer to A typical. Another consideration is the required.v regulator for bus powered designs. Suspend Mode Every USB device must support suspend. However this is another area the data sheet avoids. The PDIUSBD can enter suspend mode in various ways such as, Selective Suspend Host sends a suspend command to the attached port. Global Suspend The host suspends its self. No activity on bus for more than SOF ~ ms. Each ms a SOF (Start of Frame) packet should be sent on the USB. This is the responsibility of the host. When the bus goes into suspend, the SOF every ms will seize to exist. The PDIUSBD will wait for ms without the presence of a SOF. It will then allow it s Suspend pin to go high, signalling to the microcontroller than it is about to enter the suspend state and to stop finishing it s processing and go to sleep. The entire USB Device (PDIUSBD, MicroController and Support Circuitry) must not drain anymore than 500uA from V BUS when in suspend. This of course is not so much of an issue for Self Powered Devices. ms after the suspend pin goes low, the ClockOut will go into Lazy Clock Output if this feature is selected. These features are selected by the Configuration Byte as detailed below. Configuration Byte No Lazy Clock (Bit ) Clock Running (Bit ) Selected Configuration ClockOut will switch to Lazy Clock Mode (Frequency 0KHz 40%) ms after suspend pin goes high. Internal Clock, Crystal Oscillator and PLL will stop during suspend, consuming less power. ClockOut will switch to Lazy Clock Mode (Frequency 0KHz 40%) ms after suspend pin goes high. Internal Clock. Crystal Oscillator and PLL are always running regardless of suspend mode. Internal Clock, Crystal Oscillator and PLL is stopped during suspend as a result, ClockOut seizes to run. ClockOut stays at its original speed. The Internal Clock, Crystal Oscillator and PLL are always running regardless of suspend mode. Current Consumed ~.5mA (External C will run at slower speed, reducing current if connected) ~5mA External C will run at slower speed, reducing current if connected) ~0A (Assuming SoftConnect TM Active) ~5mA (+ Full load of attached C)

5 The PDIUSBD can come out of suspend in two ways Pull Suspend Pin Low. Resume Signal from Bus (Downstream to Device) The data sheet is rather misleading in this area. With the suspend pin specified as an output only and the resume command saying This command is normally issued when the device is in suspend, one would assume you would simply send the Resume Command. This is not the case. If the microcontroller wishes to wake up the PDIUSBD, it pulls the suspend pin low. The PDIUSBD will come out of suspend, but can t talk on the Bus as there are no SOF Packets every ms. To wake up the Host, the Send Resume Command Is sent to the PDIUSBD. I C Protocol Interface The PDIUSBD uses the Philips I C protocol which can be a little daunting if you have never used it before. Unlike other serial buses such as SPI and Microwire which have individual chip selects, I C sends an address down the bus after a start condition. Only the device which has the matching address will respond to the following commands until either a restart condition or a stop/start condition is generated again. As I C is multi-master, a restart condition will allow the host to re-issue an address without giving up its control of the bus. Sending a stop condition means the device no longer requires the bus and should another device want to talk on the bus, it can generate a start condition and take over as master. Instead of the PDIUSBD having only one address as you would expect, the PDIUSBD has three addresses for simplicity. This allows information about the data to follow e.g. is it command/data or read/write to be efficiently encoded into the address. This is not entirely correct in the context of the I C specification, as it has two addresses (Command/Data) and a direction bit (LSBit) which specifies read/write operations as shown below. Function I Caddress D Combined Address Command Write x6 Data Write x4 Data Read x5 An example Write Command Cycle (Disable Hub Address) is shown below. Start 0x6 A 0xD0 A Restart 0x4 A 0x00 A Stop Write Disable Hub Write Data Data Byte Command Multiple commands can be sent after a write command. Complicating matters further, when reading the PDIUSBD, it must place its serial line into input mode. However as multiple reads can be performed after the one Command Read address, it has no way of telling when to release the bus. Therefore the master must acknowledge all bytes except for the last byte which it must return an negative acknowledge. An example Read Command Cycle (Read Interrupt Register) is shown as follows, A N Key Master to PDIUSBD PDIUSBD to Master Ack Negative Ack Initialisation Start 0x6 A 0xF4 A Restart 0x5 A 0x00 A 0x40 N Stop Write Command Read Interrupt Register Read Data Data Byte Data Byte The wafer of the PDIUSBD is the same in both the HUB (PDIUSBHA) and Device/Function chips (PDIUSBD). What Philips omit from the data sheet is that you need to disable the hub before you can use the embedded function. Failure to do so, will result in setup packets being received on the HUB s default port and not the embedded functions. They do however mention the initialisation in their FAQ but have once again missed it in their latest revision of the data sheet, dated July 999. (Before that, one could off assumed they lost the original/editable data sheet!)

6 The PDIUSBD is effectively the embedded function of a PDIUSBHA(HuB). We have taken the silicon of the PDIUSBHA and bounded the embedded function. This has for consequence that the HUB is still present and active inside the PDIUSBD. The Hub part MUST be disabled at power-on and AFTER Bus reset by sending the command 0xD0(Set Address(Hub)) and writing the data 0x00(Address 0 disabled). The same can be done for the hub endpoints. Guy.Jaumotte@Philips.com Another thing you must note, is that the HUB is re-enabled on a Bus Reset. It is therefore, necessary to disable the hub and enable the Embedded Function every time a Bus Reset Interrupt occurs. Notes : () PDIUSBD FAQ () SoftConnect TM is a patent pending technology from Philips Semiconductors

7 PDIUSBD Command Summary Set Address / Enable Command 0xD0 Set Hub Address Data Command followed by a Write of One Data Byte 0xD Set Embedded Function s Address with the format below. 0xD Embedded Function Two (PDIUSBH) 0xD Embedded Function Three (PDIUSBH) Enable Address This command will enable the desired function (bit 7) and set its address. A in bit 7 enables the function. The low seven bits are used to set the function s address. When first powered up, an address of zero is used, until the Host issues the Set Address Device Request (Chapter 9 USB Spec) during enumeration. The PDIUSBD contains the same Silicon than the Philips PDIUSBHA HUB. As a result, the HUB powers up enabled and thus needs to be turned off at initialisation and after a Bus Reset. Set Endpoint Enable Command 0xD8 Set Endpoint Enable Data Command followed by a Write of One Data Byte with the format below X X X X Power on Reset Generic Reserved Reserved Reserved Reserved Reserved Reserved Endpoint Reserved Enable When the function is enabled, only its Default Control Pipe (Endpoint & ) are enabled. During enumeration, your device will describe to the host the type of Generic Endpoints it wishes to use in the form of an Endpoint Descriptor. Later during enumeration the host will send the Set Configuration Device Request (Chapter 9 USB Spec). At this point you can enable your Generic Endpoints. Note that many devices will enable the Generic Endpoints at Power Up and this does not effect the functionality of the device. Endpoint No. Endpoint Index Endpoint Type Direction 0 Out Control / Default In 5 Out Generic 4 In 6 Out Generic 7 In 8 Out Generic 9 In Set Mode Command 0xF Set Mode Data Command followed by writing two data bytes with format below, Byte - Configuration Power on Reset Embedded Function Mode X X Soft Connect Debug Mode Clock Running No Lazy Clock Remote Wakeup Remote Wakeup No Lazy Clock Setting this bit enables the Remote Wakeup Feature. A bus reset will enable this function. Clearing this bit, ensures the clock will not switch to lazy clock mode (~0kHz) ms after Suspend. This value does not change on a Bus Reset.

8 Clock Running Debug Mode Soft Connect Embedded Function Mode / Future Mode The setting of this bit will ensure the clock & phase lock loop is always running even in suspend. Use this mode with self powered devices. Bus powered devices will need to set this bit to 0 to ensure the maximum load specifications during suspend is meet. Setting this bit will cause all errors and negative acknowledgments to be reported. If Clear only OK and babbling is shown. Setting this bit will enable the pull up resistor on D+ to be connected when V BUS is present. This value is not changed by reset. For normal operation, set this bit. The PDIUSBH uses this bit to enable multiple embedded functions. It has not yet be determined if this will work with the hub disabled. See the PDIUSBHA data sheet for more details. Byte Clock Divider X X Power on Reset X X Clock Divisor Byte sets the frequency of the clock output. Should you desire either a default 4MHz clock or do not wish to use the clock then this byte can be ignored. The power on value is giving a default clock out of 4MHz which is quite common for many microcontrollers. Of course faster microcontrollers can power up on 4Mhz and then set the Mode to run at their full speed. The expected clock frequency is 48MHz/(N+) where N is the clock divisor. The PDIUSBD data sheet shows only the low nibble being used. However after accidental playing, it was found to be the same than the PDIUSBHA, using the lowest 6 bits for the divisor. Thus care must be taken with the extra two bits. They are NOT don t cares as the data sheet would suggest. Read Interrupt Register Command 0xF4 Read Interrupt Register Data Read Two Data Bytes Interrupt Register Byte Power on Reset EndPoint Index 7 Endpoint Index 6 Endpoint Index 5 Endpoint Control In Index 4 Endpoint Control Reserved Out (Hub) Endpoint Reserved (Hub) Interrupt Register Byte Power on Reset Reserved Bus Reserved Reserved Reserved Reserved Endpoint Endpoint Reset Index 8 Index 9 After an interrupt has occurred a read of this command will show what event caused the interrupt. Each bit is cleared by reading the Read Last Transaction Status. However should a Bus Reset Interrupt occur, reading the Interrupt Register (0xF4) will clear this flag. The Interrupt pin on the PDIUSBD is an active low signal which gets pulled low after an interrupt has occurred and remains their until all interrupts are cleared. Most microcontrollers will accept an Edge Sensitive Interrupt, however few will accept a Level Sensitive Interrupt. There are two ways of approaching this problem. What Philips does in many of their examples is simply poll the interrupt register continuously and branch to a handler should an interrupt be pending. This opens up the use of the INT pin on the microcontroller to other possibilities. The other option is to generate an interrupt on the falling edge and when the first handler has finished, before returning from the interrupt, check if any other interrupts are still pending and if so handle these. This way, not all you idle cycles are being taken up with polling the interrupt register. Note : The PDIUSBD Data Sheet would suggest that the Interrupt Register is cleared by reading the Read Endpoint Status Command. This is an error that Philips Semiconductors acknowledges in their FAQ. Please refer to 4. How is the Interrupt Flag cleared? Also note that this error is still not fixed in their latest revision of the Data Sheet dated nd July 999

9 Select Endpoint Command 0x0 Select Control Out Endpoint Data Read One Byte Optional 0x0 Select Control In Endpoint 0x04 Select Generic Endpoint IN 0x05 Select Generic Endpoint OUT 0x06 Select Generic Endpoint OUT 0x07 Select Generic Endpoint IN 0x08 Select Generic Endpoint OUT 0x09 Select Generic Endpoint IN Power on Reset Reserved Reserved Reserved Reserved Reserved Reserved Reserved Buffer Full This command will select the desired endpoint (Set the Internal Pointer) for a subset of commands. Changing endpoints will reset the pointer. An optional byte can be read to determine if the Endpoint Buffer selected is full or empty. This is seldom used in the interest of efficiency, as the Read Endpoint Status command will indicate if the Buffer is full plus other information. It bit is set, then the Buffer is Full. Read Last Transaction Status Command 0x4 Read Last Transaction Status for the Control Out Endpoint Data Read One Byte 0x4 Read Last Transaction Status for the Control In Endpoint 0x44 Read Last Transaction Status for the Generic Endpoint IN 0x45 Read Last Transaction Status for the Generic Endpoint OUT 0x46 Read Last Transaction Status for the Generic Endpoint OUT 0x47 Read Last Transaction Status for the Generic Endpoint IN 0x48 Read Last Transaction Status for the Generic Endpoint OUT 0x49 Read Last Transaction Status for the Generic Endpoint IN Power on Reset Previous Data Data 0/ Setup Receive Status Error Code Packet Packet Transmit not Read Success This command is intended for debugging. It will return a byte showing the status of the last transaction on the requested Endpoint without resetting any internal pointers set by the Set Endpoint Command. Code Error 0000 No Error 000 PID Encoding Error 000 PID Unknown 00 Unexpected Packet 000 Token CRC Error 00 Data CRC Error 00 Time Out Error 0 Babble Error 000 Unexpected End of Packet 00 Sent or Received NAK 00 Sent Stall 0 Overflow Error 0 BitStuff Error Wrong DATA PID

10 Read Endpoint Status Command 0x8 Read Control OUT Endpoint Status Data Read One Byte 0x8 Read Control IN Endpoint Status 0x84 Read Generic Endpoint IN Endpoint Status 0x85 Read Generic Endpoint OUT Endpoint Status 0x86 Read Generic Endpoint OUT Endpoint Status 0x87 Read Generic Endpoint IN Endpoint Status 0x88 Read Generic Endpoint OUT Endpoint Status 0x89 Read Generic Endpoint IN Endpoint Status Power on Reset Reserved Reserved Buffer Data 0/ Setup Stalled Full Packet Packet Reserved Reserved Read Buffer / Write Buffer Command 0xF0 Read Buffer Data Read up to 0 Bytes 0xF0 Write Buffer Data Write up to 0 Bytes The same command is sent to Read or Write Data. The desired operation is selected by the data phase. The PDIUSBD contains an area of linear RAM segmented into Endpoint buffers. The Read or Write Commands will not set the PDIUSBD s Internal RAM pointer to the start of the particular 8 byte buffer. This is done using the Select Endpoint Command. After a byte has been written or read the internal pointer is incremented. Beware that there is no protection from reading or writing into the next endpoint s buffer. The Data in the Buffer has the following format. Offset 0 Offset Offset Offset. Offset 9 Reserved Number of bytes Byte Byte Byte 8 Undefined Value to follow Clear Buffer Command 0xF Data None After a packet has been received the buffer full flag is set and the PDIUSBD will issue NAK to additional packets send to the endpoint until the Buffer Clear Flag is cleared. Therefore once data has been received it should be read and on completion of reading the data the clear buffer command should be issued to enable subsequent packets to be received. Failure to do so will inhibit an more packets being received on this endpoint. Validate Buffer Command 0xFA Data None Once data has been written to a IN Buffer, the Validate Buffer command should be set. This tells the PDIUSBD that the data is complete and should be sent when the next IN Token is received.

11 Set Endpoint Status Command 0x4 Set Control OUT Endpoint Status Data Write one byte with the following format 0x4 Set Control IN Endpoint Status 0x84 Set Generic Endpoint IN Endpoint Status 0x85 Set Generic Endpoint OUT Endpoint Status 0x86 Set Generic Endpoint OUT Endpoint Status 0x87 Set Generic Endpoint IN Endpoint Status 0x88 Set Generic Endpoint OUT Endpoint Status 0x89 Set Generic Endpoint IN Endpoint Status X X X X X X X 0 Power on Reset Reserved Reserved Reserved Reserved Reserved Reserved Reserved Stalled This command can be used to stall endpoints. Endpoints can be stalled, if they are not in use or if a command is not supported, among other reasons. A Setup Packet will be received regardless if the endpoint is stalled or not. Should the endpoint be stalled when it receives a Setup Packet, another Set Endpoint Status command will need to be sent to stall the endpoint again. If a Zero is written to un-stall an endpoint, even if the endpoint is already un-stalled, the buffer is cleared and If the endpoint is an IN endpoint, the PDIUSBD will send a DATA 0 PID to the host. If the endpoint is an OUT Endpoint the PDIUSBD will wait for a DATA0 PID. This procedure is the same should a Setup Packet un-stall the Endpoint. The Set Endpoint Status shares the same command numbering than the Read Last Transaction Status. The data phase will determine which command is sought after. Acknowledge Setup Command 0xF Data None When a Setup Packet is received, the PDIUSBD will clear the Control IN Endpoint Buffer, and disable the Validate Buffer and Clear Buffer commands until the packet is acknowledged by the controller, by sending the Acknowledge Setup Command to both IN & OUT Control Endpoints. This prevents the Setup packet from being overridden and any packets being sent back to the host. Send Resume Command 0xF6 Data None This command will send the resume signal upstream to the hub or host. This can be used to wake the host up. Read Current Frame Number Command 0xF5 Data Read One or Two Bytes The Read Current Frame Number can be used to return the current 6 Bit Frame Number of the last SOF received successfully. The LSByte is returned first, followed by the MSByte.