AADL Specification of the ASAAC Communication Architecture
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1 AADL Specification of the ASAAC Communication Architecture Andre Windisch SAE AS-2 Meeting on AADL St. Louis, April 2004
2 Contents Introduction to ASAAC The AADL Notation ASAAC Modelling Approach #1 ASAAC Modelling Approach #2 ASAAC Modelling Approach #3 Open Issues Page 2
3 ASAAC >> Common Functional Modules (CFM) DP GP SP MSU RU MSU RU MSU RU NIU NIU NIU MM NS PC MSU RU MSU RU MSU RU NIU NIU NIU Page 3 DP GP SP MM NS PC Data Processing Graphics Processing Signal Processing Mass Memory Network Switch Power Conversion
4 ASAAC >> Data Processing Module (DPM) DP MSB CB PB MSU RU NIU ATM MSU RU NIU DP Module Support Unit Routing Unit Network Interface Unit Data Processing (Payload) FC DP ETN FC ATM Page 4
5 ASAAC >> Graphics Processing Module (GPM) GP MSB CB PB1 PB2 MSU RU NIU ATM MSB CB PB1 PB2 Module Support Board Communications Board Payload Board #1 Payload Board #2 FC GP ETN FC ATM Display Page 5
6 ASAAC >> Core Processing Platform (CPP) MMM DPM1 GPM Rack E CB MSB PB1 CB MSB PB1 CB MSB PB1 PB2 DISPLAY Rack E Rack D Rack D SPM DPM2 ENV BOOT PB1 CB MSB PB2 PB1 CB MSB NSM Support NSM FC ATM ATM Support RS232 ETN ETN Page 6
7 ASAAC >> SW Architecture (Comms Part) Generic System Management (GSM) Application Layer (AL) App #1 App #2 App #3 App Error Handling APOS OS Layer (OSL) Virtual Channel Manager (VCM) SMOS Config Manager (CM) SMBP Blueprint Manager (BPM) MOS Module Support (MSL) Network Independent Interface (NII) Communications Implementation APOS MOS SMOS SMBP Application to Operating System Interface Module to Operating System Interface System Management to Operating System Interface System Management to Blueprint Interface Page 7
8 ASAAC >> SW Integration MSB CB PB Application Layer (AL) OS Layer (OSL) Application APOS VCM & GSM MOS Module Support (MSL) Message Router Buffer Handler NiiMsl Handler ATM DP FC Page 8 FC ATM
9 Contents Introduction to ASAAC The AADL Notation ASAAC Modelling Approach #1 ASAAC Modelling Approach #2 ASAAC Modelling Approach #3 Open Issues Page 9
10 AADL Graphical Primitives >> Components Data Device Thread Memory Bus Process Processor Software Platform System Composite Page 10
11 AADL Graphical Primitives >> Features Data Port Immediate Event Port Event Data Port Delayed Ports <name> client Client / Server server Subprograms Connections Page 11
12 Contents Introduction to ASAAC The AADL Notation ASAAC Modelling Approach #1 ASAAC Modelling Approach #2 ASAAC Modelling Approach #3 Open Issues Page 12
13 Approach #1 >> Common Functional Module (CFM) CFM.DpmVme MSB [PowerPCBoard] CB [PowerPCComms] PB [PowerPCBoard] ATMBoard Memory PCI Memory PCI Memory PCI PowerPC PowerPC PowerPC Backplane [VME] ETH ATM Page 13
14 Approach #1 >> Module Support Layer (MSL) MSL.DpmVme Message Router CFM.DpmVme Buffer Handler NiiMsl Handler MOS MOS_configureInterface MOS_configureTransfer MOS_configureNetwork MOS_sendTransfer MOS_receiveTRansfer MOS_destroyTransfer MOS_networkStatus MOS_networkInfo MSB CB PB ETH ATM Page 14
15 Approach #1 >> Operating System Layer (OSL) OSL.DpmVme SMOS SMBP VCM CM BPM APOS APOS_sendMessageNonblocking APOS_receiveMessageNonblocking APOS_sendMessage APOS_receiveMessage APOS_lockBuffer APOS_sendBuffer APOS_receiveBuffer APOS_unlockBuffer APOS_waitOnMultiChannel MSL Message Router MOS Buffer Handler NiiMsl Handler CFM MSB CB PB Page 15 ETH ATM
16 Approach #1 >> Application (Reader/Writer) ASAACApplication.RW Reader Writer APOS_sendMessage CPP.DpmVme DPM1 APOS_receiveMessage DPM2 ATM0 Page 16
17 Contents Introduction to ASAAC The AADL Notation ASAAC Modelling Approach #1 ASAAC Modelling Approach #2 ASAAC Modelling Approach #3 Open Issues Page 17
18 Approach #2 >> Common Functional Module (CFM) CFM.DpmVme MSB [PowerPCBoard] CB [PowerPCComms] PB [PowerPCBoard] ATMBoard Memory PCI Memory PCI Memory PCI PowerPC PowerPC PowerPC Backplane [VME] ETH ATM Page 18
19 Approach #2 >> Module Support Layer (MSL) MSL.DpmVme Message Router Buffer Handler NiiMsl Handler MOS MOS_configureInterface MOS_configureTransfer MOS_configureNetwork MOS_sendTransfer MOS_receiveTRansfer MOS_destroyTransfer MOS_networkStatus MOS_networkInfo Page 19
20 Approach #2 >> Operating System Layer (OSL) OSL.DpmVme SMOS SMBP VCM CM BPM APOS APOS_sendMessageNonblocking APOS_receiveMessageNonblocking APOS_sendMessage APOS_receiveMessage APOS_lockBuffer APOS_sendBuffer APOS_receiveBuffer APOS_unlockBuffer APOS_waitOnMultiChannel MOS Page 20
21 Approach #2 >> Application (Reader/Writer) ASAACApplication.RW Reader Writer APOS_sendMessage CPP.DpmVme DPM1 APOS_receiveMessage DPM2 ATM0 Page 21
22 Contents Introduction to ASAAC The AADL Notation ASAAC Modelling Approach #1 ASAAC Modelling Approach #2 ASAAC Modelling Approach #3 (Platform Refinement) Open Issues Page 22
23 Approach #3 >> System Component Refinement App P2 (Abstract) P2 (Refined) P1 (Abstract) P1 (Refined) Step 1 Refinement of of system component P2 P2 Step 2 Refinement of of system component P1 P1 P0 (Base) Page 23
24 Approach #3 >> Application (Reader/Writer) ASAACApplication.RW Reader Virtual Channel (Connection) Writer APOS_sendMessage CPP_APOS.Abstract APOS_receiveMessage DPM_APOS (Abstract Processor) DPM_APOS (Abstract Processor) Transfer Connections (Logical Bus) Page 24
25 Approach #3 >> CPP_APOS Refined CPP_APOS.Refined VCM Transfer Connection (Connection) VCM CM CM BPM BPM MOS_sendTransfer CPP_MOS.Abstract MOS_receiveTransfer DPM_MOS (Abstract Processor) DPM_MOS (Abstract Processor) ATM Channels (Logical Bus) Page 25
26 Approach #3 >> CPP_MOS Refined CPP_MOS.Refined ATM Channel (Connection) CPP_HW.Abstract DPM_HW DPM_HW MSB CB PB MSB CB PB Backplane[VME] Backplane[VME] ATM0 (Physical Bus) Page 26
27 Approach #3 >> Vertical Refinement Problem DPM_APOS DPM_APOS (Abstract Processor) refined SMOS VCM CM SMBP BPM MOS DPM_MOS (Abstract Processor) Page 27
28 Approach #3 >> Vertical Refinement Problem (cont d) CPP DPM_APOS VCM Transfer Connection (Connection) DPM_APOS VCM CM CM BPM BPM DPM_MOS (Abstract Processor) Further refinement impossible! (system boundary problem) ATM Channels (Logical Bus) DPM_MOS (Abstract Processor) Page 28
29 Contents Introduction to ASAAC The AADL Notation ASAAC Modelling Approach #1 ASAAC Modelling Approach #2 ASAAC Modelling Approach #3 Open Issues Page 29
30 Open Issues No explicit modelling of communication on application and operating system level in approaches #1 & #2 (without step-wise refinement) No clear relation between subprogram calls and ports, i. e. relation between control flow and data flow Modelling of OSI-conform multi layered communication is possible in terms of step-wise refinement. However, vertical and horizontal refinement can not be applied at the same time. Page 30
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